1 /*
2  * (C) Copyright 2004-2008
3  * Texas Instruments, <www.ti.com>
4  *
5  * Author :
6  *	Sunil Kumar <sunilsaini05@gmail.com>
7  *	Shashi Ranjan <shashiranjanmca05@gmail.com>
8  *
9  * (C) Copyright 2009
10  * Frederik Kriewitz <frederik@kriewitz.eu>
11  *
12  * Derived from Beagle Board and 3430 SDP code by
13  *	Richard Woodruff <r-woodruff2@ti.com>
14  *	Syed Mohammed Khasim <khasim@ti.com>
15  *
16  *
17  * See file CREDITS for list of people who contributed to this
18  * project.
19  *
20  * This program is free software; you can redistribute it and/or
21  * modify it under the terms of the GNU General Public License as
22  * published by the Free Software Foundation; either version 2 of
23  * the License, or (at your option) any later version.
24  *
25  * This program is distributed in the hope that it will be useful,
26  * but WITHOUT ANY WARRANTY; without even the implied warranty of
27  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
28  * GNU General Public License for more details.
29  *
30  * You should have received a copy of the GNU General Public License
31  * along with this program; if not, write to the Free Software
32  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33  * MA 02111-1307 USA
34  */
35 #include <common.h>
36 #include <twl4030.h>
37 #include <asm/io.h>
38 #include <asm/arch/mmc_host_def.h>
39 #include <asm/arch/mux.h>
40 #include <asm/arch/sys_proto.h>
41 #include <asm/arch/mem.h>
42 #include <asm/mach-types.h>
43 #include "devkit8000.h"
44 #ifdef CONFIG_DRIVER_DM9000
45 #include <net.h>
46 #include <netdev.h>
47 #endif
48 
49 DECLARE_GLOBAL_DATA_PTR;
50 
51 /*
52  * Routine: board_init
53  * Description: Early hardware init.
54  */
55 int board_init(void)
56 {
57 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
58 	/* board id for Linux */
59 	gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000;
60 	/* boot param addr */
61 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
62 
63 	return 0;
64 }
65 
66 /*
67  * Routine: misc_init_r
68  * Description: Configure board specific parts
69  */
70 int misc_init_r(void)
71 {
72 	struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
73 #ifdef CONFIG_DRIVER_DM9000
74 	uchar enetaddr[6];
75 	u32 die_id_0;
76 #endif
77 
78 	twl4030_power_init();
79 #ifdef CONFIG_TWL4030_LED
80 	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
81 #endif
82 
83 #ifdef CONFIG_DRIVER_DM9000
84 	/* Configure GPMC registers for DM9000 */
85 	writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[6].config1);
86 	writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[6].config2);
87 	writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[6].config3);
88 	writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[6].config4);
89 	writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[6].config5);
90 	writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[6].config6);
91 	writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[6].config7);
92 
93 	/* Use OMAP DIE_ID as MAC address */
94 	if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
95 		printf("ethaddr not set, using Die ID\n");
96 		die_id_0 = readl(&id_base->die_id_0);
97 		enetaddr[0] = 0x02; /* locally administered */
98 		enetaddr[1] = readl(&id_base->die_id_1) & 0xff;
99 		enetaddr[2] = (die_id_0 & 0xff000000) >> 24;
100 		enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16;
101 		enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8;
102 		enetaddr[5] = (die_id_0 & 0x000000ff);
103 		eth_setenv_enetaddr("ethaddr", enetaddr);
104 	}
105 #endif
106 
107 	dieid_num_r();
108 
109 	return 0;
110 }
111 
112 /*
113  * Routine: set_muxconf_regs
114  * Description: Setting up the configuration Mux registers specific to the
115  *		hardware. Many pins need to be moved from protect to primary
116  *		mode.
117  */
118 void set_muxconf_regs(void)
119 {
120 	MUX_DEVKIT8000();
121 }
122 
123 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
124 int board_mmc_init(bd_t *bis)
125 {
126 	omap_mmc_init(0);
127 	return 0;
128 }
129 #endif
130 
131 #if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
132 /*
133  * Routine: board_eth_init
134  * Description: Setting up the Ethernet hardware.
135  */
136 int board_eth_init(bd_t *bis)
137 {
138 	return dm9000_initialize(bis);
139 }
140 #endif
141 
142 /*
143  * Routine: get_board_mem_timings
144  * Description: If we use SPL then there is no x-loader nor config header
145  * so we have to setup the DDR timings ourself on the first bank.  This
146  * provides the timing values back to the function that configures
147  * the memory.  We have either one or two banks of 128MB DDR.
148  */
149 void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
150 		u32 *mr)
151 {
152 	/* General SDRC config */
153 	*mcfg = MICRON_V_MCFG_165(128 << 20);
154 	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
155 
156 	/* AC timings */
157 	*ctrla = MICRON_V_ACTIMA_165;
158 	*ctrlb = MICRON_V_ACTIMB_165;
159 
160 	*mr = MICRON_V_MR_165;
161 }
162