1 /* 2 * (C) Copyright 2004-2008 3 * Texas Instruments, <www.ti.com> 4 * 5 * Author : 6 * Sunil Kumar <sunilsaini05@gmail.com> 7 * Shashi Ranjan <shashiranjanmca05@gmail.com> 8 * 9 * (C) Copyright 2009 10 * Frederik Kriewitz <frederik@kriewitz.eu> 11 * 12 * Derived from Beagle Board and 3430 SDP code by 13 * Richard Woodruff <r-woodruff2@ti.com> 14 * Syed Mohammed Khasim <khasim@ti.com> 15 * 16 * 17 * SPDX-License-Identifier: GPL-2.0+ 18 */ 19 #include <common.h> 20 #include <dm.h> 21 #include <ns16550.h> 22 #include <twl4030.h> 23 #include <asm/io.h> 24 #include <asm/arch/mmc_host_def.h> 25 #include <asm/arch/mux.h> 26 #include <asm/arch/sys_proto.h> 27 #include <asm/arch/mem.h> 28 #include <asm/mach-types.h> 29 #include "devkit8000.h" 30 #include <asm/gpio.h> 31 #ifdef CONFIG_DRIVER_DM9000 32 #include <net.h> 33 #include <netdev.h> 34 #endif 35 36 DECLARE_GLOBAL_DATA_PTR; 37 38 static u32 gpmc_net_config[GPMC_MAX_REG] = { 39 NET_GPMC_CONFIG1, 40 NET_GPMC_CONFIG2, 41 NET_GPMC_CONFIG3, 42 NET_GPMC_CONFIG4, 43 NET_GPMC_CONFIG5, 44 NET_GPMC_CONFIG6, 45 0 46 }; 47 48 static const struct ns16550_platdata devkit8000_serial = { 49 OMAP34XX_UART3, 50 2, 51 V_NS16550_CLK 52 }; 53 54 U_BOOT_DEVICE(devkit8000_uart) = { 55 "serial_omap", 56 &devkit8000_serial 57 }; 58 59 /* 60 * Routine: board_init 61 * Description: Early hardware init. 62 */ 63 int board_init(void) 64 { 65 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 66 /* board id for Linux */ 67 gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000; 68 /* boot param addr */ 69 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 70 71 return 0; 72 } 73 74 /* Configure GPMC registers for DM9000 */ 75 static void gpmc_dm9000_config(void) 76 { 77 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], 78 CONFIG_DM9000_BASE, GPMC_SIZE_16M); 79 } 80 81 /* 82 * Routine: misc_init_r 83 * Description: Configure board specific parts 84 */ 85 int misc_init_r(void) 86 { 87 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE; 88 #ifdef CONFIG_DRIVER_DM9000 89 uchar enetaddr[6]; 90 u32 die_id_0; 91 #endif 92 93 twl4030_power_init(); 94 #ifdef CONFIG_TWL4030_LED 95 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 96 #endif 97 98 #ifdef CONFIG_DRIVER_DM9000 99 /* Configure GPMC registers for DM9000 */ 100 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], 101 CONFIG_DM9000_BASE, GPMC_SIZE_16M); 102 103 /* Use OMAP DIE_ID as MAC address */ 104 if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { 105 printf("ethaddr not set, using Die ID\n"); 106 die_id_0 = readl(&id_base->die_id_0); 107 enetaddr[0] = 0x02; /* locally administered */ 108 enetaddr[1] = readl(&id_base->die_id_1) & 0xff; 109 enetaddr[2] = (die_id_0 & 0xff000000) >> 24; 110 enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16; 111 enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8; 112 enetaddr[5] = (die_id_0 & 0x000000ff); 113 eth_setenv_enetaddr("ethaddr", enetaddr); 114 } 115 #endif 116 117 omap_die_id_display(); 118 119 return 0; 120 } 121 122 /* 123 * Routine: set_muxconf_regs 124 * Description: Setting up the configuration Mux registers specific to the 125 * hardware. Many pins need to be moved from protect to primary 126 * mode. 127 */ 128 void set_muxconf_regs(void) 129 { 130 MUX_DEVKIT8000(); 131 } 132 133 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 134 int board_mmc_init(bd_t *bis) 135 { 136 return omap_mmc_init(0, 0, 0, -1, -1); 137 } 138 #endif 139 140 #if defined(CONFIG_GENERIC_MMC) 141 void board_mmc_power_init(void) 142 { 143 twl4030_power_mmc_init(0); 144 } 145 #endif 146 147 #if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD) 148 /* 149 * Routine: board_eth_init 150 * Description: Setting up the Ethernet hardware. 151 */ 152 int board_eth_init(bd_t *bis) 153 { 154 return dm9000_initialize(bis); 155 } 156 #endif 157 158 #ifdef CONFIG_SPL_OS_BOOT 159 /* 160 * Do board specific preperation before SPL 161 * Linux boot 162 */ 163 void spl_board_prepare_for_linux(void) 164 { 165 gpmc_dm9000_config(); 166 } 167 168 /* 169 * devkit8000 specific implementation of spl_start_uboot() 170 * 171 * RETURN 172 * 0 if the button is not pressed 173 * 1 if the button is pressed 174 */ 175 int spl_start_uboot(void) 176 { 177 int val = 0; 178 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) { 179 gpio_direction_input(SPL_OS_BOOT_KEY); 180 val = gpio_get_value(SPL_OS_BOOT_KEY); 181 gpio_free(SPL_OS_BOOT_KEY); 182 } 183 return !val; 184 } 185 #endif 186 187 /* 188 * Routine: get_board_mem_timings 189 * Description: If we use SPL then there is no x-loader nor config header 190 * so we have to setup the DDR timings ourself on the first bank. This 191 * provides the timing values back to the function that configures 192 * the memory. We have either one or two banks of 128MB DDR. 193 */ 194 void get_board_mem_timings(struct board_sdrc_timings *timings) 195 { 196 /* General SDRC config */ 197 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 198 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 199 200 /* AC timings */ 201 timings->ctrla = MICRON_V_ACTIMA_165; 202 timings->ctrlb = MICRON_V_ACTIMB_165; 203 204 timings->mr = MICRON_V_MR_165; 205 } 206