1 /* 2 * (C) Copyright 2004-2008 3 * Texas Instruments, <www.ti.com> 4 * 5 * Author : 6 * Sunil Kumar <sunilsaini05@gmail.com> 7 * Shashi Ranjan <shashiranjanmca05@gmail.com> 8 * 9 * (C) Copyright 2009 10 * Frederik Kriewitz <frederik@kriewitz.eu> 11 * 12 * Derived from Beagle Board and 3430 SDP code by 13 * Richard Woodruff <r-woodruff2@ti.com> 14 * Syed Mohammed Khasim <khasim@ti.com> 15 * 16 * 17 * See file CREDITS for list of people who contributed to this 18 * project. 19 * 20 * This program is free software; you can redistribute it and/or 21 * modify it under the terms of the GNU General Public License as 22 * published by the Free Software Foundation; either version 2 of 23 * the License, or (at your option) any later version. 24 * 25 * This program is distributed in the hope that it will be useful, 26 * but WITHOUT ANY WARRANTY; without even the implied warranty of 27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 28 * GNU General Public License for more details. 29 * 30 * You should have received a copy of the GNU General Public License 31 * along with this program; if not, write to the Free Software 32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 33 * MA 02111-1307 USA 34 */ 35 #include <common.h> 36 #include <twl4030.h> 37 #include <asm/io.h> 38 #include <asm/arch/mmc_host_def.h> 39 #include <asm/arch/mux.h> 40 #include <asm/arch/sys_proto.h> 41 #include <asm/arch/mem.h> 42 #include <asm/mach-types.h> 43 #include "devkit8000.h" 44 #include <asm/gpio.h> 45 #ifdef CONFIG_DRIVER_DM9000 46 #include <net.h> 47 #include <netdev.h> 48 #endif 49 50 DECLARE_GLOBAL_DATA_PTR; 51 52 static u32 gpmc_net_config[GPMC_MAX_REG] = { 53 NET_GPMC_CONFIG1, 54 NET_GPMC_CONFIG2, 55 NET_GPMC_CONFIG3, 56 NET_GPMC_CONFIG4, 57 NET_GPMC_CONFIG5, 58 NET_GPMC_CONFIG6, 59 0 60 }; 61 62 /* 63 * Routine: board_init 64 * Description: Early hardware init. 65 */ 66 int board_init(void) 67 { 68 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 69 /* board id for Linux */ 70 gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000; 71 /* boot param addr */ 72 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 73 74 return 0; 75 } 76 77 /* Configure GPMC registers for DM9000 */ 78 static void gpmc_dm9000_config(void) 79 { 80 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], 81 CONFIG_DM9000_BASE, GPMC_SIZE_16M); 82 } 83 84 /* 85 * Routine: misc_init_r 86 * Description: Configure board specific parts 87 */ 88 int misc_init_r(void) 89 { 90 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE; 91 #ifdef CONFIG_DRIVER_DM9000 92 uchar enetaddr[6]; 93 u32 die_id_0; 94 #endif 95 96 twl4030_power_init(); 97 #ifdef CONFIG_TWL4030_LED 98 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 99 #endif 100 101 #ifdef CONFIG_DRIVER_DM9000 102 /* Configure GPMC registers for DM9000 */ 103 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], 104 CONFIG_DM9000_BASE, GPMC_SIZE_16M); 105 106 /* Use OMAP DIE_ID as MAC address */ 107 if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { 108 printf("ethaddr not set, using Die ID\n"); 109 die_id_0 = readl(&id_base->die_id_0); 110 enetaddr[0] = 0x02; /* locally administered */ 111 enetaddr[1] = readl(&id_base->die_id_1) & 0xff; 112 enetaddr[2] = (die_id_0 & 0xff000000) >> 24; 113 enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16; 114 enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8; 115 enetaddr[5] = (die_id_0 & 0x000000ff); 116 eth_setenv_enetaddr("ethaddr", enetaddr); 117 } 118 #endif 119 120 dieid_num_r(); 121 122 return 0; 123 } 124 125 /* 126 * Routine: set_muxconf_regs 127 * Description: Setting up the configuration Mux registers specific to the 128 * hardware. Many pins need to be moved from protect to primary 129 * mode. 130 */ 131 void set_muxconf_regs(void) 132 { 133 MUX_DEVKIT8000(); 134 } 135 136 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 137 int board_mmc_init(bd_t *bis) 138 { 139 return omap_mmc_init(0, 0, 0, -1, -1); 140 } 141 #endif 142 143 #if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD) 144 /* 145 * Routine: board_eth_init 146 * Description: Setting up the Ethernet hardware. 147 */ 148 int board_eth_init(bd_t *bis) 149 { 150 return dm9000_initialize(bis); 151 } 152 #endif 153 154 #ifdef CONFIG_SPL_OS_BOOT 155 /* 156 * Do board specific preperation before SPL 157 * Linux boot 158 */ 159 void spl_board_prepare_for_linux(void) 160 { 161 gpmc_dm9000_config(); 162 } 163 164 /* 165 * devkit8000 specific implementation of spl_start_uboot() 166 * 167 * RETURN 168 * 0 if the button is not pressed 169 * 1 if the button is pressed 170 */ 171 int spl_start_uboot(void) 172 { 173 int val = 0; 174 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) { 175 gpio_direction_input(SPL_OS_BOOT_KEY); 176 val = gpio_get_value(SPL_OS_BOOT_KEY); 177 gpio_free(SPL_OS_BOOT_KEY); 178 } 179 return !val; 180 } 181 #endif 182 183 /* 184 * Routine: get_board_mem_timings 185 * Description: If we use SPL then there is no x-loader nor config header 186 * so we have to setup the DDR timings ourself on the first bank. This 187 * provides the timing values back to the function that configures 188 * the memory. We have either one or two banks of 128MB DDR. 189 */ 190 void get_board_mem_timings(struct board_sdrc_timings *timings) 191 { 192 /* General SDRC config */ 193 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 194 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 195 196 /* AC timings */ 197 timings->ctrla = MICRON_V_ACTIMA_165; 198 timings->ctrlb = MICRON_V_ACTIMB_165; 199 200 timings->mr = MICRON_V_MR_165; 201 } 202