1 /* 2 * (C) Copyright 2004-2008 3 * Texas Instruments, <www.ti.com> 4 * 5 * Author : 6 * Sunil Kumar <sunilsaini05@gmail.com> 7 * Shashi Ranjan <shashiranjanmca05@gmail.com> 8 * 9 * (C) Copyright 2009 10 * Frederik Kriewitz <frederik@kriewitz.eu> 11 * 12 * Derived from Beagle Board and 3430 SDP code by 13 * Richard Woodruff <r-woodruff2@ti.com> 14 * Syed Mohammed Khasim <khasim@ti.com> 15 * 16 * 17 * SPDX-License-Identifier: GPL-2.0+ 18 */ 19 #include <common.h> 20 #include <dm.h> 21 #include <environment.h> 22 #include <ns16550.h> 23 #include <twl4030.h> 24 #include <asm/io.h> 25 #include <asm/arch/mmc_host_def.h> 26 #include <asm/arch/mux.h> 27 #include <asm/arch/sys_proto.h> 28 #include <asm/arch/mem.h> 29 #include <asm/mach-types.h> 30 #include "devkit8000.h" 31 #include <asm/gpio.h> 32 #ifdef CONFIG_DRIVER_DM9000 33 #include <net.h> 34 #include <netdev.h> 35 #endif 36 37 DECLARE_GLOBAL_DATA_PTR; 38 39 static u32 gpmc_net_config[GPMC_MAX_REG] = { 40 NET_GPMC_CONFIG1, 41 NET_GPMC_CONFIG2, 42 NET_GPMC_CONFIG3, 43 NET_GPMC_CONFIG4, 44 NET_GPMC_CONFIG5, 45 NET_GPMC_CONFIG6, 46 0 47 }; 48 49 static const struct ns16550_platdata devkit8000_serial = { 50 .base = OMAP34XX_UART3, 51 .reg_shift = 2, 52 .clock = V_NS16550_CLK, 53 .fcr = UART_FCR_DEFVAL, 54 }; 55 56 U_BOOT_DEVICE(devkit8000_uart) = { 57 "ns16550_serial", 58 &devkit8000_serial 59 }; 60 61 /* 62 * Routine: board_init 63 * Description: Early hardware init. 64 */ 65 int board_init(void) 66 { 67 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 68 /* board id for Linux */ 69 gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000; 70 /* boot param addr */ 71 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 72 73 return 0; 74 } 75 76 /* Configure GPMC registers for DM9000 */ 77 static void gpmc_dm9000_config(void) 78 { 79 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], 80 CONFIG_DM9000_BASE, GPMC_SIZE_16M); 81 } 82 83 /* 84 * Routine: misc_init_r 85 * Description: Configure board specific parts 86 */ 87 int misc_init_r(void) 88 { 89 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE; 90 #ifdef CONFIG_DRIVER_DM9000 91 uchar enetaddr[6]; 92 u32 die_id_0; 93 #endif 94 95 twl4030_power_init(); 96 #ifdef CONFIG_TWL4030_LED 97 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 98 #endif 99 100 #ifdef CONFIG_DRIVER_DM9000 101 /* Configure GPMC registers for DM9000 */ 102 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], 103 CONFIG_DM9000_BASE, GPMC_SIZE_16M); 104 105 /* Use OMAP DIE_ID as MAC address */ 106 if (!eth_env_get_enetaddr("ethaddr", enetaddr)) { 107 printf("ethaddr not set, using Die ID\n"); 108 die_id_0 = readl(&id_base->die_id_0); 109 enetaddr[0] = 0x02; /* locally administered */ 110 enetaddr[1] = readl(&id_base->die_id_1) & 0xff; 111 enetaddr[2] = (die_id_0 & 0xff000000) >> 24; 112 enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16; 113 enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8; 114 enetaddr[5] = (die_id_0 & 0x000000ff); 115 eth_env_set_enetaddr("ethaddr", enetaddr); 116 } 117 #endif 118 119 omap_die_id_display(); 120 121 return 0; 122 } 123 124 /* 125 * Routine: set_muxconf_regs 126 * Description: Setting up the configuration Mux registers specific to the 127 * hardware. Many pins need to be moved from protect to primary 128 * mode. 129 */ 130 void set_muxconf_regs(void) 131 { 132 MUX_DEVKIT8000(); 133 } 134 135 #if defined(CONFIG_MMC) 136 int board_mmc_init(bd_t *bis) 137 { 138 return omap_mmc_init(0, 0, 0, -1, -1); 139 } 140 #endif 141 142 #if defined(CONFIG_MMC) 143 void board_mmc_power_init(void) 144 { 145 twl4030_power_mmc_init(0); 146 } 147 #endif 148 149 #if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD) 150 /* 151 * Routine: board_eth_init 152 * Description: Setting up the Ethernet hardware. 153 */ 154 int board_eth_init(bd_t *bis) 155 { 156 return dm9000_initialize(bis); 157 } 158 #endif 159 160 #ifdef CONFIG_SPL_OS_BOOT 161 /* 162 * Do board specific preparation before SPL 163 * Linux boot 164 */ 165 void spl_board_prepare_for_linux(void) 166 { 167 gpmc_dm9000_config(); 168 } 169 170 /* 171 * devkit8000 specific implementation of spl_start_uboot() 172 * 173 * RETURN 174 * 0 if the button is not pressed 175 * 1 if the button is pressed 176 */ 177 int spl_start_uboot(void) 178 { 179 int val = 0; 180 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) { 181 gpio_direction_input(SPL_OS_BOOT_KEY); 182 val = gpio_get_value(SPL_OS_BOOT_KEY); 183 gpio_free(SPL_OS_BOOT_KEY); 184 } 185 return !val; 186 } 187 #endif 188 189 /* 190 * Routine: get_board_mem_timings 191 * Description: If we use SPL then there is no x-loader nor config header 192 * so we have to setup the DDR timings ourself on the first bank. This 193 * provides the timing values back to the function that configures 194 * the memory. We have either one or two banks of 128MB DDR. 195 */ 196 void get_board_mem_timings(struct board_sdrc_timings *timings) 197 { 198 /* General SDRC config */ 199 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 200 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 201 202 /* AC timings */ 203 timings->ctrla = MICRON_V_ACTIMA_165; 204 timings->ctrlb = MICRON_V_ACTIMB_165; 205 206 timings->mr = MICRON_V_MR_165; 207 } 208