1469ec1e3SAneesh V /* 2469ec1e3SAneesh V * (C) Copyright 2010 3469ec1e3SAneesh V * Texas Instruments Incorporated, <www.ti.com> 4469ec1e3SAneesh V * 5469ec1e3SAneesh V * Balaji Krishnamoorthy <balajitk@ti.com> 6469ec1e3SAneesh V * Aneesh V <aneesh@ti.com> 7469ec1e3SAneesh V * 8469ec1e3SAneesh V * See file CREDITS for list of people who contributed to this 9469ec1e3SAneesh V * project. 10469ec1e3SAneesh V * 11469ec1e3SAneesh V * This program is free software; you can redistribute it and/or 12469ec1e3SAneesh V * modify it under the terms of the GNU General Public License as 13469ec1e3SAneesh V * published by the Free Software Foundation; either version 2 of 14469ec1e3SAneesh V * the License, or (at your option) any later version. 15469ec1e3SAneesh V * 16469ec1e3SAneesh V * This program is distributed in the hope that it will be useful, 17469ec1e3SAneesh V * but WITHOUT ANY WARRANTY; without even the implied warranty of 18469ec1e3SAneesh V * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19469ec1e3SAneesh V * GNU General Public License for more details. 20469ec1e3SAneesh V * 21469ec1e3SAneesh V * You should have received a copy of the GNU General Public License 22469ec1e3SAneesh V * along with this program; if not, write to the Free Software 23469ec1e3SAneesh V * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24469ec1e3SAneesh V * MA 02111-1307 USA 25469ec1e3SAneesh V */ 26469ec1e3SAneesh V #ifndef _SDP4430_MUX_DATA_H 27469ec1e3SAneesh V #define _SDP4430_MUX_DATA_H 28469ec1e3SAneesh V 29469ec1e3SAneesh V #include <asm/arch/mux_omap4.h> 30469ec1e3SAneesh V 31469ec1e3SAneesh V const struct pad_conf_entry core_padconf_array_non_essential[] = { 32469ec1e3SAneesh V {GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_32 */ 33469ec1e3SAneesh V {GPMC_AD9, (PTU | IEN | M3)}, /* gpio_33 */ 34469ec1e3SAneesh V {GPMC_AD10, (PTU | IEN | M3)}, /* gpio_34 */ 35469ec1e3SAneesh V {GPMC_AD11, (PTU | IEN | M3)}, /* gpio_35 */ 36469ec1e3SAneesh V {GPMC_AD12, (PTU | IEN | M3)}, /* gpio_36 */ 37469ec1e3SAneesh V {GPMC_AD13, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_37 */ 38469ec1e3SAneesh V {GPMC_AD14, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_38 */ 39469ec1e3SAneesh V {GPMC_AD15, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_39 */ 40469ec1e3SAneesh V {GPMC_A16, (M3)}, /* gpio_40 */ 41469ec1e3SAneesh V {GPMC_A17, (PTD | M3)}, /* gpio_41 */ 42469ec1e3SAneesh V {GPMC_A18, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row6 */ 43469ec1e3SAneesh V {GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row7 */ 44469ec1e3SAneesh V {GPMC_A20, (IEN | M3)}, /* gpio_44 */ 45469ec1e3SAneesh V {GPMC_A21, (M3)}, /* gpio_45 */ 46469ec1e3SAneesh V {GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col6 */ 47469ec1e3SAneesh V {GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col7 */ 48469ec1e3SAneesh V {GPMC_A24, (PTD | M3)}, /* gpio_48 */ 49469ec1e3SAneesh V {GPMC_A25, (PTD | M3)}, /* gpio_49 */ 50469ec1e3SAneesh V {GPMC_NCS0, (M3)}, /* gpio_50 */ 51469ec1e3SAneesh V {GPMC_NCS1, (IEN | M3)}, /* gpio_51 */ 52469ec1e3SAneesh V {GPMC_NCS2, (IEN | M3)}, /* gpio_52 */ 53469ec1e3SAneesh V {GPMC_NCS3, (IEN | M3)}, /* gpio_53 */ 54469ec1e3SAneesh V {GPMC_NWP, (M3)}, /* gpio_54 */ 55469ec1e3SAneesh V {GPMC_CLK, (PTD | M3)}, /* gpio_55 */ 56469ec1e3SAneesh V {GPMC_NADV_ALE, (M3)}, /* gpio_56 */ 57469ec1e3SAneesh V {GPMC_NBE0_CLE, (M3)}, /* gpio_59 */ 58469ec1e3SAneesh V {GPMC_NBE1, (PTD | M3)}, /* gpio_60 */ 59469ec1e3SAneesh V {GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */ 60469ec1e3SAneesh V {GPMC_WAIT1, (IEN | M3)}, /* gpio_62 */ 61469ec1e3SAneesh V {C2C_DATA11, (PTD | M3)}, /* gpio_100 */ 62469ec1e3SAneesh V {C2C_DATA12, (M1)}, /* dsi1_te0 */ 63469ec1e3SAneesh V {C2C_DATA13, (PTD | M3)}, /* gpio_102 */ 64469ec1e3SAneesh V {C2C_DATA14, (M1)}, /* dsi2_te0 */ 65469ec1e3SAneesh V {C2C_DATA15, (PTD | M3)}, /* gpio_104 */ 66469ec1e3SAneesh V {HDMI_HPD, (M0)}, /* hdmi_hpd */ 67469ec1e3SAneesh V {HDMI_CEC, (M0)}, /* hdmi_cec */ 68469ec1e3SAneesh V {HDMI_DDC_SCL, (PTU | M0)}, /* hdmi_ddc_scl */ 69469ec1e3SAneesh V {HDMI_DDC_SDA, (PTU | IEN | M0)}, /* hdmi_ddc_sda */ 70469ec1e3SAneesh V {CSI21_DX0, (IEN | M0)}, /* csi21_dx0 */ 71469ec1e3SAneesh V {CSI21_DY0, (IEN | M0)}, /* csi21_dy0 */ 72469ec1e3SAneesh V {CSI21_DX1, (IEN | M0)}, /* csi21_dx1 */ 73469ec1e3SAneesh V {CSI21_DY1, (IEN | M0)}, /* csi21_dy1 */ 74469ec1e3SAneesh V {CSI21_DX2, (IEN | M0)}, /* csi21_dx2 */ 75469ec1e3SAneesh V {CSI21_DY2, (IEN | M0)}, /* csi21_dy2 */ 76469ec1e3SAneesh V {CSI21_DX3, (PTD | M7)}, /* csi21_dx3 */ 77469ec1e3SAneesh V {CSI21_DY3, (PTD | M7)}, /* csi21_dy3 */ 78469ec1e3SAneesh V {CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dx4 */ 79469ec1e3SAneesh V {CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dy4 */ 80469ec1e3SAneesh V {CSI22_DX0, (IEN | M0)}, /* csi22_dx0 */ 81469ec1e3SAneesh V {CSI22_DY0, (IEN | M0)}, /* csi22_dy0 */ 82469ec1e3SAneesh V {CSI22_DX1, (IEN | M0)}, /* csi22_dx1 */ 83469ec1e3SAneesh V {CSI22_DY1, (IEN | M0)}, /* csi22_dy1 */ 84469ec1e3SAneesh V {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */ 85469ec1e3SAneesh V {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */ 86469ec1e3SAneesh V {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */ 87469ec1e3SAneesh V {USBB1_ULPITLL_CLK, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cawake */ 88469ec1e3SAneesh V {USBB1_ULPITLL_STP, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cadata */ 89469ec1e3SAneesh V {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caflag */ 90469ec1e3SAneesh V {USBB1_ULPITLL_NXT, (OFF_EN | M1)}, /* hsi1_acready */ 91469ec1e3SAneesh V {USBB1_ULPITLL_DAT0, (OFF_EN | M1)}, /* hsi1_acwake */ 92469ec1e3SAneesh V {USBB1_ULPITLL_DAT1, (OFF_EN | M1)}, /* hsi1_acdata */ 93469ec1e3SAneesh V {USBB1_ULPITLL_DAT2, (OFF_EN | M1)}, /* hsi1_acflag */ 94469ec1e3SAneesh V {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caready */ 95469ec1e3SAneesh V {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ 96469ec1e3SAneesh V {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ 97469ec1e3SAneesh V {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ 98469ec1e3SAneesh V {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ 99469ec1e3SAneesh V {USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */ 100469ec1e3SAneesh V {USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ 101469ec1e3SAneesh V {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ 102469ec1e3SAneesh V {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ 103469ec1e3SAneesh V {ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_clkx */ 104469ec1e3SAneesh V {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ 105469ec1e3SAneesh V {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ 106469ec1e3SAneesh V {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ 107469ec1e3SAneesh V {ABE_MCBSP1_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_clkx */ 108469ec1e3SAneesh V {ABE_MCBSP1_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dr */ 109469ec1e3SAneesh V {ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dx */ 110469ec1e3SAneesh V {ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_fsx */ 111469ec1e3SAneesh V {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_ul_data */ 112469ec1e3SAneesh V {ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_dl_data */ 113469ec1e3SAneesh V {ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_frame */ 114469ec1e3SAneesh V {ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_lb_clk */ 115469ec1e3SAneesh V {ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_clks */ 116469ec1e3SAneesh V {ABE_DMIC_CLK1, (M0)}, /* abe_dmic_clk1 */ 117469ec1e3SAneesh V {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */ 118469ec1e3SAneesh V {ABE_DMIC_DIN2, (IEN | M0)}, /* abe_dmic_din2 */ 119469ec1e3SAneesh V {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */ 120469ec1e3SAneesh V {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */ 121469ec1e3SAneesh V {UART2_RTS, (M0)}, /* uart2_rts */ 122469ec1e3SAneesh V {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ 123469ec1e3SAneesh V {UART2_TX, (M0)}, /* uart2_tx */ 124469ec1e3SAneesh V {HDQ_SIO, (M3)}, /* gpio_127 */ 125469ec1e3SAneesh V {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ 126469ec1e3SAneesh V {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ 127469ec1e3SAneesh V {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */ 128469ec1e3SAneesh V {MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs0 */ 129469ec1e3SAneesh V {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* mcspi1_cs1 */ 130469ec1e3SAneesh V {MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_139 */ 131469ec1e3SAneesh V {MCSPI1_CS3, (PTU | IEN | M3)}, /* gpio_140 */ 132469ec1e3SAneesh V {SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc5_clk */ 133469ec1e3SAneesh V {SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_cmd */ 134469ec1e3SAneesh V {SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat0 */ 135469ec1e3SAneesh V {SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat1 */ 136469ec1e3SAneesh V {SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat2 */ 137469ec1e3SAneesh V {SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat3 */ 138469ec1e3SAneesh V {MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_clk */ 139469ec1e3SAneesh V {MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_simo */ 140469ec1e3SAneesh V {MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_somi */ 141469ec1e3SAneesh V {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_cs0 */ 142469ec1e3SAneesh V {UART4_RX, (IEN | M0)}, /* uart4_rx */ 143469ec1e3SAneesh V {UART4_TX, (M0)}, /* uart4_tx */ 144469ec1e3SAneesh V {USBB2_ULPITLL_CLK, (PTD | IEN | M3)}, /* gpio_157 */ 145469ec1e3SAneesh V {USBB2_ULPITLL_STP, (IEN | M5)}, /* dispc2_data23 */ 146469ec1e3SAneesh V {USBB2_ULPITLL_DIR, (IEN | M5)}, /* dispc2_data22 */ 147469ec1e3SAneesh V {USBB2_ULPITLL_NXT, (IEN | M5)}, /* dispc2_data21 */ 148469ec1e3SAneesh V {USBB2_ULPITLL_DAT0, (IEN | M5)}, /* dispc2_data20 */ 149469ec1e3SAneesh V {USBB2_ULPITLL_DAT1, (IEN | M5)}, /* dispc2_data19 */ 150469ec1e3SAneesh V {USBB2_ULPITLL_DAT2, (IEN | M5)}, /* dispc2_data18 */ 151469ec1e3SAneesh V {USBB2_ULPITLL_DAT3, (IEN | M5)}, /* dispc2_data15 */ 152469ec1e3SAneesh V {USBB2_ULPITLL_DAT4, (IEN | M5)}, /* dispc2_data14 */ 153469ec1e3SAneesh V {USBB2_ULPITLL_DAT5, (IEN | M5)}, /* dispc2_data13 */ 154469ec1e3SAneesh V {USBB2_ULPITLL_DAT6, (IEN | M5)}, /* dispc2_data12 */ 155469ec1e3SAneesh V {USBB2_ULPITLL_DAT7, (IEN | M5)}, /* dispc2_data11 */ 156469ec1e3SAneesh V {USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_169 */ 157469ec1e3SAneesh V {USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_170 */ 158469ec1e3SAneesh V {UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col0 */ 159469ec1e3SAneesh V {UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col1 */ 160469ec1e3SAneesh V {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */ 161469ec1e3SAneesh V {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */ 162469ec1e3SAneesh V {UNIPRO_TX2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col4 */ 163469ec1e3SAneesh V {UNIPRO_TY2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col5 */ 164469ec1e3SAneesh V {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */ 165469ec1e3SAneesh V {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */ 166469ec1e3SAneesh V {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */ 167469ec1e3SAneesh V {UNIPRO_RY1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row3 */ 168469ec1e3SAneesh V {UNIPRO_RX2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row4 */ 169469ec1e3SAneesh V {UNIPRO_RY2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row5 */ 170469ec1e3SAneesh V {USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ 171469ec1e3SAneesh V {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ 172469ec1e3SAneesh V {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ 173469ec1e3SAneesh V {FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */ 174469ec1e3SAneesh V {FREF_CLK2_OUT, (M0)}, /* fref_clk2_out */ 175469ec1e3SAneesh V {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ 176469ec1e3SAneesh V {SYS_NIRQ2, (M7)}, /* sys_nirq2 */ 177469ec1e3SAneesh V {SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */ 178469ec1e3SAneesh V {SYS_BOOT1, (M3)}, /* gpio_185 */ 179469ec1e3SAneesh V {SYS_BOOT2, (PTD | IEN | M3)}, /* gpio_186 */ 180469ec1e3SAneesh V {SYS_BOOT3, (PTD | IEN | M3)}, /* gpio_187 */ 181469ec1e3SAneesh V {SYS_BOOT4, (M3)}, /* gpio_188 */ 182469ec1e3SAneesh V {SYS_BOOT5, (PTD | IEN | M3)}, /* gpio_189 */ 183469ec1e3SAneesh V {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ 184469ec1e3SAneesh V {DPM_EMU1, (IEN | M0)}, /* dpm_emu1 */ 185469ec1e3SAneesh V {DPM_EMU2, (IEN | M0)}, /* dpm_emu2 */ 186469ec1e3SAneesh V {DPM_EMU3, (IEN | M5)}, /* dispc2_data10 */ 187469ec1e3SAneesh V {DPM_EMU4, (IEN | M5)}, /* dispc2_data9 */ 188469ec1e3SAneesh V {DPM_EMU5, (IEN | M5)}, /* dispc2_data16 */ 189469ec1e3SAneesh V {DPM_EMU6, (IEN | M5)}, /* dispc2_data17 */ 190469ec1e3SAneesh V {DPM_EMU7, (IEN | M5)}, /* dispc2_hsync */ 191469ec1e3SAneesh V {DPM_EMU8, (IEN | M5)}, /* dispc2_pclk */ 192469ec1e3SAneesh V {DPM_EMU9, (IEN | M5)}, /* dispc2_vsync */ 193469ec1e3SAneesh V {DPM_EMU10, (IEN | M5)}, /* dispc2_de */ 194469ec1e3SAneesh V {DPM_EMU11, (IEN | M5)}, /* dispc2_data8 */ 195469ec1e3SAneesh V {DPM_EMU12, (IEN | M5)}, /* dispc2_data7 */ 196469ec1e3SAneesh V {DPM_EMU13, (IEN | M5)}, /* dispc2_data6 */ 197469ec1e3SAneesh V {DPM_EMU14, (IEN | M5)}, /* dispc2_data5 */ 198469ec1e3SAneesh V {DPM_EMU15, (IEN | M5)}, /* dispc2_data4 */ 199469ec1e3SAneesh V {DPM_EMU16, (M3)}, /* gpio_27 */ 200469ec1e3SAneesh V {DPM_EMU17, (IEN | M5)}, /* dispc2_data2 */ 201469ec1e3SAneesh V {DPM_EMU18, (IEN | M5)}, /* dispc2_data1 */ 202469ec1e3SAneesh V {DPM_EMU19, (IEN | M5)}, /* dispc2_data0 */ 203469ec1e3SAneesh V }; 204469ec1e3SAneesh V 205469ec1e3SAneesh V const struct pad_conf_entry wkup_padconf_array_non_essential[] = { 206469ec1e3SAneesh V {PAD0_SIM_IO, (IEN | M0)}, /* sim_io */ 207469ec1e3SAneesh V {PAD1_SIM_CLK, (M0)}, /* sim_clk */ 208469ec1e3SAneesh V {PAD0_SIM_RESET, (M0)}, /* sim_reset */ 209469ec1e3SAneesh V {PAD1_SIM_CD, (PTU | IEN | M0)}, /* sim_cd */ 210469ec1e3SAneesh V {PAD0_SIM_PWRCTRL, (M0)}, /* sim_pwrctrl */ 211469ec1e3SAneesh V {PAD1_FREF_XTAL_IN, (M0)}, /* # */ 212469ec1e3SAneesh V {PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */ 213469ec1e3SAneesh V {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ 214469ec1e3SAneesh V {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ 215*43de24fdSAneesh V {PAD1_FREF_CLK3_REQ, (M3)}, /* gpio_wk30 - Debug led-1 */ 216469ec1e3SAneesh V {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ 217*43de24fdSAneesh V {PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 - Debug led-2 */ 218*43de24fdSAneesh V {PAD0_FREF_CLK4_OUT, (M3)}, /* gpio_wk8 - Debug led-3 */ 219469ec1e3SAneesh V {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ 220469ec1e3SAneesh V {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ 221469ec1e3SAneesh V {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ 222469ec1e3SAneesh V {PAD1_SYS_PWRON_RESET, (M3)}, /* gpio_wk29 */ 223469ec1e3SAneesh V {PAD0_SYS_BOOT6, (IEN | M3)}, /* gpio_wk9 */ 224469ec1e3SAneesh V {PAD1_SYS_BOOT7, (IEN | M3)}, /* gpio_wk10 */ 225469ec1e3SAneesh V }; 226469ec1e3SAneesh V 227469ec1e3SAneesh V #endif /* _SDP4430_MUX_DATA_H */ 228