1 /* 2 * (C) Copyright 2010 3 * Texas Instruments Incorporated, <www.ti.com> 4 * Steve Sakoman <steve@sakoman.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 #include <common.h> 25 #include <asm/arch/sys_proto.h> 26 #include <asm/arch/mmc_host_def.h> 27 #include <asm/arch/clocks.h> 28 #include <asm/arch/gpio.h> 29 30 #include "panda_mux_data.h" 31 32 #define PANDA_ULPI_PHY_TYPE_GPIO 182 33 34 DECLARE_GLOBAL_DATA_PTR; 35 36 const struct omap_sysinfo sysinfo = { 37 "Board: OMAP4 Panda\n" 38 }; 39 40 struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000; 41 42 /** 43 * @brief board_init 44 * 45 * @return 0 46 */ 47 int board_init(void) 48 { 49 gpmc_init(); 50 51 gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA; 52 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ 53 54 return 0; 55 } 56 57 int board_eth_init(bd_t *bis) 58 { 59 return 0; 60 } 61 62 /** 63 * @brief misc_init_r - Configure Panda board specific configurations 64 * such as power configurations, ethernet initialization as phase2 of 65 * boot sequence 66 * 67 * @return 0 68 */ 69 int misc_init_r(void) 70 { 71 int phy_type; 72 u32 auxclk, altclksrc; 73 74 /* EHCI is not supported on ES1.0 */ 75 if (omap_revision() == OMAP4430_ES1_0) 76 return 0; 77 78 gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO); 79 phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO); 80 81 if (phy_type == 1) { 82 /* ULPI PHY supplied by auxclk3 derived from sys_clk */ 83 debug("ULPI PHY supplied by auxclk3\n"); 84 85 auxclk = readl(&scrm->auxclk3); 86 /* Select sys_clk */ 87 auxclk &= ~AUXCLK_SRCSELECT_MASK; 88 auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT; 89 /* Set the divisor to 2 */ 90 auxclk &= ~AUXCLK_CLKDIV_MASK; 91 auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT; 92 /* Request auxilary clock #3 */ 93 auxclk |= AUXCLK_ENABLE_MASK; 94 95 writel(auxclk, &scrm->auxclk3); 96 } else { 97 /* ULPI PHY supplied by auxclk1 derived from PER dpll */ 98 debug("ULPI PHY supplied by auxclk1\n"); 99 100 auxclk = readl(&scrm->auxclk1); 101 /* Select per DPLL */ 102 auxclk &= ~AUXCLK_SRCSELECT_MASK; 103 auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT; 104 /* Set the divisor to 16 */ 105 auxclk &= ~AUXCLK_CLKDIV_MASK; 106 auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT; 107 /* Request auxilary clock #3 */ 108 auxclk |= AUXCLK_ENABLE_MASK; 109 110 writel(auxclk, &scrm->auxclk1); 111 } 112 113 altclksrc = readl(&scrm->altclksrc); 114 115 /* Activate alternate system clock supplier */ 116 altclksrc &= ~ALTCLKSRC_MODE_MASK; 117 altclksrc |= ALTCLKSRC_MODE_ACTIVE; 118 119 /* enable clocks */ 120 altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK; 121 122 writel(altclksrc, &scrm->altclksrc); 123 124 return 0; 125 } 126 127 void set_muxconf_regs_essential(void) 128 { 129 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential, 130 sizeof(core_padconf_array_essential) / 131 sizeof(struct pad_conf_entry)); 132 133 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential, 134 sizeof(wkup_padconf_array_essential) / 135 sizeof(struct pad_conf_entry)); 136 137 if (omap_revision() >= OMAP4460_ES1_0) 138 do_set_mux(CONTROL_PADCONF_WKUP, 139 wkup_padconf_array_essential_4460, 140 sizeof(wkup_padconf_array_essential_4460) / 141 sizeof(struct pad_conf_entry)); 142 } 143 144 void set_muxconf_regs_non_essential(void) 145 { 146 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential, 147 sizeof(core_padconf_array_non_essential) / 148 sizeof(struct pad_conf_entry)); 149 150 if (omap_revision() < OMAP4460_ES1_0) 151 do_set_mux(CONTROL_PADCONF_CORE, 152 core_padconf_array_non_essential_4430, 153 sizeof(core_padconf_array_non_essential_4430) / 154 sizeof(struct pad_conf_entry)); 155 else 156 do_set_mux(CONTROL_PADCONF_CORE, 157 core_padconf_array_non_essential_4460, 158 sizeof(core_padconf_array_non_essential_4460) / 159 sizeof(struct pad_conf_entry)); 160 161 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential, 162 sizeof(wkup_padconf_array_non_essential) / 163 sizeof(struct pad_conf_entry)); 164 165 if (omap_revision() < OMAP4460_ES1_0) 166 do_set_mux(CONTROL_PADCONF_WKUP, 167 wkup_padconf_array_non_essential_4430, 168 sizeof(wkup_padconf_array_non_essential_4430) / 169 sizeof(struct pad_conf_entry)); 170 } 171 172 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) 173 int board_mmc_init(bd_t *bis) 174 { 175 omap_mmc_init(0); 176 return 0; 177 } 178 #endif 179 180 /* 181 * get_board_rev() - get board revision 182 */ 183 u32 get_board_rev(void) 184 { 185 return 0x20; 186 } 187