1 /* 2 * (C) Copyright 2010 3 * Texas Instruments Incorporated, <www.ti.com> 4 * Steve Sakoman <steve@sakoman.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #include <common.h> 9 #include <asm/arch/sys_proto.h> 10 #include <asm/arch/mmc_host_def.h> 11 #include <asm/arch/clock.h> 12 #include <asm/arch/gpio.h> 13 #include <asm/gpio.h> 14 15 #include "panda_mux_data.h" 16 17 #ifdef CONFIG_USB_EHCI 18 #include <usb.h> 19 #include <asm/arch/ehci.h> 20 #include <asm/ehci-omap.h> 21 #endif 22 23 #define PANDA_ULPI_PHY_TYPE_GPIO 182 24 #define PANDA_BOARD_ID_1_GPIO 101 25 #define PANDA_ES_BOARD_ID_1_GPIO 48 26 #define PANDA_BOARD_ID_2_GPIO 171 27 #define PANDA_ES_BOARD_ID_3_GPIO 3 28 #define PANDA_ES_BOARD_ID_4_GPIO 2 29 30 DECLARE_GLOBAL_DATA_PTR; 31 32 const struct omap_sysinfo sysinfo = { 33 "Board: OMAP4 Panda\n" 34 }; 35 36 struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000; 37 38 /** 39 * @brief board_init 40 * 41 * @return 0 42 */ 43 int board_init(void) 44 { 45 gpmc_init(); 46 47 gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA; 48 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ 49 50 return 0; 51 } 52 53 int board_eth_init(bd_t *bis) 54 { 55 return 0; 56 } 57 58 /* 59 * Routine: get_board_revision 60 * Description: Detect if we are running on a panda revision A1-A6, 61 * or an ES panda board. This can be done by reading 62 * the level of GPIOs and checking the processor revisions. 63 * This should result in: 64 * Panda 4430: 65 * GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5 66 * GPIO171, GPIO101, GPIO182: 1 0 1 => A6 67 * Panda ES: 68 * GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2 69 * GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3 70 */ 71 int get_board_revision(void) 72 { 73 int board_id0, board_id1, board_id2; 74 int board_id3, board_id4; 75 int board_id; 76 77 int processor_rev = omap_revision(); 78 79 /* Setup the mux for the common board ID pins (gpio 171 and 182) */ 80 writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0); 81 writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT); 82 83 board_id0 = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO); 84 board_id2 = gpio_get_value(PANDA_BOARD_ID_2_GPIO); 85 86 if ((processor_rev >= OMAP4460_ES1_0 && 87 processor_rev <= OMAP4460_ES1_1)) { 88 /* 89 * Setup the mux for the ES specific board ID pins (gpio 101, 90 * 2 and 3. 91 */ 92 writew((IEN | M3), (*ctrl)->control_padconf_core_base + 93 GPMC_A24); 94 writew((IEN | M3), (*ctrl)->control_padconf_core_base + 95 UNIPRO_RY0); 96 writew((IEN | M3), (*ctrl)->control_padconf_core_base + 97 UNIPRO_RX1); 98 99 board_id1 = gpio_get_value(PANDA_ES_BOARD_ID_1_GPIO); 100 board_id3 = gpio_get_value(PANDA_ES_BOARD_ID_3_GPIO); 101 board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO); 102 103 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 104 setenv("board_name", strcat(CONFIG_SYS_BOARD, "-es")); 105 #endif 106 board_id = ((board_id4 << 4) | (board_id3 << 3) | 107 (board_id2 << 2) | (board_id1 << 1) | (board_id0)); 108 } else { 109 /* Setup the mux for the Ax specific board ID pins (gpio 101) */ 110 writew((IEN | M3), (*ctrl)->control_padconf_core_base + 111 FREF_CLK2_OUT); 112 113 board_id1 = gpio_get_value(PANDA_BOARD_ID_1_GPIO); 114 board_id = ((board_id2 << 2) | (board_id1 << 1) | (board_id0)); 115 116 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 117 if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3)) 118 setenv("board_name", strcat(CONFIG_SYS_BOARD, "-a4")); 119 #endif 120 } 121 122 return board_id; 123 } 124 125 /** 126 * @brief misc_init_r - Configure Panda board specific configurations 127 * such as power configurations, ethernet initialization as phase2 of 128 * boot sequence 129 * 130 * @return 0 131 */ 132 int misc_init_r(void) 133 { 134 int phy_type; 135 u32 auxclk, altclksrc; 136 137 /* EHCI is not supported on ES1.0 */ 138 if (omap_revision() == OMAP4430_ES1_0) 139 return 0; 140 141 get_board_revision(); 142 143 gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO); 144 phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO); 145 146 if (phy_type == 1) { 147 /* ULPI PHY supplied by auxclk3 derived from sys_clk */ 148 debug("ULPI PHY supplied by auxclk3\n"); 149 150 auxclk = readl(&scrm->auxclk3); 151 /* Select sys_clk */ 152 auxclk &= ~AUXCLK_SRCSELECT_MASK; 153 auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT; 154 /* Set the divisor to 2 */ 155 auxclk &= ~AUXCLK_CLKDIV_MASK; 156 auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT; 157 /* Request auxilary clock #3 */ 158 auxclk |= AUXCLK_ENABLE_MASK; 159 160 writel(auxclk, &scrm->auxclk3); 161 } else { 162 /* ULPI PHY supplied by auxclk1 derived from PER dpll */ 163 debug("ULPI PHY supplied by auxclk1\n"); 164 165 auxclk = readl(&scrm->auxclk1); 166 /* Select per DPLL */ 167 auxclk &= ~AUXCLK_SRCSELECT_MASK; 168 auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT; 169 /* Set the divisor to 16 */ 170 auxclk &= ~AUXCLK_CLKDIV_MASK; 171 auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT; 172 /* Request auxilary clock #3 */ 173 auxclk |= AUXCLK_ENABLE_MASK; 174 175 writel(auxclk, &scrm->auxclk1); 176 } 177 178 altclksrc = readl(&scrm->altclksrc); 179 180 /* Activate alternate system clock supplier */ 181 altclksrc &= ~ALTCLKSRC_MODE_MASK; 182 altclksrc |= ALTCLKSRC_MODE_ACTIVE; 183 184 /* enable clocks */ 185 altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK; 186 187 writel(altclksrc, &scrm->altclksrc); 188 189 return 0; 190 } 191 192 void set_muxconf_regs_essential(void) 193 { 194 do_set_mux((*ctrl)->control_padconf_core_base, 195 core_padconf_array_essential, 196 sizeof(core_padconf_array_essential) / 197 sizeof(struct pad_conf_entry)); 198 199 do_set_mux((*ctrl)->control_padconf_wkup_base, 200 wkup_padconf_array_essential, 201 sizeof(wkup_padconf_array_essential) / 202 sizeof(struct pad_conf_entry)); 203 204 if (omap_revision() >= OMAP4460_ES1_0) 205 do_set_mux((*ctrl)->control_padconf_wkup_base, 206 wkup_padconf_array_essential_4460, 207 sizeof(wkup_padconf_array_essential_4460) / 208 sizeof(struct pad_conf_entry)); 209 } 210 211 void set_muxconf_regs_non_essential(void) 212 { 213 do_set_mux((*ctrl)->control_padconf_core_base, 214 core_padconf_array_non_essential, 215 sizeof(core_padconf_array_non_essential) / 216 sizeof(struct pad_conf_entry)); 217 218 if (omap_revision() < OMAP4460_ES1_0) 219 do_set_mux((*ctrl)->control_padconf_core_base, 220 core_padconf_array_non_essential_4430, 221 sizeof(core_padconf_array_non_essential_4430) / 222 sizeof(struct pad_conf_entry)); 223 else 224 do_set_mux((*ctrl)->control_padconf_core_base, 225 core_padconf_array_non_essential_4460, 226 sizeof(core_padconf_array_non_essential_4460) / 227 sizeof(struct pad_conf_entry)); 228 229 do_set_mux((*ctrl)->control_padconf_wkup_base, 230 wkup_padconf_array_non_essential, 231 sizeof(wkup_padconf_array_non_essential) / 232 sizeof(struct pad_conf_entry)); 233 234 if (omap_revision() < OMAP4460_ES1_0) 235 do_set_mux((*ctrl)->control_padconf_wkup_base, 236 wkup_padconf_array_non_essential_4430, 237 sizeof(wkup_padconf_array_non_essential_4430) / 238 sizeof(struct pad_conf_entry)); 239 } 240 241 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) 242 int board_mmc_init(bd_t *bis) 243 { 244 return omap_mmc_init(0, 0, 0, -1, -1); 245 } 246 #endif 247 248 #ifdef CONFIG_USB_EHCI 249 250 static struct omap_usbhs_board_data usbhs_bdata = { 251 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 252 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, 253 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 254 }; 255 256 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) 257 { 258 int ret; 259 unsigned int utmi_clk; 260 261 /* Now we can enable our port clocks */ 262 utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL); 263 utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK; 264 sr32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, 0, 32, utmi_clk); 265 266 ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor); 267 if (ret < 0) 268 return ret; 269 270 return 0; 271 } 272 273 int ehci_hcd_stop(int index) 274 { 275 return omap_ehci_hcd_stop(); 276 } 277 #endif 278 279 /* 280 * get_board_rev() - get board revision 281 */ 282 u32 get_board_rev(void) 283 { 284 return 0x20; 285 } 286