1 /* 2 * (C) Copyright 2010 3 * Texas Instruments Incorporated, <www.ti.com> 4 * Aneesh V <aneesh@ti.com> 5 * Steve Sakoman <steve@sakoman.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 #include <common.h> 10 #include <palmas.h> 11 #include <asm/arch/omap.h> 12 #include <asm/arch/sys_proto.h> 13 #include <asm/arch/mmc_host_def.h> 14 #include <tca642x.h> 15 #include <usb.h> 16 #include <linux/usb/gadget.h> 17 #include <dwc3-uboot.h> 18 #include <dwc3-omap-uboot.h> 19 #include <ti-usb-phy-uboot.h> 20 21 #include "mux_data.h" 22 23 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP) 24 #include <sata.h> 25 #include <usb.h> 26 #include <asm/gpio.h> 27 #include <asm/mach-types.h> 28 #include <asm/arch/clock.h> 29 #include <asm/arch/ehci.h> 30 #include <asm/ehci-omap.h> 31 #include <asm/arch/sata.h> 32 33 #define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000) 34 #define DIE_ID_REG_OFFSET 0x200 35 36 #endif 37 38 DECLARE_GLOBAL_DATA_PTR; 39 40 const struct omap_sysinfo sysinfo = { 41 "Board: OMAP5432 uEVM\n" 42 }; 43 44 /** 45 * @brief tca642x_init - uEVM default values for the GPIO expander 46 * input reg, output reg, polarity reg, configuration reg 47 */ 48 struct tca642x_bank_info tca642x_init[] = { 49 { .input_reg = 0x00, 50 .output_reg = 0x04, 51 .polarity_reg = 0x00, 52 .configuration_reg = 0x80 }, 53 { .input_reg = 0x00, 54 .output_reg = 0x00, 55 .polarity_reg = 0x00, 56 .configuration_reg = 0xff }, 57 { .input_reg = 0x00, 58 .output_reg = 0x00, 59 .polarity_reg = 0x00, 60 .configuration_reg = 0x40 }, 61 }; 62 63 #ifdef CONFIG_USB_DWC3 64 static struct dwc3_device usb_otg_ss = { 65 .maximum_speed = USB_SPEED_SUPER, 66 .base = OMAP5XX_USB_OTG_SS_BASE, 67 .tx_fifo_resize = false, 68 .index = 0, 69 }; 70 71 static struct dwc3_omap_device usb_otg_ss_glue = { 72 .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE, 73 .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, 74 .index = 0, 75 }; 76 77 static struct ti_usb_phy_device usb_phy_device = { 78 .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL, 79 .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER, 80 .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER, 81 .index = 0, 82 }; 83 84 int board_usb_init(int index, enum usb_init_type init) 85 { 86 if (index) { 87 printf("Invalid Controller Index\n"); 88 return -EINVAL; 89 } 90 91 if (init == USB_INIT_DEVICE) { 92 usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL; 93 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; 94 } else { 95 usb_otg_ss.dr_mode = USB_DR_MODE_HOST; 96 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND; 97 } 98 99 enable_usb_clocks(index); 100 ti_usb_phy_uboot_init(&usb_phy_device); 101 dwc3_omap_uboot_init(&usb_otg_ss_glue); 102 dwc3_uboot_init(&usb_otg_ss); 103 104 return 0; 105 } 106 107 int board_usb_cleanup(int index, enum usb_init_type init) 108 { 109 if (index) { 110 printf("Invalid Controller Index\n"); 111 return -EINVAL; 112 } 113 114 ti_usb_phy_uboot_exit(index); 115 dwc3_uboot_exit(index); 116 dwc3_omap_uboot_exit(index); 117 disable_usb_clocks(index); 118 119 return 0; 120 } 121 122 int usb_gadget_handle_interrupts(int index) 123 { 124 u32 status; 125 126 status = dwc3_omap_uboot_interrupt_status(index); 127 if (status) 128 dwc3_uboot_handle_interrupt(index); 129 130 return 0; 131 } 132 #endif 133 134 /** 135 * @brief board_init 136 * 137 * @return 0 138 */ 139 int board_init(void) 140 { 141 gpmc_init(); 142 gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM; 143 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ 144 145 tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init); 146 147 return 0; 148 } 149 150 int board_eth_init(bd_t *bis) 151 { 152 return 0; 153 } 154 155 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP) 156 static void enable_host_clocks(void) 157 { 158 int auxclk; 159 int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK | 160 OPTFCLKEN_HSIC480M_P3_CLK | 161 OPTFCLKEN_HSIC60M_P2_CLK | 162 OPTFCLKEN_HSIC480M_P2_CLK | 163 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK); 164 165 /* Enable port 2 and 3 clocks*/ 166 setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val); 167 168 /* Enable port 2 and 3 usb host ports tll clocks*/ 169 setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, 170 (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE)); 171 #ifdef CONFIG_USB_XHCI_OMAP 172 /* Enable the USB OTG Super speed clocks */ 173 setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl, 174 (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW)); 175 #endif 176 177 auxclk = readl((*prcm)->scrm_auxclk1); 178 /* Request auxilary clock */ 179 auxclk |= AUXCLK_ENABLE_MASK; 180 writel(auxclk, (*prcm)->scrm_auxclk1); 181 } 182 #endif 183 184 /** 185 * @brief misc_init_r - Configure EVM board specific configurations 186 * such as power configurations, ethernet initialization as phase2 of 187 * boot sequence 188 * 189 * @return 0 190 */ 191 int misc_init_r(void) 192 { 193 #ifdef CONFIG_PALMAS_POWER 194 palmas_init_settings(); 195 #endif 196 197 omap_die_id_usbethaddr(); 198 199 return 0; 200 } 201 202 void set_muxconf_regs(void) 203 { 204 do_set_mux((*ctrl)->control_padconf_core_base, 205 core_padconf_array_essential, 206 sizeof(core_padconf_array_essential) / 207 sizeof(struct pad_conf_entry)); 208 209 do_set_mux((*ctrl)->control_padconf_wkup_base, 210 wkup_padconf_array_essential, 211 sizeof(wkup_padconf_array_essential) / 212 sizeof(struct pad_conf_entry)); 213 } 214 215 #if defined(CONFIG_MMC) 216 int board_mmc_init(bd_t *bis) 217 { 218 omap_mmc_init(0, 0, 0, -1, -1); 219 omap_mmc_init(1, 0, 0, -1, -1); 220 return 0; 221 } 222 #endif 223 224 #ifdef CONFIG_USB_EHCI_HCD 225 static struct omap_usbhs_board_data usbhs_bdata = { 226 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, 227 .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC, 228 .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC, 229 }; 230 231 int ehci_hcd_init(int index, enum usb_init_type init, 232 struct ehci_hccr **hccr, struct ehci_hcor **hcor) 233 { 234 int ret; 235 236 enable_host_clocks(); 237 238 ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); 239 if (ret < 0) { 240 puts("Failed to initialize ehci\n"); 241 return ret; 242 } 243 244 return 0; 245 } 246 247 int ehci_hcd_stop(void) 248 { 249 return omap_ehci_hcd_stop(); 250 } 251 252 void usb_hub_reset_devices(struct usb_hub_device *hub, int port) 253 { 254 /* The LAN9730 needs to be reset after the port power has been set. */ 255 if (port == 3) { 256 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0); 257 udelay(10); 258 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1); 259 } 260 } 261 #endif 262 263 #ifdef CONFIG_USB_XHCI_OMAP 264 /** 265 * @brief board_usb_init - Configure EVM board specific configurations 266 * for the LDO's and clocks for the USB blocks. 267 * 268 * @return 0 269 */ 270 int board_usb_init(int index, enum usb_init_type init) 271 { 272 int ret; 273 #ifdef CONFIG_PALMAS_USB_SS_PWR 274 ret = palmas_enable_ss_ldo(); 275 #endif 276 277 enable_host_clocks(); 278 279 return 0; 280 } 281 #endif 282