1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Keystone2: DDR3 initialization 4 * 5 * (C) Copyright 2014 6 * Texas Instruments Incorporated, <www.ti.com> 7 */ 8 9 #include <common.h> 10 #include "ddr3_cfg.h" 11 #include <asm/arch/ddr3.h> 12 13 static struct pll_init_data ddr3_400 = DDR3_PLL_400; 14 15 u32 ddr3_init(void) 16 { 17 init_pll(&ddr3_400); 18 19 /* No SO-DIMM, 2GB discreet DDR */ 20 printf("DRAM: 2 GiB\n"); 21 22 /* Reset DDR3 PHY after PLL enabled */ 23 ddr3_reset_ddrphy(); 24 25 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g); 26 ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g); 27 28 return 2; 29 } 30