1 /* 2 * Keystone2: DDR3 initialization 3 * 4 * (C) Copyright 2014 5 * Texas Instruments Incorporated, <www.ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include "ddr3_cfg.h" 12 #include <asm/arch/ddr3.h> 13 14 static struct pll_init_data ddr3_400 = DDR3_PLL_400; 15 16 u32 ddr3_init(void) 17 { 18 init_pll(&ddr3_400); 19 20 /* No SO-DIMM, 2GB discreet DDR */ 21 printf("DRAM: 2 GiB\n"); 22 23 /* Reset DDR3 PHY after PLL enabled */ 24 ddr3_reset_ddrphy(); 25 26 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g); 27 ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g); 28 29 return 2; 30 } 31