1 /* 2 * K2L EVM : Board initialization 3 * 4 * (C) Copyright 2014 5 * Texas Instruments Incorporated, <www.ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <asm/arch/ddr3.h> 12 #include <asm/arch/hardware.h> 13 #include <asm/ti-common/keystone_net.h> 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 unsigned int external_clk[ext_clk_count] = { 18 [sys_clk] = 122880000, 19 [alt_core_clk] = 100000000, 20 [pa_clk] = 122880000, 21 [tetris_clk] = 122880000, 22 [ddr3a_clk] = 100000000, 23 }; 24 25 static struct pll_init_data core_pll_config[NUM_SPDS] = { 26 [SPD800] = CORE_PLL_799, 27 [SPD1000] = CORE_PLL_1000, 28 [SPD1200] = CORE_PLL_1198, 29 }; 30 31 s16 divn_val[16] = { 32 0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 33 }; 34 35 static struct pll_init_data tetris_pll_config[] = { 36 [SPD800] = TETRIS_PLL_799, 37 [SPD1000] = TETRIS_PLL_1000, 38 [SPD1200] = TETRIS_PLL_1198, 39 [SPD1350] = TETRIS_PLL_1352, 40 [SPD1400] = TETRIS_PLL_1401, 41 }; 42 43 static struct pll_init_data pa_pll_config = 44 PASS_PLL_983; 45 46 struct pll_init_data *get_pll_init_data(int pll) 47 { 48 int speed; 49 struct pll_init_data *data; 50 51 switch (pll) { 52 case MAIN_PLL: 53 speed = get_max_dev_speed(); 54 data = &core_pll_config[speed]; 55 break; 56 case TETRIS_PLL: 57 speed = get_max_arm_speed(); 58 data = &tetris_pll_config[speed]; 59 break; 60 case PASS_PLL: 61 data = &pa_pll_config; 62 break; 63 default: 64 data = NULL; 65 } 66 67 return data; 68 } 69 70 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET 71 struct eth_priv_t eth_priv_cfg[] = { 72 { 73 .int_name = "K2L_EMAC", 74 .rx_flow = 0, 75 .phy_addr = 0, 76 .slave_port = 1, 77 .sgmii_link_type = SGMII_LINK_MAC_PHY, 78 }, 79 { 80 .int_name = "K2L_EMAC1", 81 .rx_flow = 8, 82 .phy_addr = 1, 83 .slave_port = 2, 84 .sgmii_link_type = SGMII_LINK_MAC_PHY, 85 }, 86 { 87 .int_name = "K2L_EMAC2", 88 .rx_flow = 16, 89 .phy_addr = 2, 90 .slave_port = 3, 91 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, 92 }, 93 { 94 .int_name = "K2L_EMAC3", 95 .rx_flow = 32, 96 .phy_addr = 3, 97 .slave_port = 4, 98 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, 99 }, 100 }; 101 102 int get_num_eth_ports(void) 103 { 104 return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t); 105 } 106 #endif 107 108 #ifdef CONFIG_BOARD_EARLY_INIT_F 109 int board_early_init_f(void) 110 { 111 init_plls(); 112 113 return 0; 114 } 115 #endif 116 117 #ifdef CONFIG_SPL_BUILD 118 void spl_init_keystone_plls(void) 119 { 120 init_plls(); 121 } 122 #endif 123