xref: /openbmc/u-boot/board/ti/ks2_evm/board_k2l.c (revision 796bcee6)
1345af534SHao Zhang /*
2345af534SHao Zhang  * K2L EVM : Board initialization
3345af534SHao Zhang  *
4345af534SHao Zhang  * (C) Copyright 2014
5345af534SHao Zhang  *     Texas Instruments Incorporated, <www.ti.com>
6345af534SHao Zhang  *
7345af534SHao Zhang  * SPDX-License-Identifier:     GPL-2.0+
8345af534SHao Zhang  */
9345af534SHao Zhang 
10345af534SHao Zhang #include <common.h>
11345af534SHao Zhang #include <asm/arch/ddr3.h>
12345af534SHao Zhang #include <asm/arch/hardware.h>
13*796bcee6SHao Zhang #include <asm/ti-common/keystone_net.h>
14345af534SHao Zhang 
15345af534SHao Zhang DECLARE_GLOBAL_DATA_PTR;
16345af534SHao Zhang 
17345af534SHao Zhang unsigned int external_clk[ext_clk_count] = {
18345af534SHao Zhang 	[sys_clk]	= 122880000,
19345af534SHao Zhang 	[alt_core_clk]	= 100000000,
20345af534SHao Zhang 	[pa_clk]	= 122880000,
21345af534SHao Zhang 	[tetris_clk]	= 122880000,
22345af534SHao Zhang 	[ddr3_clk]	= 100000000,
23345af534SHao Zhang 	[pcie_clk]	= 100000000,
24345af534SHao Zhang 	[sgmii_clk]	= 156250000,
25345af534SHao Zhang 	[usb_clk]	= 100000000,
26345af534SHao Zhang };
27345af534SHao Zhang 
28345af534SHao Zhang static struct pll_init_data core_pll_config[] = {
29345af534SHao Zhang 	CORE_PLL_799,
30345af534SHao Zhang 	CORE_PLL_1000,
31345af534SHao Zhang 	CORE_PLL_1198,
32345af534SHao Zhang };
33345af534SHao Zhang 
34345af534SHao Zhang static struct pll_init_data tetris_pll_config[] = {
35345af534SHao Zhang 	TETRIS_PLL_799,
36345af534SHao Zhang 	TETRIS_PLL_1000,
37345af534SHao Zhang 	TETRIS_PLL_1198,
38345af534SHao Zhang 	TETRIS_PLL_1352,
39345af534SHao Zhang 	TETRIS_PLL_1401,
40345af534SHao Zhang };
41345af534SHao Zhang 
42345af534SHao Zhang static struct pll_init_data pa_pll_config =
43345af534SHao Zhang 	PASS_PLL_983;
44345af534SHao Zhang 
45*796bcee6SHao Zhang #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
46*796bcee6SHao Zhang struct eth_priv_t eth_priv_cfg[] = {
47*796bcee6SHao Zhang 	{
48*796bcee6SHao Zhang 		.int_name        = "K2L_EMAC",
49*796bcee6SHao Zhang 		.rx_flow         = 0,
50*796bcee6SHao Zhang 		.phy_addr        = 0,
51*796bcee6SHao Zhang 		.slave_port      = 1,
52*796bcee6SHao Zhang 		.sgmii_link_type = SGMII_LINK_MAC_PHY,
53*796bcee6SHao Zhang 	},
54*796bcee6SHao Zhang 	{
55*796bcee6SHao Zhang 		.int_name        = "K2L_EMAC1",
56*796bcee6SHao Zhang 		.rx_flow         = 8,
57*796bcee6SHao Zhang 		.phy_addr        = 1,
58*796bcee6SHao Zhang 		.slave_port      = 2,
59*796bcee6SHao Zhang 		.sgmii_link_type = SGMII_LINK_MAC_PHY,
60*796bcee6SHao Zhang 	},
61*796bcee6SHao Zhang 	{
62*796bcee6SHao Zhang 		.int_name        = "K2L_EMAC2",
63*796bcee6SHao Zhang 		.rx_flow         = 16,
64*796bcee6SHao Zhang 		.phy_addr        = 2,
65*796bcee6SHao Zhang 		.slave_port      = 3,
66*796bcee6SHao Zhang 		.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
67*796bcee6SHao Zhang 	},
68*796bcee6SHao Zhang 	{
69*796bcee6SHao Zhang 		.int_name        = "K2L_EMAC3",
70*796bcee6SHao Zhang 		.rx_flow         = 32,
71*796bcee6SHao Zhang 		.phy_addr        = 3,
72*796bcee6SHao Zhang 		.slave_port      = 4,
73*796bcee6SHao Zhang 		.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
74*796bcee6SHao Zhang 	},
75*796bcee6SHao Zhang };
76*796bcee6SHao Zhang 
77*796bcee6SHao Zhang int get_num_eth_ports(void)
78*796bcee6SHao Zhang {
79*796bcee6SHao Zhang 	return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
80*796bcee6SHao Zhang }
81*796bcee6SHao Zhang #endif
82*796bcee6SHao Zhang 
83345af534SHao Zhang #ifdef CONFIG_BOARD_EARLY_INIT_F
84345af534SHao Zhang int board_early_init_f(void)
85345af534SHao Zhang {
86345af534SHao Zhang 	int speed;
87345af534SHao Zhang 
88345af534SHao Zhang 	speed = get_max_dev_speed();
89345af534SHao Zhang 	init_pll(&core_pll_config[speed]);
90345af534SHao Zhang 
91345af534SHao Zhang 	init_pll(&pa_pll_config);
92345af534SHao Zhang 
93345af534SHao Zhang 	speed = get_max_arm_speed();
94345af534SHao Zhang 	init_pll(&tetris_pll_config[speed]);
95345af534SHao Zhang 
96345af534SHao Zhang 	return 0;
97345af534SHao Zhang }
98345af534SHao Zhang #endif
99345af534SHao Zhang 
100345af534SHao Zhang #ifdef CONFIG_SPL_BUILD
101345af534SHao Zhang static struct pll_init_data spl_pll_config[] = {
102345af534SHao Zhang 	CORE_PLL_799,
103345af534SHao Zhang 	TETRIS_PLL_491,
104345af534SHao Zhang };
105345af534SHao Zhang 
106345af534SHao Zhang void spl_init_keystone_plls(void)
107345af534SHao Zhang {
108345af534SHao Zhang 	init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
109345af534SHao Zhang }
110345af534SHao Zhang #endif
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