1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2004-2011 4 * Texas Instruments, <www.ti.com> 5 * 6 * Author : 7 * Manikandan Pillai <mani.pillai@ti.com> 8 * 9 * Derived from Beagle Board and 3430 SDP code by 10 * Richard Woodruff <r-woodruff2@ti.com> 11 * Syed Mohammed Khasim <khasim@ti.com> 12 */ 13 #include <common.h> 14 #include <dm.h> 15 #include <ns16550.h> 16 #include <netdev.h> 17 #include <asm/io.h> 18 #include <asm/arch/mem.h> 19 #include <asm/arch/mux.h> 20 #include <asm/arch/sys_proto.h> 21 #include <asm/arch/mmc_host_def.h> 22 #include <asm/gpio.h> 23 #include <i2c.h> 24 #include <twl4030.h> 25 #include <asm/mach-types.h> 26 #include <asm/omap_musb.h> 27 #include <linux/mtd/rawnand.h> 28 #include <linux/usb/ch9.h> 29 #include <linux/usb/gadget.h> 30 #include <linux/usb/musb.h> 31 #include "evm.h" 32 33 #ifdef CONFIG_USB_EHCI_HCD 34 #include <usb.h> 35 #include <asm/ehci-omap.h> 36 #endif 37 38 #define OMAP3EVM_GPIO_ETH_RST_GEN1 64 39 #define OMAP3EVM_GPIO_ETH_RST_GEN2 7 40 41 DECLARE_GLOBAL_DATA_PTR; 42 43 static u32 omap3_evm_version; 44 45 u32 get_omap3_evm_rev(void) 46 { 47 return omap3_evm_version; 48 } 49 50 static void omap3_evm_get_revision(void) 51 { 52 #if defined(CONFIG_CMD_NET) 53 /* 54 * Board revision can be ascertained only by identifying 55 * the Ethernet chipset. 56 */ 57 unsigned int smsc_id; 58 59 /* Ethernet PHY ID is stored at ID_REV register */ 60 smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000; 61 printf("Read back SMSC id 0x%x\n", smsc_id); 62 63 switch (smsc_id) { 64 /* SMSC9115 chipset */ 65 case 0x01150000: 66 omap3_evm_version = OMAP3EVM_BOARD_GEN_1; 67 break; 68 /* SMSC 9220 chipset */ 69 case 0x92200000: 70 default: 71 omap3_evm_version = OMAP3EVM_BOARD_GEN_2; 72 } 73 #else /* !CONFIG_CMD_NET */ 74 #if defined(CONFIG_STATIC_BOARD_REV) 75 /* Look for static defintion of the board revision */ 76 omap3_evm_version = CONFIG_STATIC_BOARD_REV; 77 #else 78 /* Fallback to the default above */ 79 omap3_evm_version = OMAP3EVM_BOARD_GEN_2; 80 #endif /* CONFIG_STATIC_BOARD_REV */ 81 #endif /* CONFIG_CMD_NET */ 82 } 83 84 #if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST) 85 /* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */ 86 u8 omap3_evm_need_extvbus(void) 87 { 88 u8 retval = 0; 89 90 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) 91 retval = 1; 92 93 return retval; 94 } 95 #endif /* CONFIG_USB_MUSB_{GADGET,HOST} */ 96 97 /* 98 * Routine: board_init 99 * Description: Early hardware init. 100 */ 101 int board_init(void) 102 { 103 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 104 /* board id for Linux */ 105 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM; 106 /* boot param addr */ 107 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 108 109 return 0; 110 } 111 112 #if defined(CONFIG_SPL_OS_BOOT) 113 int spl_start_uboot(void) 114 { 115 /* break into full u-boot on 'c' */ 116 if (serial_tstc() && serial_getc() == 'c') 117 return 1; 118 119 return 0; 120 } 121 #endif /* CONFIG_SPL_OS_BOOT */ 122 123 #if defined(CONFIG_SPL_BUILD) 124 /* 125 * Routine: get_board_mem_timings 126 * Description: If we use SPL then there is no x-loader nor config header 127 * so we have to setup the DDR timings ourself on the first bank. This 128 * provides the timing values back to the function that configures 129 * the memory. 130 */ 131 void get_board_mem_timings(struct board_sdrc_timings *timings) 132 { 133 int pop_mfr, pop_id; 134 135 /* 136 * We need to identify what PoP memory is on the board so that 137 * we know what timings to use. To map the ID values please see 138 * nand_ids.c 139 */ 140 identify_nand_chip(&pop_mfr, &pop_id); 141 142 if (pop_mfr == NAND_MFR_HYNIX && pop_id == 0xbc) { 143 /* 256MB DDR */ 144 timings->mcfg = HYNIX_V_MCFG_200(256 << 20); 145 timings->ctrla = HYNIX_V_ACTIMA_200; 146 timings->ctrlb = HYNIX_V_ACTIMB_200; 147 } else { 148 /* 128MB DDR */ 149 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 150 timings->ctrla = MICRON_V_ACTIMA_165; 151 timings->ctrlb = MICRON_V_ACTIMB_165; 152 } 153 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 154 timings->mr = MICRON_V_MR_165; 155 } 156 #endif /* CONFIG_SPL_BUILD */ 157 158 #if defined(CONFIG_USB_MUSB_OMAP2PLUS) 159 static struct musb_hdrc_config musb_config = { 160 .multipoint = 1, 161 .dyn_fifo = 1, 162 .num_eps = 16, 163 .ram_bits = 12, 164 }; 165 166 static struct omap_musb_board_data musb_board_data = { 167 .interface_type = MUSB_INTERFACE_ULPI, 168 }; 169 170 static struct musb_hdrc_platform_data musb_plat = { 171 #if defined(CONFIG_USB_MUSB_HOST) 172 .mode = MUSB_HOST, 173 #elif defined(CONFIG_USB_MUSB_GADGET) 174 .mode = MUSB_PERIPHERAL, 175 #else 176 #error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET" 177 #endif /* CONFIG_USB_MUSB_{GADGET,HOST} */ 178 .config = &musb_config, 179 .power = 100, 180 .platform_ops = &omap2430_ops, 181 .board_data = &musb_board_data, 182 }; 183 #endif /* CONFIG_USB_MUSB_OMAP2PLUS */ 184 185 /* 186 * Routine: misc_init_r 187 * Description: Init ethernet (done here so udelay works) 188 */ 189 int misc_init_r(void) 190 { 191 twl4030_power_init(); 192 193 #ifdef CONFIG_SYS_I2C_OMAP24XX 194 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); 195 #endif 196 197 #if defined(CONFIG_CMD_NET) 198 setup_net_chip(); 199 #endif 200 omap3_evm_get_revision(); 201 202 #if defined(CONFIG_CMD_NET) 203 reset_net_chip(); 204 #endif 205 omap_die_id_display(); 206 207 #if defined(CONFIG_USB_MUSB_OMAP2PLUS) 208 musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); 209 #endif 210 211 #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) 212 omap_die_id_usbethaddr(); 213 #endif 214 return 0; 215 } 216 217 /* 218 * Routine: set_muxconf_regs 219 * Description: Setting up the configuration Mux registers specific to the 220 * hardware. Many pins need to be moved from protect to primary 221 * mode. 222 */ 223 void set_muxconf_regs(void) 224 { 225 MUX_EVM(); 226 } 227 228 #if defined(CONFIG_CMD_NET) 229 /* 230 * Routine: setup_net_chip 231 * Description: Setting up the configuration GPMC registers specific to the 232 * Ethernet hardware. 233 */ 234 static void setup_net_chip(void) 235 { 236 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; 237 238 /* Configure GPMC registers */ 239 writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1); 240 writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2); 241 writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3); 242 writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4); 243 writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5); 244 writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6); 245 writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7); 246 247 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ 248 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); 249 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ 250 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); 251 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ 252 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, 253 &ctrl_base->gpmc_nadv_ale); 254 } 255 256 /** 257 * Reset the ethernet chip. 258 */ 259 static void reset_net_chip(void) 260 { 261 int ret; 262 int rst_gpio; 263 264 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) { 265 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1; 266 } else { 267 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2; 268 } 269 270 ret = gpio_request(rst_gpio, ""); 271 if (ret < 0) { 272 printf("Unable to get GPIO %d\n", rst_gpio); 273 return ; 274 } 275 276 /* Configure as output */ 277 gpio_direction_output(rst_gpio, 0); 278 279 /* Send a pulse on the GPIO pin */ 280 gpio_set_value(rst_gpio, 1); 281 udelay(1); 282 gpio_set_value(rst_gpio, 0); 283 udelay(1); 284 gpio_set_value(rst_gpio, 1); 285 } 286 287 int board_eth_init(bd_t *bis) 288 { 289 #if defined(CONFIG_SMC911X) 290 env_set("ethaddr", NULL); 291 return smc911x_initialize(0, CONFIG_SMC911X_BASE); 292 #else 293 return 0; 294 #endif 295 } 296 #endif /* CONFIG_CMD_NET */ 297 298 #if defined(CONFIG_MMC) 299 int board_mmc_init(bd_t *bis) 300 { 301 return omap_mmc_init(0, 0, 0, -1, -1); 302 } 303 304 void board_mmc_power_init(void) 305 { 306 twl4030_power_mmc_init(0); 307 } 308 #endif /* CONFIG_MMC */ 309 310 #if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD) 311 /* Call usb_stop() before starting the kernel */ 312 void show_boot_progress(int val) 313 { 314 if (val == BOOTSTAGE_ID_RUN_OS) 315 usb_stop(); 316 } 317 318 static struct omap_usbhs_board_data usbhs_bdata = { 319 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, 320 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 321 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED 322 }; 323 324 int ehci_hcd_init(int index, enum usb_init_type init, 325 struct ehci_hccr **hccr, struct ehci_hcor **hcor) 326 { 327 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); 328 } 329 330 int ehci_hcd_stop(int index) 331 { 332 return omap_ehci_hcd_stop(); 333 } 334 #endif /* CONFIG_USB_EHCI_HCD */ 335 336 #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET) 337 int board_eth_init(bd_t *bis) 338 { 339 return usb_eth_initialize(bis); 340 } 341 #endif /* CONFIG_USB_ETHER */ 342