1 /* 2 * (C) Copyright 2004-2008 3 * Texas Instruments, <www.ti.com> 4 * 5 * Author : 6 * Manikandan Pillai <mani.pillai@ti.com> 7 * 8 * Derived from Beagle Board and 3430 SDP code by 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <khasim@ti.com> 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 #include <common.h> 31 #include <netdev.h> 32 #include <asm/io.h> 33 #include <asm/arch/mem.h> 34 #include <asm/arch/mux.h> 35 #include <asm/arch/sys_proto.h> 36 #include <asm/arch/mmc_host_def.h> 37 #include <asm/gpio.h> 38 #include <i2c.h> 39 #include <asm/mach-types.h> 40 #include "evm.h" 41 42 #define OMAP3EVM_GPIO_ETH_RST_GEN1 64 43 #define OMAP3EVM_GPIO_ETH_RST_GEN2 7 44 45 DECLARE_GLOBAL_DATA_PTR; 46 47 static u32 omap3_evm_version; 48 49 u32 get_omap3_evm_rev(void) 50 { 51 return omap3_evm_version; 52 } 53 54 static void omap3_evm_get_revision(void) 55 { 56 #if defined(CONFIG_CMD_NET) 57 /* 58 * Board revision can be ascertained only by identifying 59 * the Ethernet chipset. 60 */ 61 unsigned int smsc_id; 62 63 /* Ethernet PHY ID is stored at ID_REV register */ 64 smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000; 65 printf("Read back SMSC id 0x%x\n", smsc_id); 66 67 switch (smsc_id) { 68 /* SMSC9115 chipset */ 69 case 0x01150000: 70 omap3_evm_version = OMAP3EVM_BOARD_GEN_1; 71 break; 72 /* SMSC 9220 chipset */ 73 case 0x92200000: 74 default: 75 omap3_evm_version = OMAP3EVM_BOARD_GEN_2; 76 } 77 #else 78 #if defined(CONFIG_STATIC_BOARD_REV) 79 /* 80 * Look for static defintion of the board revision 81 */ 82 omap3_evm_version = CONFIG_STATIC_BOARD_REV; 83 #else 84 /* 85 * Fallback to the default above. 86 */ 87 omap3_evm_version = OMAP3EVM_BOARD_GEN_2; 88 #endif 89 #endif /* CONFIG_CMD_NET */ 90 } 91 92 #ifdef CONFIG_USB_OMAP3 93 /* 94 * MUSB port on OMAP3EVM Rev >= E requires extvbus programming. 95 */ 96 u8 omap3_evm_need_extvbus(void) 97 { 98 u8 retval = 0; 99 100 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) 101 retval = 1; 102 103 return retval; 104 } 105 #endif 106 107 /* 108 * Routine: board_init 109 * Description: Early hardware init. 110 */ 111 int board_init(void) 112 { 113 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 114 /* board id for Linux */ 115 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM; 116 /* boot param addr */ 117 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 118 119 return 0; 120 } 121 122 /* 123 * Routine: misc_init_r 124 * Description: Init ethernet (done here so udelay works) 125 */ 126 int misc_init_r(void) 127 { 128 129 #ifdef CONFIG_DRIVER_OMAP34XX_I2C 130 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 131 #endif 132 133 #if defined(CONFIG_CMD_NET) 134 setup_net_chip(); 135 #endif 136 omap3_evm_get_revision(); 137 138 #if defined(CONFIG_CMD_NET) 139 reset_net_chip(); 140 #endif 141 dieid_num_r(); 142 143 return 0; 144 } 145 146 /* 147 * Routine: set_muxconf_regs 148 * Description: Setting up the configuration Mux registers specific to the 149 * hardware. Many pins need to be moved from protect to primary 150 * mode. 151 */ 152 void set_muxconf_regs(void) 153 { 154 MUX_EVM(); 155 } 156 157 #ifdef CONFIG_CMD_NET 158 /* 159 * Routine: setup_net_chip 160 * Description: Setting up the configuration GPMC registers specific to the 161 * Ethernet hardware. 162 */ 163 static void setup_net_chip(void) 164 { 165 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; 166 167 /* Configure GPMC registers */ 168 writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1); 169 writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2); 170 writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3); 171 writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4); 172 writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5); 173 writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6); 174 writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7); 175 176 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ 177 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); 178 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ 179 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); 180 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ 181 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, 182 &ctrl_base->gpmc_nadv_ale); 183 } 184 185 /** 186 * Reset the ethernet chip. 187 */ 188 static void reset_net_chip(void) 189 { 190 int ret; 191 int rst_gpio; 192 193 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) { 194 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1; 195 } else { 196 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2; 197 } 198 199 ret = gpio_request(rst_gpio, ""); 200 if (ret < 0) { 201 printf("Unable to get GPIO %d\n", rst_gpio); 202 return ; 203 } 204 205 /* Configure as output */ 206 gpio_direction_output(rst_gpio, 0); 207 208 /* Send a pulse on the GPIO pin */ 209 gpio_set_value(rst_gpio, 1); 210 udelay(1); 211 gpio_set_value(rst_gpio, 0); 212 udelay(1); 213 gpio_set_value(rst_gpio, 1); 214 } 215 216 int board_eth_init(bd_t *bis) 217 { 218 int rc = 0; 219 #ifdef CONFIG_SMC911X 220 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); 221 #endif 222 return rc; 223 } 224 #endif /* CONFIG_CMD_NET */ 225 226 #ifdef CONFIG_GENERIC_MMC 227 int board_mmc_init(bd_t *bis) 228 { 229 omap_mmc_init(0); 230 return 0; 231 } 232 #endif 233