1 /* 2 * (C) Copyright 2004-2008 3 * Texas Instruments, <www.ti.com> 4 * 5 * Author : 6 * Manikandan Pillai <mani.pillai@ti.com> 7 * 8 * Derived from Beagle Board and 3430 SDP code by 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <khasim@ti.com> 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 #include <common.h> 31 #include <netdev.h> 32 #include <asm/io.h> 33 #include <asm/arch/mem.h> 34 #include <asm/arch/mux.h> 35 #include <asm/arch/sys_proto.h> 36 #include <asm/arch/gpio.h> 37 #include <i2c.h> 38 #include <asm/mach-types.h> 39 #include "evm.h" 40 41 #define OMAP3EVM_GPIO_ETH_RST_GEN1 64 42 #define OMAP3EVM_GPIO_ETH_RST_GEN2 7 43 44 DECLARE_GLOBAL_DATA_PTR; 45 46 static u32 omap3_evm_version; 47 48 u32 get_omap3_evm_rev(void) 49 { 50 return omap3_evm_version; 51 } 52 53 static void omap3_evm_get_revision(void) 54 { 55 #if defined(CONFIG_CMD_NET) 56 /* 57 * Board revision can be ascertained only by identifying 58 * the Ethernet chipset. 59 */ 60 unsigned int smsc_id; 61 62 /* Ethernet PHY ID is stored at ID_REV register */ 63 smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000; 64 printf("Read back SMSC id 0x%x\n", smsc_id); 65 66 switch (smsc_id) { 67 /* SMSC9115 chipset */ 68 case 0x01150000: 69 omap3_evm_version = OMAP3EVM_BOARD_GEN_1; 70 break; 71 /* SMSC 9220 chipset */ 72 case 0x92200000: 73 default: 74 omap3_evm_version = OMAP3EVM_BOARD_GEN_2; 75 } 76 #else 77 #if defined(CONFIG_STATIC_BOARD_REV) 78 /* 79 * Look for static defintion of the board revision 80 */ 81 omap3_evm_version = CONFIG_STATIC_BOARD_REV; 82 #else 83 /* 84 * Fallback to the default above. 85 */ 86 omap3_evm_version = OMAP3EVM_BOARD_GEN_2; 87 #endif 88 #endif /* CONFIG_CMD_NET */ 89 } 90 91 #ifdef CONFIG_USB_OMAP3 92 /* 93 * MUSB port on OMAP3EVM Rev >= E requires extvbus programming. 94 */ 95 u8 omap3_evm_need_extvbus(void) 96 { 97 u8 retval = 0; 98 99 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) 100 retval = 1; 101 102 return retval; 103 } 104 #endif 105 106 /* 107 * Routine: board_init 108 * Description: Early hardware init. 109 */ 110 int board_init(void) 111 { 112 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 113 /* board id for Linux */ 114 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM; 115 /* boot param addr */ 116 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 117 118 return 0; 119 } 120 121 /* 122 * Routine: misc_init_r 123 * Description: Init ethernet (done here so udelay works) 124 */ 125 int misc_init_r(void) 126 { 127 128 #ifdef CONFIG_DRIVER_OMAP34XX_I2C 129 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 130 #endif 131 132 #if defined(CONFIG_CMD_NET) 133 setup_net_chip(); 134 #endif 135 omap3_evm_get_revision(); 136 137 #if defined(CONFIG_CMD_NET) 138 reset_net_chip(); 139 #endif 140 dieid_num_r(); 141 142 return 0; 143 } 144 145 /* 146 * Routine: set_muxconf_regs 147 * Description: Setting up the configuration Mux registers specific to the 148 * hardware. Many pins need to be moved from protect to primary 149 * mode. 150 */ 151 void set_muxconf_regs(void) 152 { 153 MUX_EVM(); 154 } 155 156 #ifdef CONFIG_CMD_NET 157 /* 158 * Routine: setup_net_chip 159 * Description: Setting up the configuration GPMC registers specific to the 160 * Ethernet hardware. 161 */ 162 static void setup_net_chip(void) 163 { 164 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; 165 166 /* Configure GPMC registers */ 167 writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1); 168 writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2); 169 writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3); 170 writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4); 171 writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5); 172 writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6); 173 writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7); 174 175 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ 176 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); 177 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ 178 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); 179 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ 180 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, 181 &ctrl_base->gpmc_nadv_ale); 182 } 183 184 /** 185 * Reset the ethernet chip. 186 */ 187 static void reset_net_chip(void) 188 { 189 int ret; 190 int rst_gpio; 191 192 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) { 193 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1; 194 } else { 195 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2; 196 } 197 198 ret = omap_request_gpio(rst_gpio); 199 if (ret < 0) { 200 printf("Unable to get GPIO %d\n", rst_gpio); 201 return ; 202 } 203 204 /* Configure as output */ 205 omap_set_gpio_direction(rst_gpio, 0); 206 207 /* Send a pulse on the GPIO pin */ 208 omap_set_gpio_dataout(rst_gpio, 1); 209 udelay(1); 210 omap_set_gpio_dataout(rst_gpio, 0); 211 udelay(1); 212 omap_set_gpio_dataout(rst_gpio, 1); 213 } 214 215 int board_eth_init(bd_t *bis) 216 { 217 int rc = 0; 218 #ifdef CONFIG_SMC911X 219 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); 220 #endif 221 return rc; 222 } 223 #endif /* CONFIG_CMD_NET */ 224