xref: /openbmc/u-boot/board/ti/dra7xx/mux_data.h (revision d6736689)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2013
4  * Texas Instruments Incorporated, <www.ti.com>
5  *
6  * Sricharan R	<r.sricharan@ti.com>
7  * Nishant Kamat <nskamat@ti.com>
8  */
9 #ifndef _MUX_DATA_DRA7XX_H_
10 #define _MUX_DATA_DRA7XX_H_
11 
12 #include <asm/arch/mux_dra7xx.h>
13 
14 const struct pad_conf_entry dra72x_core_padconf_array_common[] = {
15 	{GPMC_AD0, (M3 | PIN_INPUT)},	/* gpmc_ad0.vout3_d0 */
16 	{GPMC_AD1, (M3 | PIN_INPUT)},	/* gpmc_ad1.vout3_d1 */
17 	{GPMC_AD2, (M3 | PIN_INPUT)},	/* gpmc_ad2.vout3_d2 */
18 	{GPMC_AD3, (M3 | PIN_INPUT)},	/* gpmc_ad3.vout3_d3 */
19 	{GPMC_AD4, (M3 | PIN_INPUT)},	/* gpmc_ad4.vout3_d4 */
20 	{GPMC_AD5, (M3 | PIN_INPUT)},	/* gpmc_ad5.vout3_d5 */
21 	{GPMC_AD6, (M3 | PIN_INPUT)},	/* gpmc_ad6.vout3_d6 */
22 	{GPMC_AD7, (M3 | PIN_INPUT)},	/* gpmc_ad7.vout3_d7 */
23 	{GPMC_AD8, (M3 | PIN_INPUT)},	/* gpmc_ad8.vout3_d8 */
24 	{GPMC_AD9, (M3 | PIN_INPUT)},	/* gpmc_ad9.vout3_d9 */
25 	{GPMC_AD10, (M3 | PIN_INPUT)},	/* gpmc_ad10.vout3_d10 */
26 	{GPMC_AD11, (M3 | PIN_INPUT)},	/* gpmc_ad11.vout3_d11 */
27 	{GPMC_AD12, (M3 | PIN_INPUT)},	/* gpmc_ad12.vout3_d12 */
28 	{GPMC_AD13, (M3 | PIN_INPUT)},	/* gpmc_ad13.vout3_d13 */
29 	{GPMC_AD14, (M3 | PIN_INPUT)},	/* gpmc_ad14.vout3_d14 */
30 	{GPMC_AD15, (M3 | PIN_INPUT)},	/* gpmc_ad15.vout3_d15 */
31 	{GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a0.vout3_d16 */
32 	{GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a1.vout3_d17 */
33 	{GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a2.vout3_d18 */
34 	{GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a3.vout3_d19 */
35 	{GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a4.vout3_d20 */
36 	{GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a5.vout3_d21 */
37 	{GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a6.vout3_d22 */
38 	{GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a7.vout3_d23 */
39 	{GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a8.vout3_hsync */
40 	{GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a9.vout3_vsync */
41 	{GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a10.vout3_de */
42 	{GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_a11.gpio2_1 */
43 	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */
44 	{GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */
45 	{GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */
46 	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */
47 	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */
48 	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */
49 	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
50 	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
51 	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
52 	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
53 	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
54 	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
55 	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
56 	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
57 	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
58 	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
59 	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */
60 	{GPMC_CS3, (M3 | PIN_INPUT_PULLUP)},	/* gpmc_cs3.vout3_clk */
61 	{VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},	/* vin2a_clk0.vin2a_clk0 */
62 	{VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_hsync0.vin2a_hsync0 */
63 	{VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},	/* vin2a_vsync0.vin2a_vsync0 */
64 	{VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d0.vin2a_d0 */
65 	{VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d1.vin2a_d1 */
66 	{VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d2.vin2a_d2 */
67 	{VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d3.vin2a_d3 */
68 	{VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d4.vin2a_d4 */
69 	{VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d5.vin2a_d5 */
70 	{VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_d6.vin2a_d6 */
71 	{VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_d7.vin2a_d7 */
72 	{VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},	/* vin2a_d8.vin2a_d8 */
73 	{VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},	/* vin2a_d9.vin2a_d9 */
74 	{VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)},	/* vin2a_d10.vin2a_d10 */
75 	{VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)},	/* vin2a_d11.vin2a_d11 */
76 	{VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_clk.vout1_clk */
77 	{VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_de.vout1_de */
78 	{VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_hsync.vout1_hsync */
79 	{VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_vsync.vout1_vsync */
80 	{VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d0.vout1_d0 */
81 	{VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d1.vout1_d1 */
82 	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d2.vout1_d2 */
83 	{VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d3.vout1_d3 */
84 	{VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d4.vout1_d4 */
85 	{VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d5.vout1_d5 */
86 	{VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d6.vout1_d6 */
87 	{VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d7.vout1_d7 */
88 	{VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d8.vout1_d8 */
89 	{VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d9.vout1_d9 */
90 	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d10.vout1_d10 */
91 	{VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d11.vout1_d11 */
92 	{VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d12.vout1_d12 */
93 	{VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d13.vout1_d13 */
94 	{VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d14.vout1_d14 */
95 	{VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d15.vout1_d15 */
96 	{VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d16.vout1_d16 */
97 	{VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d17.vout1_d17 */
98 	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d18.vout1_d18 */
99 	{VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d19.vout1_d19 */
100 	{VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d20.vout1_d20 */
101 	{VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d21.vout1_d21 */
102 	{VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d22.vout1_d22 */
103 	{VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d23.vout1_d23 */
104 	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
105 	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
106 	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
107 	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
108 	{GPIO6_14, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_14.i2c3_sda */
109 	{GPIO6_15, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_15.i2c3_scl */
110 	{GPIO6_16, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
111 	{MCASP1_AXR0, (M10 | PIN_INPUT_SLEW)},	/* mcasp1_axr0.i2c5_sda */
112 	{MCASP1_AXR1, (M10 | PIN_INPUT_SLEW)},	/* mcasp1_axr1.i2c5_scl */
113 	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
114 	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
115 	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
116 	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
117 	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
118 	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
119 	{MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
120 	{MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},	/* mcasp1_axr13.mcasp7_axr1 */
121 	{MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
122 	{MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
123 	{MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkr.mcasp2_aclkr */
124 	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
125 	{MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.mcasp3_fsx */
126 	{MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_axr0.mcasp3_axr0 */
127 	{MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},	/* mcasp3_axr1.mcasp3_axr1 */
128 	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
129 	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
130 	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
131 	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
132 	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
133 	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
134 	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)},	/* mmc1_sdcd.gpio6_27 */
135 	{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},	/* mmc1_sdwp.gpio6_28 */
136 	{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.spi1_sclk */
137 	{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.spi1_d1 */
138 	{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.spi1_d0 */
139 	{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},	/* spi1_cs0.spi1_cs0 */
140 	{SPI1_CS1, (M14 | PIN_OUTPUT)},	/* spi1_cs1.gpio7_11 */
141 	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
142 	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
143 	{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.uart3_rxd */
144 	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
145 	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
146 	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
147 	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
148 	{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.gpio1_15 */
149 	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
150 	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
151 	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_ctsn.mmc4_clk */
152 	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_rtsn.mmc4_cmd */
153 	{UART2_RXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rxd.mmc4_dat0 */
154 	{UART2_TXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_txd.mmc4_dat1 */
155 	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.mmc4_dat2 */
156 	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
157 	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_sda.hdmi1_ddc_scl */
158 	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_scl.hdmi1_ddc_sda */
159 	{WAKEUP0, (M15 | PULL_UP)},	/* Wakeup0.safe for dcan1_rx */
160 	{WAKEUP3, (M1 | PULL_ENA | PULL_UP)},	/* Wakeup3.sys_nirq1 */
161 };
162 
163 const struct pad_conf_entry dra72x_rgmii_padconf_array_revb[] = {
164 	{GPIO6_11, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_11.gpio6_11 */
165 	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
166 	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
167 	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
168 	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
169 	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
170 	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
171 	{RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
172 	{RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
173 	{RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
174 	{RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
175 	{RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
176 	{RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
177 	{VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d0.rgmii1_txc */
178 	{VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d1.rgmii1_txctl */
179 	{VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d2.rgmii1_txd3 */
180 	{VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d3.rgmii1_txd2 */
181 	{VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d4.rgmii1_txd1 */
182 	{VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d5.rgmii1_txd0 */
183 	{VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d6.rgmii1_rxc */
184 	{VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d7.rgmii1_rxctl */
185 	{VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d8.rgmii1_rxd3 */
186 	{VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d9.rgmii1_rxd2 */
187 	{VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d10.rgmii1_rxd1 */
188 	{VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d11.rgmii1_rxd0 */
189 	{XREF_CLK1, (M5 | PIN_OUTPUT)},	/* xref_clk1.atl_clk1 */
190 	{XREF_CLK2, (M5 | PIN_OUTPUT)},	/* xref_clk2.atl_clk2 */
191 };
192 
193 const struct pad_conf_entry dra72x_rgmii_padconf_array_revc[] = {
194 	{VIN2A_FLD0, (M14 | PIN_INPUT)},	/* vin2a_fld0.gpio3_30 */
195 	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
196 	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
197 	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
198 	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
199 	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
200 	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
201 	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
202 	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
203 	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
204 	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
205 	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
206 	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
207 	{VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
208 	{VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
209 	{VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
210 	{VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
211 	{VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
212 	{VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
213 	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
214 	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
215 	{VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
216 	{VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
217 	{VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
218 	{VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
219 	{XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.atl_clk2 */
220 };
221 
222 const struct pad_conf_entry dra71x_core_padconf_array[] = {
223 	{GPMC_AD0, (M3 | PIN_INPUT)},	/* gpmc_ad0.vout3_d0 */
224 	{GPMC_AD1, (M3 | PIN_INPUT)},	/* gpmc_ad1.vout3_d1 */
225 	{GPMC_AD2, (M3 | PIN_INPUT)},	/* gpmc_ad2.vout3_d2 */
226 	{GPMC_AD3, (M3 | PIN_INPUT)},	/* gpmc_ad3.vout3_d3 */
227 	{GPMC_AD4, (M3 | PIN_INPUT)},	/* gpmc_ad4.vout3_d4 */
228 	{GPMC_AD5, (M3 | PIN_INPUT)},	/* gpmc_ad5.vout3_d5 */
229 	{GPMC_AD6, (M3 | PIN_INPUT)},	/* gpmc_ad6.vout3_d6 */
230 	{GPMC_AD7, (M3 | PIN_INPUT)},	/* gpmc_ad7.vout3_d7 */
231 	{GPMC_AD8, (M3 | PIN_INPUT)},	/* gpmc_ad8.vout3_d8 */
232 	{GPMC_AD9, (M3 | PIN_INPUT)},	/* gpmc_ad9.vout3_d9 */
233 	{GPMC_AD10, (M3 | PIN_INPUT)},	/* gpmc_ad10.vout3_d10 */
234 	{GPMC_AD11, (M3 | PIN_INPUT)},	/* gpmc_ad11.vout3_d11 */
235 	{GPMC_AD12, (M3 | PIN_INPUT)},	/* gpmc_ad12.vout3_d12 */
236 	{GPMC_AD13, (M3 | PIN_INPUT)},	/* gpmc_ad13.vout3_d13 */
237 	{GPMC_AD14, (M3 | PIN_INPUT)},	/* gpmc_ad14.vout3_d14 */
238 	{GPMC_AD15, (M3 | PIN_INPUT)},	/* gpmc_ad15.vout3_d15 */
239 	{GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a0.vout3_d16 */
240 	{GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a1.vout3_d17 */
241 	{GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a2.vout3_d18 */
242 	{GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a3.vout3_d19 */
243 	{GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a4.vout3_d20 */
244 	{GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a5.vout3_d21 */
245 	{GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a6.vout3_d22 */
246 	{GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a7.vout3_d23 */
247 	{GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a8.vout3_hsync */
248 	{GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a9.vout3_vsync */
249 	{GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a10.vout3_de */
250 	{GPMC_A11, (M14 | PIN_INPUT)},	/* gpmc_a11.gpio2_1 */
251 	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
252 	{GPMC_A14, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
253 	{GPMC_A15, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
254 	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
255 	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
256 	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
257 	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
258 	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
259 	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
260 	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
261 	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
262 	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
263 	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
264 	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
265 	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
266 	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
267 	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
268 	{GPMC_CS3, (M3 | PIN_INPUT_PULLUP)},	/* gpmc_cs3.vout3_clk */
269 	{VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},	/* vin2a_clk0.vin2a_clk0 */
270 	{VIN2A_FLD0, (M14 | PIN_INPUT)},	/* vin2a_fld0.gpio3_30 */
271 	{VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_hsync0.vin2a_hsync0 */
272 	{VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},	/* vin2a_vsync0.vin2a_vsync0 */
273 	{VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d0.vin2a_d0 */
274 	{VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d1.vin2a_d1 */
275 	{VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d2.vin2a_d2 */
276 	{VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d3.vin2a_d3 */
277 	{VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d4.vin2a_d4 */
278 	{VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d5.vin2a_d5 */
279 	{VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_d6.vin2a_d6 */
280 	{VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_d7.vin2a_d7 */
281 	{VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},	/* vin2a_d8.vin2a_d8 */
282 	{VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},	/* vin2a_d9.vin2a_d9 */
283 	{VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)},	/* vin2a_d10.vin2a_d10 */
284 	{VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)},	/* vin2a_d11.vin2a_d11 */
285 	{VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
286 	{VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
287 	{VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
288 	{VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
289 	{VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
290 	{VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
291 	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
292 	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
293 	{VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
294 	{VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
295 	{VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
296 	{VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
297 	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},	/* N/A.N/A */
298 	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)},	/* N/A.N/A */
299 	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)},	/* N/A.N/A */
300 	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
301 	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
302 	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
303 	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
304 	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
305 	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
306 	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
307 	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
308 	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
309 	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
310 	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
311 	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
312 	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
313 	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
314 	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
315 	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
316 	{GPIO6_14, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_14.i2c3_sda */
317 	{GPIO6_15, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_15.i2c3_scl */
318 	{GPIO6_16, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
319 	{XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.atl_clk2 */
320 	{MCASP1_ACLKX, (M14 | PIN_INPUT)},	/* mcasp1_aclkx.gpio7_31 */
321 	{MCASP1_FSX, (M14 | 0x000d0000)},	/* mcasp1_fsx.gpio7_30 */
322 	{MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr0.i2c5_sda */
323 	{MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr1.i2c5_scl */
324 	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
325 	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
326 	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
327 	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
328 	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
329 	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
330 	{MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
331 	{MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},	/* mcasp1_axr13.mcasp7_axr1 */
332 	{MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
333 	{MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
334 	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
335 	{MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.mcasp3_fsx */
336 	{MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_axr0.mcasp3_axr0 */
337 	{MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},	/* mcasp3_axr1.mcasp3_axr1 */
338 	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
339 	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
340 	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
341 	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
342 	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
343 	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
344 	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mmc1_sdcd.gpio6_27 */
345 	{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},	/* mmc1_sdwp.gpio6_28 */
346 	{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.spi1_sclk */
347 	{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.spi1_d1 */
348 	{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.spi1_d0 */
349 	{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},	/* spi1_cs0.spi1_cs0 */
350 	{SPI1_CS1, (M14 | PIN_INPUT_PULLUP)},	/* spi1_cs1.gpio7_11 */
351 	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
352 	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
353 	{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.uart3_rxd */
354 	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
355 	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
356 	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
357 	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
358 	{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.gpio1_15 */
359 	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
360 	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
361 	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_ctsn.mmc4_clk */
362 	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_rtsn.mmc4_cmd */
363 	{UART2_RXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rxd.mmc4_dat0 */
364 	{UART2_TXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_txd.mmc4_dat1 */
365 	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.mmc4_dat2 */
366 	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
367 	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_sda.hdmi1_ddc_scl */
368 	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_scl.hdmi1_ddc_sda */
369 	{WAKEUP0, (M15 | PULL_UP)},	/* Wakeup0.safe for dcan1_rx */
370 	{WAKEUP3, (M1 | PULL_ENA | PULL_UP)},	/* Wakeup3.sys_nirq1 */
371 };
372 
373 const struct pad_conf_entry early_padconf[] = {
374 	{UART1_RXD, (PIN_INPUT_SLEW | M0)}, /* UART1_RXD */
375 	{UART1_TXD, (PIN_INPUT_SLEW | M0)}, /* UART1_TXD */
376 	{UART3_RXD, (PIN_INPUT_SLEW | M0)}, /* UART3_RXD */
377 	{UART3_TXD, (PIN_INPUT_SLEW | M0)}, /* UART3_TXD */
378 	{I2C1_SDA, (PIN_INPUT | M0)},	/* I2C1_SDA */
379 	{I2C1_SCL, (PIN_INPUT | M0)},	/* I2C1_SCL */
380 };
381 
382 #ifdef CONFIG_IODELAY_RECALIBRATION
383 const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revb[] = {
384 	{0x6F0, 359, 0}, /* RGMMI0_RXC_IN */
385 	{0x6FC, 129, 1896}, /* RGMMI0_RXCTL_IN */
386 	{0x708, 80, 1391}, /* RGMMI0_RXD0_IN */
387 	{0x714, 196, 1522}, /* RGMMI0_RXD1_IN */
388 	{0x720, 40, 1860}, /* RGMMI0_RXD2_IN */
389 	{0x72C, 0, 1956}, /* RGMMI0_RXD3_IN */
390 	{0x740, 0, 220}, /* RGMMI0_TXC_OUT */
391 	{0x74C, 1820, 180}, /* RGMMI0_TXCTL_OUT */
392 	{0x758, 1740, 440}, /* RGMMI0_TXD0_OUT */
393 	{0x764, 1740, 240}, /* RGMMI0_TXD1_OUT */
394 	{0x770, 1680, 380}, /* RGMMI0_TXD2_OUT */
395 	{0x77C, 1740, 440}, /* RGMMI0_TXD3_OUT */
396 	/* These values are for using RGMII1 configuration on VIN2a_x pins. */
397 	{0xAB0, 596, 0}, /* CFG_VIN2A_D18_IN */
398 	{0xABC, 314, 980}, /* CFG_VIN2A_D19_IN */
399 	{0xAD4, 241, 1536}, /* CFG_VIN2A_D20_IN */
400 	{0xAE0, 103, 1689}, /* CFG_VIN2A_D21_IN */
401 	{0xAEC, 161, 1563}, /* CFG_VIN2A_D22_IN */
402 	{0xAF8, 0, 1613}, /* CFG_VIN2A_D23_IN */
403 	{0xA70, 0, 200}, /* CFG_VIN2A_D12_OUT */
404 	{0xA7C, 1560, 140}, /* CFG_VIN2A_D13_OUT */
405 	{0xA88, 1700, 0}, /* CFG_VIN2A_D14_OUT */
406 	{0xA94, 1260, 0}, /* CFG_VIN2A_D15_OUT */
407 	{0xAA0, 1400, 0}, /* CFG_VIN2A_D16_OUT */
408 	{0xAAC, 1290, 0}, /* CFG_VIN2A_D17_OUT */
409 	{0x144, 0, 0}, /* CFG_GPMC_A13_IN */
410 	{0x150, 2062, 2277}, /* CFG_GPMC_A14_IN */
411 	{0x15C, 1960, 2289}, /* CFG_GPMC_A15_IN */
412 	{0x168, 2058, 2386}, /* CFG_GPMC_A16_IN */
413 	{0x170, 0, 0 },	/* CFG_GPMC_A16_OUT */
414 	{0x174, 2062, 2350}, /* CFG_GPMC_A17_IN */
415 	{0x188, 0, 0}, /* CFG_GPMC_A18_OUT */
416 	{0x374, 121, 0}, /* CFG_GPMC_CS2_OUT */
417 };
418 
419 const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revc[] = {
420 	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
421 	{0x0150, 2247, 1186},	/* CFG_GPMC_A14_IN */
422 	{0x015C, 2176, 1197},	/* CFG_GPMC_A15_IN */
423 	{0x0168, 2229, 1268},	/* CFG_GPMC_A16_IN */
424 	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
425 	{0x0174, 2251, 1217},	/* CFG_GPMC_A17_IN */
426 	{0x0188, 0, 0},	/* CFG_GPMC_A18_OUT */
427 	{0x0374, 121, 0},	/* CFG_GPMC_CS2_OUT */
428 	{0x06F0, 413, 0},	/* CFG_RGMII0_RXC_IN */
429 	{0x06FC, 27, 2296},	/* CFG_RGMII0_RXCTL_IN */
430 	{0x0708, 3, 1721},	/* CFG_RGMII0_RXD0_IN */
431 	{0x0714, 134, 1786},	/* CFG_RGMII0_RXD1_IN */
432 	{0x0720, 40, 1966},	/* CFG_RGMII0_RXD2_IN */
433 	{0x072C, 0, 2057},	/* CFG_RGMII0_RXD3_IN */
434 	{0x0740, 0, 60},	/* CFG_RGMII0_TXC_OUT */
435 	{0x074C, 0, 60},	/* CFG_RGMII0_TXCTL_OUT */
436 	{0x0758, 0, 60},	/* CFG_RGMII0_TXD0_OUT */
437 	{0x0764, 0, 0},		/* CFG_RGMII0_TXD1_OUT */
438 	{0x0770, 0, 60},	/* CFG_RGMII0_TXD2_OUT */
439 	{0x077C, 0, 120},	/* CFG_RGMII0_TXD3_OUT */
440 	{0x0A70, 0, 0},		/* CFG_VIN2A_D12_OUT */
441 	{0x0A7C, 170, 0},	/* CFG_VIN2A_D13_OUT */
442 	{0x0A88, 150, 0},	/* CFG_VIN2A_D14_OUT */
443 	{0x0A94, 0, 0},		/* CFG_VIN2A_D15_OUT */
444 	{0x0AA0, 60, 0},	/* CFG_VIN2A_D16_OUT */
445 	{0x0AAC, 60, 0},	/* CFG_VIN2A_D17_OUT */
446 	{0x0AB0, 530, 0},	/* CFG_VIN2A_D18_IN */
447 	{0x0ABC, 71, 1099},	/* CFG_VIN2A_D19_IN */
448 	{0x0AC8, 2229, 10},	/* CFG_VIN2A_D1_IN */
449 	{0x0AD4, 142, 1337},	/* CFG_VIN2A_D20_IN */
450 	{0x0AE0, 114, 1517},	/* CFG_VIN2A_D21_IN */
451 	{0x0AEC, 171, 1331},	/* CFG_VIN2A_D22_IN */
452 	{0x0AF8, 0, 1328},	/* CFG_VIN2A_D23_IN */
453 };
454 
455 const struct iodelay_cfg_entry dra71_iodelay_cfg_array[] = {
456 	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
457 	{0x0150, 2247, 1186},	/* CFG_GPMC_A14_IN */
458 	{0x015C, 2176, 1197},	/* CFG_GPMC_A15_IN */
459 	{0x0168, 2229, 1268},	/* CFG_GPMC_A16_IN */
460 	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
461 	{0x0174, 2251, 1217},	/* CFG_GPMC_A17_IN */
462 	{0x0188, 0, 0},	/* CFG_GPMC_A18_OUT */
463 	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
464 	{0x06F0, 413, 0},	/* CFG_RGMII0_RXC_IN */
465 	{0x06FC, 27, 2296},	/* CFG_RGMII0_RXCTL_IN */
466 	{0x0708, 3, 1721},	/* CFG_RGMII0_RXD0_IN */
467 	{0x0714, 134, 1786},	/* CFG_RGMII0_RXD1_IN */
468 	{0x0720, 40, 1966},	/* CFG_RGMII0_RXD2_IN */
469 	{0x072C, 0, 2057},	/* CFG_RGMII0_RXD3_IN */
470 	{0x0740, 0, 60},	/* CFG_RGMII0_TXC_OUT */
471 	{0x074C, 0, 60},	/* CFG_RGMII0_TXCTL_OUT */
472 	{0x0758, 0, 60},	/* CFG_RGMII0_TXD0_OUT */
473 	{0x0764, 0, 0},	/* CFG_RGMII0_TXD1_OUT */
474 	{0x0770, 0, 60},	/* CFG_RGMII0_TXD2_OUT */
475 	{0x077C, 0, 120},	/* CFG_RGMII0_TXD3_OUT */
476 	{0x0A38, 0, 0},	/* CFG_VIN2A_CLK0_IN */
477 	{0x0A44, 1936, 0},	/* CFG_VIN2A_D0_IN */
478 	{0x0A50, 2031, 0},	/* CFG_VIN2A_D10_IN */
479 	{0x0A5C, 1702, 0},	/* CFG_VIN2A_D11_IN */
480 	{0x0A70, 0, 0},	/* CFG_VIN2A_D12_OUT */
481 	{0x0A7C, 170, 0},	/* CFG_VIN2A_D13_OUT */
482 	{0x0A88, 150, 0},	/* CFG_VIN2A_D14_OUT */
483 	{0x0A94, 0, 0},	/* CFG_VIN2A_D15_OUT */
484 	{0x0AA0, 60, 0},	/* CFG_VIN2A_D16_OUT */
485 	{0x0AAC, 60, 0},	/* CFG_VIN2A_D17_OUT */
486 	{0x0AB0, 530, 0},	/* CFG_VIN2A_D18_IN */
487 	{0x0ABC, 71, 1099},	/* CFG_VIN2A_D19_IN */
488 	{0x0AC8, 2229, 10},	/* CFG_VIN2A_D1_IN */
489 	{0x0AD4, 142, 1337},	/* CFG_VIN2A_D20_IN */
490 	{0x0AE0, 114, 1517},	/* CFG_VIN2A_D21_IN */
491 	{0x0AEC, 171, 1331},	/* CFG_VIN2A_D22_IN */
492 	{0x0AF8, 0, 1328},	/* CFG_VIN2A_D23_IN */
493 	{0x0B04, 1736, 0},	/* CFG_VIN2A_D2_IN */
494 	{0x0B10, 1943, 0},	/* CFG_VIN2A_D3_IN */
495 	{0x0B1C, 1601, 0},	/* CFG_VIN2A_D4_IN */
496 	{0x0B28, 2052, 0},	/* CFG_VIN2A_D5_IN */
497 	{0x0B34, 1571, 0},	/* CFG_VIN2A_D6_IN */
498 	{0x0B40, 1855, 0},	/* CFG_VIN2A_D7_IN */
499 	{0x0B4C, 1224, 618},	/* CFG_VIN2A_D8_IN */
500 	{0x0B58, 1373, 509},	/* CFG_VIN2A_D9_IN */
501 	{0x0B7C, 1943, 0},	/* CFG_VIN2A_HSYNC0_IN */
502 	{0x0B88, 1612, 0},	/* CFG_VIN2A_VSYNC0_IN */
503 };
504 #endif
505 
506 const struct pad_conf_entry dra74x_core_padconf_array[] = {
507 	{GPMC_AD0, (M3 | PIN_INPUT)},	/* gpmc_ad0.vout3_d0 */
508 	{GPMC_AD1, (M3 | PIN_INPUT)},	/* gpmc_ad1.vout3_d1 */
509 	{GPMC_AD2, (M3 | PIN_INPUT)},	/* gpmc_ad2.vout3_d2 */
510 	{GPMC_AD3, (M3 | PIN_INPUT)},	/* gpmc_ad3.vout3_d3 */
511 	{GPMC_AD4, (M3 | PIN_INPUT)},	/* gpmc_ad4.vout3_d4 */
512 	{GPMC_AD5, (M3 | PIN_INPUT)},	/* gpmc_ad5.vout3_d5 */
513 	{GPMC_AD6, (M3 | PIN_INPUT)},	/* gpmc_ad6.vout3_d6 */
514 	{GPMC_AD7, (M3 | PIN_INPUT)},	/* gpmc_ad7.vout3_d7 */
515 	{GPMC_AD8, (M3 | PIN_INPUT)},	/* gpmc_ad8.vout3_d8 */
516 	{GPMC_AD9, (M3 | PIN_INPUT)},	/* gpmc_ad9.vout3_d9 */
517 	{GPMC_AD10, (M3 | PIN_INPUT)},	/* gpmc_ad10.vout3_d10 */
518 	{GPMC_AD11, (M3 | PIN_INPUT)},	/* gpmc_ad11.vout3_d11 */
519 	{GPMC_AD12, (M3 | PIN_INPUT)},	/* gpmc_ad12.vout3_d12 */
520 	{GPMC_AD13, (M3 | PIN_INPUT)},	/* gpmc_ad13.vout3_d13 */
521 	{GPMC_AD14, (M3 | PIN_INPUT)},	/* gpmc_ad14.vout3_d14 */
522 	{GPMC_AD15, (M3 | PIN_INPUT)},	/* gpmc_ad15.vout3_d15 */
523 	{GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a0.vout3_d16 */
524 	{GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a1.vout3_d17 */
525 	{GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a2.vout3_d18 */
526 	{GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a3.vout3_d19 */
527 	{GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a4.vout3_d20 */
528 	{GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a5.vout3_d21 */
529 	{GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a6.vout3_d22 */
530 	{GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a7.vout3_d23 */
531 	{GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a8.vout3_hsync */
532 	{GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a9.vout3_vsync */
533 	{GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a10.vout3_de */
534 	{GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_a11.gpio2_1 */
535 	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
536 	{GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
537 	{GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
538 	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
539 	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
540 	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
541 	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
542 	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
543 	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
544 	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
545 	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
546 	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
547 	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
548 	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
549 	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
550 	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
551 	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
552 	{GPMC_CS3, (M3 | PIN_INPUT_PULLUP)},	/* gpmc_cs3.vout3_clk */
553 	{VIN1A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_clk0.vin1a_clk0 */
554 	{VIN1A_DE0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_de0.vin1a_de0 */
555 	{VIN1A_FLD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_fld0.vin1a_fld0 */
556 	{VIN1A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_hsync0.vin1a_hsync0 */
557 	{VIN1A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_vsync0.vin1a_vsync0 */
558 	{VIN1A_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d0.vin1a_d0 */
559 	{VIN1A_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d1.vin1a_d1 */
560 	{VIN1A_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d2.vin1a_d2 */
561 	{VIN1A_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d3.vin1a_d3 */
562 	{VIN1A_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d4.vin1a_d4 */
563 	{VIN1A_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d5.vin1a_d5 */
564 	{VIN1A_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d6.vin1a_d6 */
565 	{VIN1A_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d7.vin1a_d7 */
566 	{VIN1A_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d8.vin1a_d8 */
567 	{VIN1A_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d9.vin1a_d9 */
568 	{VIN1A_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d10.vin1a_d10 */
569 	{VIN1A_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d11.vin1a_d11 */
570 	{VIN1A_D12, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d12.vin1a_d12 */
571 	{VIN1A_D13, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d13.vin1a_d13 */
572 	{VIN1A_D14, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d14.vin1a_d14 */
573 	{VIN1A_D15, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d15.vin1a_d15 */
574 	{VIN1A_D16, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d16.vin1a_d16 */
575 	{VIN1A_D17, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d17.vin1a_d17 */
576 	{VIN1A_D18, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d18.vin1a_d18 */
577 	{VIN1A_D19, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d19.vin1a_d19 */
578 	{VIN1A_D20, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d20.vin1a_d20 */
579 	{VIN1A_D21, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d21.vin1a_d21 */
580 	{VIN1A_D22, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d22.vin1a_d22 */
581 	{VIN1A_D23, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d23.vin1a_d23 */
582 	{VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
583 	{VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
584 	{VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
585 	{VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
586 	{VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
587 	{VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
588 	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
589 	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
590 	{VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
591 	{VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
592 	{VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
593 	{VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
594 	{VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_clk.vout1_clk */
595 	{VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_de.vout1_de */
596 	{VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_hsync.vout1_hsync */
597 	{VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_vsync.vout1_vsync */
598 	{VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d0.vout1_d0 */
599 	{VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d1.vout1_d1 */
600 	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d2.vout1_d2 */
601 	{VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d3.vout1_d3 */
602 	{VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d4.vout1_d4 */
603 	{VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d5.vout1_d5 */
604 	{VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d6.vout1_d6 */
605 	{VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d7.vout1_d7 */
606 	{VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d8.vout1_d8 */
607 	{VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d9.vout1_d9 */
608 	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d10.vout1_d10 */
609 	{VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d11.vout1_d11 */
610 	{VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d12.vout1_d12 */
611 	{VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d13.vout1_d13 */
612 	{VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d14.vout1_d14 */
613 	{VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d15.vout1_d15 */
614 	{VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d16.vout1_d16 */
615 	{VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d17.vout1_d17 */
616 	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d18.vout1_d18 */
617 	{VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d19.vout1_d19 */
618 	{VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d20.vout1_d20 */
619 	{VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d21.vout1_d21 */
620 	{VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d22.vout1_d22 */
621 	{VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d23.vout1_d23 */
622 	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
623 	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
624 	{RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
625 	{RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
626 	{RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
627 	{RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
628 	{RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
629 	{RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
630 	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
631 	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
632 	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
633 	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
634 	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
635 	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
636 	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
637 	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
638 	{GPIO6_14, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_14.i2c3_sda */
639 	{GPIO6_15, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_15.i2c3_scl */
640 	{GPIO6_16, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
641 	{XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.atl_clk2 */
642 	{MCASP1_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp1_aclkx.mcasp1_aclkx */
643 	{MCASP1_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp1_fsx.mcasp1_fsx */
644 	{MCASP1_AXR0, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE15)},	/* mcasp1_axr0.mcasp1_axr0 */
645 	{MCASP1_AXR1, (M0 | PIN_INPUT_SLEW)},	/* mcasp1_axr1.mcasp1_axr1 */
646 	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
647 	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
648 	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
649 	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
650 	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
651 	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
652 	{MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
653 	{MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},	/* mcasp1_axr13.mcasp7_axr1 */
654 	{MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
655 	{MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
656 	{MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkr.mcasp2_aclkr */
657 	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
658 	{MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.mcasp3_fsx */
659 	{MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_axr0.mcasp3_axr0 */
660 	{MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},	/* mcasp3_axr1.mcasp3_axr1 */
661 	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
662 	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
663 	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
664 	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
665 	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
666 	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
667 	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)},	/* mmc1_sdcd.gpio6_27 */
668 	{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},	/* mmc1_sdwp.gpio6_28 */
669 	{GPIO6_11, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_11.gpio6_11 */
670 	{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.spi1_sclk */
671 	{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.spi1_d1 */
672 	{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.spi1_d0 */
673 	{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},	/* spi1_cs0.spi1_cs0 */
674 	{SPI1_CS1, (M14 | PIN_OUTPUT)},		/* spi1_cs1.gpio7_11 */
675 	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
676 	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
677 	{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.uart3_rxd */
678 	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
679 	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
680 	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
681 	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
682 	{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.gpio1_15 */
683 	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
684 	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
685 	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_ctsn.mmc4_clk */
686 	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_rtsn.mmc4_cmd */
687 	{UART2_RXD, (M3 | PIN_INPUT_PULLUP)},	/* N/A.mmc4_dat0 */
688 	{UART2_TXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_txd.mmc4_dat1 */
689 	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.mmc4_dat2 */
690 	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
691 	{I2C2_SDA, (M0 | PIN_INPUT_PULLUP)},	/* i2c2_sda.i2c2_sda */
692 	{I2C2_SCL, (M0 | PIN_INPUT_PULLUP)},	/* i2c2_scl.i2c2_scl */
693 	{WAKEUP0, (M15 | PULL_UP)},	/* Wakeup0.safe for dcan1_rx */
694 	{WAKEUP2, (M14)},		/* Wakeup2.gpio1_2 */
695 };
696 
697 const struct pad_conf_entry dra76x_core_padconf_array[] = {
698 	{GPMC_AD0, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad0.vout3_d0 */
699 	{GPMC_AD1, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad1.vout3_d1 */
700 	{GPMC_AD2, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad2.vout3_d2 */
701 	{GPMC_AD3, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad3.vout3_d3 */
702 	{GPMC_AD4, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad4.vout3_d4 */
703 	{GPMC_AD5, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad5.vout3_d5 */
704 	{GPMC_AD6, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad6.vout3_d6 */
705 	{GPMC_AD7, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad7.vout3_d7 */
706 	{GPMC_AD8, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad8.vout3_d8 */
707 	{GPMC_AD9, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad9.vout3_d9 */
708 	{GPMC_AD10, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad10.vout3_d10 */
709 	{GPMC_AD11, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad11.vout3_d11 */
710 	{GPMC_AD12, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad12.vout3_d12 */
711 	{GPMC_AD13, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad13.vout3_d13 */
712 	{GPMC_AD14, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad14.vout3_d14 */
713 	{GPMC_AD15, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad15.vout3_d15 */
714 	{GPMC_A0, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a0.vout3_d16 */
715 	{GPMC_A1, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a1.vout3_d17 */
716 	{GPMC_A2, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a2.vout3_d18 */
717 	{GPMC_A3, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a3.vout3_d19 */
718 	{GPMC_A4, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a4.vout3_d20 */
719 	{GPMC_A5, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a5.vout3_d21 */
720 	{GPMC_A6, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a6.vout3_d22 */
721 	{GPMC_A7, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a7.vout3_d23 */
722 	{GPMC_A8, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a8.vout3_hsync */
723 	{GPMC_A9, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a9.vout3_vsync */
724 	{GPMC_A10, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a10.vout3_de */
725 	{GPMC_A11, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_a11.gpio2_1 */
726 	{GPMC_A12, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_a12.gpio2_2 */
727 	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
728 	{GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
729 	{GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
730 	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
731 	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
732 	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
733 	{GPMC_A19, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a19.mmc2_dat4 */
734 	{GPMC_A20, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a20.mmc2_dat5 */
735 	{GPMC_A21, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a21.mmc2_dat6 */
736 	{GPMC_A22, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a22.mmc2_dat7 */
737 	{GPMC_A23, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a23.mmc2_clk */
738 	{GPMC_A24, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a24.mmc2_dat0 */
739 	{GPMC_A25, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a25.mmc2_dat1 */
740 	{GPMC_A26, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a26.mmc2_dat2 */
741 	{GPMC_A27, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a27.mmc2_dat3 */
742 	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
743 	{GPMC_CS0, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_cs0.gpmc_cs0 */
744 	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
745 	{GPMC_CS3, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs3.vout3_clk */
746 	{GPMC_ADVN_ALE, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_advn_ale.gpmc_advn_ale */
747 	{GPMC_OEN_REN, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_oen_ren.gpmc_oen_ren */
748 	{GPMC_WEN, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_wen.gpmc_wen */
749 	{GPMC_BEN0, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_ben0.gpmc_ben0 */
750 	{GPMC_WAIT0, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* gpmc_wait0.gpmc_wait0 */
751 	{VIN1A_FLD0, (M14 | PIN_INPUT_PULLUP)},	/* vin1a_fld0.gpio3_1 */
752 	{VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_clk0.vin2a_clk0 */
753 	{VIN2A_DE0, (M15 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_de0.Driveroff */
754 	{VIN2A_FLD0, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_fld0.gpio3_30 */
755 	{VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_hsync0.vin2a_hsync0 */
756 	{VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_vsync0.vin2a_vsync0 */
757 	{VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d0.vin2a_d0 */
758 	{VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d1.vin2a_d1 */
759 	{VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d2.vin2a_d2 */
760 	{VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d3.vin2a_d3 */
761 	{VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d4.vin2a_d4 */
762 	{VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d5.vin2a_d5 */
763 	{VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d6.vin2a_d6 */
764 	{VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d7.vin2a_d7 */
765 	{VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d8.vin2a_d8 */
766 	{VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d9.vin2a_d9 */
767 	{VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d10.vin2a_d10 */
768 	{VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d11.vin2a_d11 */
769 	{VIN2A_D12, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
770 	{VIN2A_D13, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
771 	{VIN2A_D14, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
772 	{VIN2A_D15, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
773 	{VIN2A_D16, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
774 	{VIN2A_D17, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
775 	{VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
776 	{VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
777 	{VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
778 	{VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
779 	{VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
780 	{VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
781 	{VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_clk.vout1_clk */
782 	{VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_de.vout1_de */
783 	{VOUT1_FLD, (M14 | PIN_INPUT_PULLUP)},	/* vout1_fld.gpio4_21 */
784 	{VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_hsync.vout1_hsync */
785 	{VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_vsync.vout1_vsync */
786 	{VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d0.vout1_d0 */
787 	{VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d1.vout1_d1 */
788 	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d2.vout1_d2 */
789 	{VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d3.vout1_d3 */
790 	{VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d4.vout1_d4 */
791 	{VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d5.vout1_d5 */
792 	{VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d6.vout1_d6 */
793 	{VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d7.vout1_d7 */
794 	{VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d8.vout1_d8 */
795 	{VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d9.vout1_d9 */
796 	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d10.vout1_d10 */
797 	{VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d11.vout1_d11 */
798 	{VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d12.vout1_d12 */
799 	{VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d13.vout1_d13 */
800 	{VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d14.vout1_d14 */
801 	{VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d15.vout1_d15 */
802 	{VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d16.vout1_d16 */
803 	{VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d17.vout1_d17 */
804 	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d18.vout1_d18 */
805 	{VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d19.vout1_d19 */
806 	{VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d20.vout1_d20 */
807 	{VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d21.vout1_d21 */
808 	{VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d22.vout1_d22 */
809 	{VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d23.vout1_d23 */
810 	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
811 	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
812 	{RGMII0_TXC, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
813 	{RGMII0_TXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
814 	{RGMII0_TXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
815 	{RGMII0_TXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
816 	{RGMII0_TXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
817 	{RGMII0_TXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
818 	{RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
819 	{RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
820 	{RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
821 	{RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
822 	{RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
823 	{RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
824 	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
825 	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
826 	{GPIO6_14, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_14.i2c3_sda */
827 	{GPIO6_15, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_15.i2c3_scl */
828 	{GPIO6_16, (M0 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
829 	{XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.atl_clk2 */
830 	{MCASP1_ACLKX, (M14 | 0x00070000)},	/* mcasp1_aclkx.gpio7_31 */
831 	{MCASP1_FSX, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mcasp1_fsx.gpio7_30 */
832 	{MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr0.i2c5_sda */
833 	{MCASP1_AXR1, (M10 | 0x000f0000)},	/* mcasp1_axr1.i2c5_scl */
834 	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
835 	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
836 	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
837 	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
838 	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
839 	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
840 	{MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
841 	{MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},	/* mcasp1_axr13.mcasp7_axr1 */
842 	{MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
843 	{MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
844 	{MCASP2_ACLKR, (M15 | PIN_INPUT_PULLUP)},	/* mcasp2_aclkr.Driveroff */
845 	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
846 	{MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.mcasp3_fsx */
847 	{MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_axr0.mcasp3_axr0 */
848 	{MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},	/* mcasp3_axr1.mcasp3_axr1 */
849 	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
850 	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
851 	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
852 	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
853 	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
854 	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
855 	{MMC1_SDCD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mmc1_sdcd.mmc1_sdcd */
856 	{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},	/* mmc1_sdwp.gpio6_28 */
857 	{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.spi1_sclk */
858 	{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.spi1_d1 */
859 	{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.spi1_d0 */
860 	{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},	/* spi1_cs0.spi1_cs0 */
861 	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
862 	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
863 	{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.uart3_rxd */
864 	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
865 	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
866 	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
867 	{DCAN1_TX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_tx.dcan1_tx */
868 	{DCAN1_RX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.dcan1_rx */
869 	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
870 	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
871 	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_ctsn.mmc4_clk */
872 	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_rtsn.mmc4_cmd */
873 	{UART2_RXD, (M3 | PIN_INPUT_PULLUP)},	/* N/A.mmc4_dat0 */
874 	{UART2_TXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_txd.mmc4_dat1 */
875 	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.mmc4_dat2 */
876 	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
877 	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_sda.hdmi1_ddc_scl */
878 	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_scl.hdmi1_ddc_sda */
879 	{WAKEUP0, (M14 | PIN_OUTPUT)},	/* N/A.gpio1_0 */
880 	{WAKEUP1, (M14 | PIN_OUTPUT)},	/* N/A.gpio1_1 */
881 	{WAKEUP2, (M14 | PIN_INPUT)},	/* N/A.gpio1_2 */
882 	{WAKEUP3, (M1 | PIN_OUTPUT)},	/* N/A.sys_nirq1 */
883 };
884 
885 #ifdef CONFIG_IODELAY_RECALIBRATION
886 const struct iodelay_cfg_entry dra742_es1_1_iodelay_cfg_array[] = {
887 	{0x06F0, 480, 0},	/* CFG_RGMII0_RXC_IN */
888 	{0x06FC, 111, 1641},	/* CFG_RGMII0_RXCTL_IN */
889 	{0x0708, 272, 1116},	/* CFG_RGMII0_RXD0_IN */
890 	{0x0714, 243, 1260},	/* CFG_RGMII0_RXD1_IN */
891 	{0x0720, 0, 1614},	/* CFG_RGMII0_RXD2_IN */
892 	{0x072C, 105, 1673},	/* CFG_RGMII0_RXD3_IN */
893 	{0x0740, 0, 0},		/* CFG_RGMII0_TXC_OUT */
894 	{0x074C, 1560, 120},	/* CFG_RGMII0_TXCTL_OUT */
895 	{0x0758, 1570, 120},	/* CFG_RGMII0_TXD0_OUT */
896 	{0x0764, 1500, 120},	/* CFG_RGMII0_TXD1_OUT */
897 	{0x0770, 1775, 120},	/* CFG_RGMII0_TXD2_OUT */
898 	{0x077C, 1875, 120},	/* CFG_RGMII0_TXD3_OUT */
899 	{0x08D0, 0, 0},		/* CFG_VIN1A_CLK0_IN */
900 	{0x08DC, 2600, 0},	/* CFG_VIN1A_D0_IN */
901 	{0x08E8, 2652, 46},	/* CFG_VIN1A_D10_IN */
902 	{0x08F4, 2541, 0},	/* CFG_VIN1A_D11_IN */
903 	{0x0900, 2603, 574},	/* CFG_VIN1A_D12_IN */
904 	{0x090C, 2548, 443},	/* CFG_VIN1A_D13_IN */
905 	{0x0918, 2624, 598},	/* CFG_VIN1A_D14_IN */
906 	{0x0924, 2535, 1027},	/* CFG_VIN1A_D15_IN */
907 	{0x0930, 2526, 818},	/* CFG_VIN1A_D16_IN */
908 	{0x093C, 2623, 797},	/* CFG_VIN1A_D17_IN */
909 	{0x0948, 2578, 888},	/* CFG_VIN1A_D18_IN */
910 	{0x0954, 2574, 1008},	/* CFG_VIN1A_D19_IN */
911 	{0x0960, 2527, 123},	/* CFG_VIN1A_D1_IN */
912 	{0x096C, 2577, 737},	/* CFG_VIN1A_D20_IN */
913 	{0x0978, 2627, 616},	/* CFG_VIN1A_D21_IN */
914 	{0x0984, 2573, 777},	/* CFG_VIN1A_D22_IN */
915 	{0x0990, 2730, 67},	/* CFG_VIN1A_D23_IN */
916 	{0x099C, 2509, 303},	/* CFG_VIN1A_D2_IN */
917 	{0x09A8, 2494, 267},	/* CFG_VIN1A_D3_IN */
918 	{0x09B4, 2474, 0},	/* CFG_VIN1A_D4_IN */
919 	{0x09C0, 2556, 181},	/* CFG_VIN1A_D5_IN */
920 	{0x09CC, 2516, 195},	/* CFG_VIN1A_D6_IN */
921 	{0x09D8, 2589, 210},	/* CFG_VIN1A_D7_IN */
922 	{0x09E4, 2624, 75},	/* CFG_VIN1A_D8_IN */
923 	{0x09F0, 2704, 14},	/* CFG_VIN1A_D9_IN */
924 	{0x09FC, 2469, 55},	/* CFG_VIN1A_DE0_IN */
925 	{0x0A08, 2557, 264},	/* CFG_VIN1A_FLD0_IN */
926 	{0x0A14, 2465, 269},	/* CFG_VIN1A_HSYNC0_IN */
927 	{0x0A20, 2411, 348},	/* CFG_VIN1A_VSYNC0_IN */
928 	{0x0A70, 150, 0},	/* CFG_VIN2A_D12_OUT */
929 	{0x0A7C, 1500, 0},	/* CFG_VIN2A_D13_OUT */
930 	{0x0A88, 1600, 0},	/* CFG_VIN2A_D14_OUT */
931 	{0x0A94, 900, 0},	/* CFG_VIN2A_D15_OUT */
932 	{0x0AA0, 680, 0},	/* CFG_VIN2A_D16_OUT */
933 	{0x0AAC, 500, 0},	/* CFG_VIN2A_D17_OUT */
934 	{0x0AB0, 702, 0},	/* CFG_VIN2A_D18_IN */
935 	{0x0ABC, 136, 976},	/* CFG_VIN2A_D19_IN */
936 	{0x0AD4, 210, 1357},	/* CFG_VIN2A_D20_IN */
937 	{0x0AE0, 189, 1462},	/* CFG_VIN2A_D21_IN */
938 	{0x0AEC, 232, 1278},	/* CFG_VIN2A_D22_IN */
939 	{0x0AF8, 0, 1397},	/* CFG_VIN2A_D23_IN */
940 	{0x0144, 0, 0},         /* CFG_GPMC_A13_IN */
941 	{0x0150, 1976, 1389},   /* CFG_GPMC_A14_IN */
942 	{0x015C, 1872, 1408},   /* CFG_GPMC_A15_IN */
943 	{0x0168, 1914, 1506},   /* CFG_GPMC_A16_IN */
944 	{0x0170, 57, 0},        /* CFG_GPMC_A16_OUT */
945 	{0x0174, 1904, 1471},   /* CFG_GPMC_A17_IN */
946 	{0x0188, 1690, 0},      /* CFG_GPMC_A18_OUT */
947 	{0x0374, 0, 0},         /* CFG_GPMC_CS2_OUT */
948 };
949 
950 const struct iodelay_cfg_entry dra742_es2_0_iodelay_cfg_array[] = {
951 	{0x06F0, 471, 0},	/* CFG_RGMII0_RXC_IN */
952 	{0x06FC, 30, 1919},	/* CFG_RGMII0_RXCTL_IN */
953 	{0x0708, 74, 1688},	/* CFG_RGMII0_RXD0_IN */
954 	{0x0714, 94, 1697},	/* CFG_RGMII0_RXD1_IN */
955 	{0x0720, 0, 1703},	/* CFG_RGMII0_RXD2_IN */
956 	{0x072C, 70, 1804},	/* CFG_RGMII0_RXD3_IN */
957 	{0x0740, 70, 70},	/* CFG_RGMII0_TXC_OUT */
958 	{0x074C, 35, 70},	/* CFG_RGMII0_TXCTL_OUT */
959 	{0x0758, 100, 130},	/* CFG_RGMII0_TXD0_OUT */
960 	{0x0764, 0, 70},	/* CFG_RGMII0_TXD1_OUT */
961 	{0x0770, 0, 0},	/* CFG_RGMII0_TXD2_OUT */
962 	{0x077C, 100, 130},	/* CFG_RGMII0_TXD3_OUT */
963 	{0x08D0, 0, 0},	/* CFG_VIN1A_CLK0_IN */
964 	{0x08DC, 2105, 619},	/* CFG_VIN1A_D0_IN */
965 	{0x08E8, 2107, 739},	/* CFG_VIN1A_D10_IN */
966 	{0x08F4, 2005, 788},	/* CFG_VIN1A_D11_IN */
967 	{0x0900, 2059, 1297},	/* CFG_VIN1A_D12_IN */
968 	{0x090C, 2027, 1141},	/* CFG_VIN1A_D13_IN */
969 	{0x0918, 2071, 1332},	/* CFG_VIN1A_D14_IN */
970 	{0x0924, 1995, 1764},	/* CFG_VIN1A_D15_IN */
971 	{0x0930, 1999, 1542},	/* CFG_VIN1A_D16_IN */
972 	{0x093C, 2072, 1540},	/* CFG_VIN1A_D17_IN */
973 	{0x0948, 2034, 1629},	/* CFG_VIN1A_D18_IN */
974 	{0x0954, 2026, 1761},	/* CFG_VIN1A_D19_IN */
975 	{0x0960, 2017, 757},	/* CFG_VIN1A_D1_IN */
976 	{0x096C, 2037, 1469},	/* CFG_VIN1A_D20_IN */
977 	{0x0978, 2077, 1349},	/* CFG_VIN1A_D21_IN */
978 	{0x0984, 2022, 1545},	/* CFG_VIN1A_D22_IN */
979 	{0x0990, 2168, 784},	/* CFG_VIN1A_D23_IN */
980 	{0x099C, 1996, 962},	/* CFG_VIN1A_D2_IN */
981 	{0x09A8, 1993, 901},	/* CFG_VIN1A_D3_IN */
982 	{0x09B4, 2098, 499},	/* CFG_VIN1A_D4_IN */
983 	{0x09C0, 2038, 844},	/* CFG_VIN1A_D5_IN */
984 	{0x09CC, 2002, 863},	/* CFG_VIN1A_D6_IN */
985 	{0x09D8, 2063, 873},	/* CFG_VIN1A_D7_IN */
986 	{0x09E4, 2088, 759},	/* CFG_VIN1A_D8_IN */
987 	{0x09F0, 2152, 701},	/* CFG_VIN1A_D9_IN */
988 	{0x09FC, 1926, 728},	/* CFG_VIN1A_DE0_IN */
989 	{0x0A08, 2043, 937},	/* CFG_VIN1A_FLD0_IN */
990 	{0x0A14, 1978, 909},	/* CFG_VIN1A_HSYNC0_IN */
991 	{0x0A20, 1926, 987},	/* CFG_VIN1A_VSYNC0_IN */
992 	{0x0A70, 140, 0},	/* CFG_VIN2A_D12_OUT */
993 	{0x0A7C, 90, 70},	/* CFG_VIN2A_D13_OUT */
994 	{0x0A88, 0, 0},	/* CFG_VIN2A_D14_OUT */
995 	{0x0A94, 0, 0},	/* CFG_VIN2A_D15_OUT */
996 	{0x0AA0, 0, 70},	/* CFG_VIN2A_D16_OUT */
997 	{0x0AAC, 0, 0},	/* CFG_VIN2A_D17_OUT */
998 	{0x0AB0, 612, 0},	/* CFG_VIN2A_D18_IN */
999 	{0x0ABC, 4, 927},	/* CFG_VIN2A_D19_IN */
1000 	{0x0AD4, 136, 1340},	/* CFG_VIN2A_D20_IN */
1001 	{0x0AE0, 130, 1450},	/* CFG_VIN2A_D21_IN */
1002 	{0x0AEC, 144, 1269},	/* CFG_VIN2A_D22_IN */
1003 	{0x0AF8, 0, 1330},	/* CFG_VIN2A_D23_IN */
1004 	{0x0144, 0, 0},         /* CFG_GPMC_A13_IN */
1005 	{0x0150, 2575, 966},    /* CFG_GPMC_A14_IN */
1006 	{0x015C, 2503, 889},    /* CFG_GPMC_A15_IN */
1007 	{0x0168, 2528, 1007},   /* CFG_GPMC_A16_IN */
1008 	{0x0170, 0, 0},         /* CFG_GPMC_A16_OUT */
1009 	{0x0174, 2533, 980},    /* CFG_GPMC_A17_IN */
1010 	{0x0188, 590, 0},       /* CFG_GPMC_A18_OUT */
1011 	{0x0374, 0, 0},         /* CFG_GPMC_CS2_OUT */
1012 };
1013 
1014 const struct iodelay_cfg_entry dra76x_es1_0_iodelay_cfg_array[] = {
1015 	{0x011C, 787, 0},	/* CFG_GPMC_A0_OUT */
1016 	{0x0128, 1181, 0},	/* CFG_GPMC_A10_OUT */
1017 	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
1018 	{0x0150, 2149, 1052},	/* CFG_GPMC_A14_IN */
1019 	{0x015C, 2121, 997},	/* CFG_GPMC_A15_IN */
1020 	{0x0168, 2159, 1134},	/* CFG_GPMC_A16_IN */
1021 	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
1022 	{0x0174, 2135, 1085},	/* CFG_GPMC_A17_IN */
1023 	{0x0188, 0, 0},	/* CFG_GPMC_A18_OUT */
1024 	{0x01A0, 592, 0},	/* CFG_GPMC_A1_OUT */
1025 	{0x020C, 641, 0},	/* CFG_GPMC_A2_OUT */
1026 	{0x0218, 1481, 0},	/* CFG_GPMC_A3_OUT */
1027 	{0x0224, 1775, 0},	/* CFG_GPMC_A4_OUT */
1028 	{0x0230, 785, 0},	/* CFG_GPMC_A5_OUT */
1029 	{0x023C, 848, 0},	/* CFG_GPMC_A6_OUT */
1030 	{0x0248, 851, 0},	/* CFG_GPMC_A7_OUT */
1031 	{0x0254, 1783, 0},	/* CFG_GPMC_A8_OUT */
1032 	{0x0260, 951, 0},	/* CFG_GPMC_A9_OUT */
1033 	{0x026C, 1091, 0},	/* CFG_GPMC_AD0_OUT */
1034 	{0x0278, 1027, 0},	/* CFG_GPMC_AD10_OUT */
1035 	{0x0284, 824, 0},	/* CFG_GPMC_AD11_OUT */
1036 	{0x0290, 1196, 0},	/* CFG_GPMC_AD12_OUT */
1037 	{0x029C, 754, 0},	/* CFG_GPMC_AD13_OUT */
1038 	{0x02A8, 665, 0},	/* CFG_GPMC_AD14_OUT */
1039 	{0x02B4, 1027, 0},	/* CFG_GPMC_AD15_OUT */
1040 	{0x02C0, 937, 0},	/* CFG_GPMC_AD1_OUT */
1041 	{0x02CC, 1168, 0},	/* CFG_GPMC_AD2_OUT */
1042 	{0x02D8, 872, 0},	/* CFG_GPMC_AD3_OUT */
1043 	{0x02E4, 1092, 0},	/* CFG_GPMC_AD4_OUT */
1044 	{0x02F0, 576, 0},	/* CFG_GPMC_AD5_OUT */
1045 	{0x02FC, 1113, 0},	/* CFG_GPMC_AD6_OUT */
1046 	{0x0308, 943, 0},	/* CFG_GPMC_AD7_OUT */
1047 	{0x0314, 0, 0},	/* CFG_GPMC_AD8_OUT */
1048 	{0x0320, 0, 0},	/* CFG_GPMC_AD9_OUT */
1049 	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
1050 	{0x0380, 1801, 948},	/* CFG_GPMC_CS3_OUT */
1051 	{0x06F0, 451, 0},	/* CFG_RGMII0_RXC_IN */
1052 	{0x06FC, 127, 1571},	/* CFG_RGMII0_RXCTL_IN */
1053 	{0x0708, 165, 1178},	/* CFG_RGMII0_RXD0_IN */
1054 	{0x0714, 136, 1302},	/* CFG_RGMII0_RXD1_IN */
1055 	{0x0720, 0, 1520},	/* CFG_RGMII0_RXD2_IN */
1056 	{0x072C, 28, 1690},	/* CFG_RGMII0_RXD3_IN */
1057 	{0x0740, 121, 0},	/* CFG_RGMII0_TXC_OUT */
1058 	{0x074C, 60, 0},	/* CFG_RGMII0_TXCTL_OUT */
1059 	{0x0758, 153, 0},	/* CFG_RGMII0_TXD0_OUT */
1060 	{0x0764, 35, 0},	/* CFG_RGMII0_TXD1_OUT */
1061 	{0x0770, 0, 0},	/* CFG_RGMII0_TXD2_OUT */
1062 	{0x077C, 172, 0},	/* CFG_RGMII0_TXD3_OUT */
1063 	{0x0A38, 0, 0},	/* CFG_VIN2A_CLK0_IN */
1064 	{0x0A44, 2180, 0},	/* CFG_VIN2A_D0_IN */
1065 	{0x0A50, 2297, 110},	/* CFG_VIN2A_D10_IN */
1066 	{0x0A5C, 1938, 0},	/* CFG_VIN2A_D11_IN */
1067 	{0x0A70, 147, 0},	/* CFG_VIN2A_D12_OUT */
1068 	{0x0A7C, 110, 0},	/* CFG_VIN2A_D13_OUT */
1069 	{0x0A88, 18, 0},	/* CFG_VIN2A_D14_OUT */
1070 	{0x0A94, 82, 0},	/* CFG_VIN2A_D15_OUT */
1071 	{0x0AA0, 33, 0},	/* CFG_VIN2A_D16_OUT */
1072 	{0x0AAC, 0, 0},	/* CFG_VIN2A_D17_OUT */
1073 	{0x0AB0, 417, 0},	/* CFG_VIN2A_D18_IN */
1074 	{0x0ABC, 156, 843},	/* CFG_VIN2A_D19_IN */
1075 	{0x0AC8, 2326, 309},	/* CFG_VIN2A_D1_IN */
1076 	{0x0AD4, 223, 1413},	/* CFG_VIN2A_D20_IN */
1077 	{0x0AE0, 169, 1415},	/* CFG_VIN2A_D21_IN */
1078 	{0x0AEC, 43, 1150},	/* CFG_VIN2A_D22_IN */
1079 	{0x0AF8, 0, 1210},	/* CFG_VIN2A_D23_IN */
1080 	{0x0B04, 2057, 0},	/* CFG_VIN2A_D2_IN */
1081 	{0x0B10, 2440, 257},	/* CFG_VIN2A_D3_IN */
1082 	{0x0B1C, 2142, 0},	/* CFG_VIN2A_D4_IN */
1083 	{0x0B28, 2455, 252},	/* CFG_VIN2A_D5_IN */
1084 	{0x0B34, 1883, 0},	/* CFG_VIN2A_D6_IN */
1085 	{0x0B40, 2229, 0},	/* CFG_VIN2A_D7_IN */
1086 	{0x0B4C, 2250, 151},	/* CFG_VIN2A_D8_IN */
1087 	{0x0B58, 2279, 27},	/* CFG_VIN2A_D9_IN */
1088 	{0x0B7C, 2233, 0},	/* CFG_VIN2A_HSYNC0_IN */
1089 	{0x0B88, 1936, 0},	/* CFG_VIN2A_VSYNC0_IN */
1090 	{0x0B9C, 1281, 497},	/* CFG_VOUT1_CLK_OUT */
1091 	{0x0BA8, 379, 0},	/* CFG_VOUT1_D0_OUT */
1092 	{0x0BB4, 441, 0},	/* CFG_VOUT1_D10_OUT */
1093 	{0x0BC0, 461, 0},	/* CFG_VOUT1_D11_OUT */
1094 	{0x0BCC, 1189, 0},	/* CFG_VOUT1_D12_OUT */
1095 	{0x0BD8, 312, 0},	/* CFG_VOUT1_D13_OUT */
1096 	{0x0BE4, 298, 0},	/* CFG_VOUT1_D14_OUT */
1097 	{0x0BF0, 284, 0},	/* CFG_VOUT1_D15_OUT */
1098 	{0x0BFC, 152, 0},	/* CFG_VOUT1_D16_OUT */
1099 	{0x0C08, 216, 0},	/* CFG_VOUT1_D17_OUT */
1100 	{0x0C14, 408, 0},	/* CFG_VOUT1_D18_OUT */
1101 	{0x0C20, 519, 0},	/* CFG_VOUT1_D19_OUT */
1102 	{0x0C2C, 475, 0},	/* CFG_VOUT1_D1_OUT */
1103 	{0x0C38, 316, 0},	/* CFG_VOUT1_D20_OUT */
1104 	{0x0C44, 59, 0},	/* CFG_VOUT1_D21_OUT */
1105 	{0x0C50, 221, 0},	/* CFG_VOUT1_D22_OUT */
1106 	{0x0C5C, 96, 0},	/* CFG_VOUT1_D23_OUT */
1107 	{0x0C68, 264, 0},	/* CFG_VOUT1_D2_OUT */
1108 	{0x0C74, 421, 0},	/* CFG_VOUT1_D3_OUT */
1109 	{0x0C80, 1257, 0},	/* CFG_VOUT1_D4_OUT */
1110 	{0x0C8C, 432, 0},	/* CFG_VOUT1_D5_OUT */
1111 	{0x0C98, 436, 0},	/* CFG_VOUT1_D6_OUT */
1112 	{0x0CA4, 440, 0},	/* CFG_VOUT1_D7_OUT */
1113 	{0x0CB0, 81, 100},	/* CFG_VOUT1_D8_OUT */
1114 	{0x0CBC, 471, 0},	/* CFG_VOUT1_D9_OUT */
1115 	{0x0CC8, 0, 0},	/* CFG_VOUT1_DE_OUT */
1116 	{0x0CE0, 0, 0},	/* CFG_VOUT1_HSYNC_OUT */
1117 	{0x0CEC, 815, 0},	/* CFG_VOUT1_VSYNC_OUT */
1118 };
1119 #endif
1120 
1121 #endif /* _MUX_DATA_DRA7XX_H_ */
1122