1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated, <www.ti.com> 4 * 5 * Sricharan R <r.sricharan@ti.com> 6 * Nishant Kamat <nskamat@ti.com> 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 #ifndef _MUX_DATA_DRA7XX_H_ 27 #define _MUX_DATA_DRA7XX_H_ 28 29 #include <asm/arch/mux_dra7xx.h> 30 31 const struct pad_conf_entry core_padconf_array_essential[] = { 32 {MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */ 33 {MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */ 34 {MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */ 35 {MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */ 36 {MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */ 37 {MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */ 38 {MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */ 39 {MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */ 40 {GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */ 41 {GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */ 42 {GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */ 43 {GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */ 44 {GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */ 45 {GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */ 46 {GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */ 47 {GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */ 48 {GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */ 49 {GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */ 50 {UART1_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_RXD */ 51 {UART1_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_TXD */ 52 {UART1_CTSN, (IEN | PTU | PDIS | M3)}, /* UART1_CTSN */ 53 {UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */ 54 {I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */ 55 {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */ 56 }; 57 #endif /* _MUX_DATA_DRA7XX_H_ */ 58