xref: /openbmc/u-boot/board/ti/am65x/README (revision 88dc4099)
1Introduction:
2-------------
3The AM65x family of SoCs is the first device family from K3 Multicore
4SoC architecture, targeted for broad market and industrial control with
5aim to meet the complex processing needs of modern embedded products.
6
7The device is built over three domains, each containing specific processing
8cores, voltage domains and peripherals:
91. Wake-up (WKUP) domain:
10	- Device Management and Security Controller (DMSC)
112. Microcontroller (MCU) domain:
12	- Dual Core ARM Cortex-R5F processor
133. MAIN domain:
14	- Quad core 64-bit ARM Cortex-A53
15
16More info can be found in TRM: http://www.ti.com/lit/pdf/spruid7
17
18Boot Flow:
19----------
20On AM65x family devices, ROM supports boot only via MCU(R5). This means that
21bootloader has to run on R5 core. In order to meet this constraint, and for
22the following reasons the boot flow is designed as mentioned:
231. Need to move away from R5 asap, so that we want to start *any*
24firmware on the r5 cores like.... autosar can be loaded to receive CAN
25response and other safety operations to be started. This operation is
26very time critical and is applicable for all automotive use cases.
272. U-Boot on A53 should start other remotecores for various
28applications. This should happen before running Linux.
293. In production boot flow, we might not like to use full u-boot,
30instead use Flacon boot flow to reduce boot time.
31
32+------------------------------------------------------------------------+
33|        DMSC            |         R5            |        A53            |
34+------------------------------------------------------------------------+
35|    +--------+          |                       |                       |
36|    |  Reset |          |                       |                       |
37|    +--------+          |                       |                       |
38|         :              |                       |                       |
39|    +--------+          |   +-----------+       |                       |
40|    | *rom*  |----------|-->| Reset rls |       |                       |
41|    +--------+          |   +-----------+       |                       |
42|    |        |          |         :             |                       |
43|    |  rom   |          |         :             |                       |
44|    |services|          |         :             |                       |
45|    |        |          |   +-------------+     |                       |
46|    |        |          |   |  *R5 rom*   |     |                       |
47|    |        |          |   +-------------+     |                       |
48|    |        |<---------|---|Load and auth|     |                       |
49|    |        |          |   | tiboot3.bin |     |                       |
50|    |        |          |   +-------------+     |                       |
51|    |        |          |         :             |                       |
52|    |        |          |         :             |                       |
53|    |        |          |         :             |                       |
54|    |        |          |   +-------------+     |                       |
55|    | Start  |          |   |  *R5 SPL*   |     |                       |
56|    | System |          |   +-------------+     |                       |
57|    |Firmware|<---------|---|Load and auth|     |                       |
58|    +--------+          |   |  sysfw bin  |     |                       |
59|        :               |   +-------------+     |                       |
60|    +---------+         |   |     DDR     |     |                       |
61|    | *SYSFW* |         |   |    config   |     |                       |
62|    +---------+         |   +-------------+     |                       |
63|    |         |<--------|---|    Load     |     |                       |
64|    |         |         |   |  tispl.bin  |     |                       |
65|    |         |         |   +-------------+     |                       |
66|    |         |<--------|---| Start A53   |     |                       |
67|    |         |         |   |  and Reset  |     |                       |
68|    |         |         |   +-------------+     |                       |
69|    |         |         |                       |     +-----------+     |
70|    |         |---------|-----------------------|---->| Reset rls |     |
71|    |         |         |                       |     +-----------+     |
72|    |  DMSC   |         |                       |          :            |
73|    |Services |         |                       |     +-----------+     |
74|    |         |<--------|-----------------------|---->|*ATF/OPTEE*|     |
75|    |         |         |                       |     +-----------+     |
76|    |         |         |                       |          :            |
77|    |         |         |                       |     +-----------+     |
78|    |         |<--------|-----------------------|---->| *A53 SPL* |     |
79|    |         |         |                       |     +-----------+     |
80|    |         |         |                       |     |   Load    |     |
81|    |         |         |                       |     | u-boot.img|     |
82|    |         |         |                       |     +-----------+     |
83|    |         |         |                       |          :            |
84|    |         |         |                       |     +-----------+     |
85|    |         |<--------|-----------------------|---->| *u-boot*  |     |
86|    |         |         |                       |     +-----------+     |
87|    |         |         |                       |     |  prompt   |     |
88|    |         |         |                       |     +-----------+     |
89|    +---------+         |                       |                       |
90|                        |                       |                       |
91+------------------------------------------------------------------------+
92
93- Here DMSC acts as master and provides all the critical services. R5/A53
94requests DMSC to get these services done as shown in the above diagram.
95
96Sources:
97--------
981. SYSFW:
99	System Firmware repo is closed source and the binaries are delivered
100	to users with NDA. Please contact TI to get the System Firmware
101	Binary named ti-sci-firmware-am6x.bin that runs on AM65x SoC.
102
1032. ATF:
104	Tree: https://github.com/ARM-software/arm-trusted-firmware.git
105	Branch: master
106
1073. OPTEE:
108	Tree: https://github.com/OP-TEE/optee_os.git
109	Branch: master
110
1114. U-Boot:
112	Tree: http://git.denx.de/u-boot.git
113	Branch: master
114
115Build procedure:
116----------------
1171. SYSFW:
118	ROM expects a signed binary that contains the X509 certificate. So
119the binary ti-sci-firmware-am6x.bin cannot be uses as-is and needs to be signed.
120Contact TI on the procedure to sign the system firmware binary.
121
1222. ATF:
123$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
124
1253. OPTEE:
126$ make PLATFORM=k3-am65x CFG_ARM64_core=y
127
1284. U-Boot:
129
1304.1. R5:
131	TBD.
132
1334.2. A53:
134$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- am65x_evm_a53_defconfig O=/tmp/a53
135$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu-  ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager.bin O=/tmp/a53
136
137Target Images
138--------------
139Copy the below images to an SD card and boot:
140- tiboot3.bin from step 4.1
141- tispl.bin, u-boot.img from 4.2
142