174cc8b09SKipisz, Steven /* 274cc8b09SKipisz, Steven * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com 374cc8b09SKipisz, Steven * 474cc8b09SKipisz, Steven * Author: Felipe Balbi <balbi@ti.com> 574cc8b09SKipisz, Steven * 674cc8b09SKipisz, Steven * Based on board/ti/dra7xx/evm.c 774cc8b09SKipisz, Steven * 874cc8b09SKipisz, Steven * SPDX-License-Identifier: GPL-2.0+ 974cc8b09SKipisz, Steven */ 1074cc8b09SKipisz, Steven #ifndef _MUX_DATA_BEAGLE_X15_H_ 1174cc8b09SKipisz, Steven #define _MUX_DATA_BEAGLE_X15_H_ 1274cc8b09SKipisz, Steven 1374cc8b09SKipisz, Steven #include <asm/arch/mux_dra7xx.h> 1474cc8b09SKipisz, Steven 15c020d355SSteve Kipisz const struct pad_conf_entry core_padconf_array_essential_x15[] = { 1689a38953SNishanth Menon {GPMC_AD0, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad0.vin3a_d0 */ 1789a38953SNishanth Menon {GPMC_AD1, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad1.vin3a_d1 */ 1889a38953SNishanth Menon {GPMC_AD2, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad2.vin3a_d2 */ 1989a38953SNishanth Menon {GPMC_AD3, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad3.vin3a_d3 */ 2089a38953SNishanth Menon {GPMC_AD4, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad4.vin3a_d4 */ 2189a38953SNishanth Menon {GPMC_AD5, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad5.vin3a_d5 */ 2289a38953SNishanth Menon {GPMC_AD6, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad6.vin3a_d6 */ 2389a38953SNishanth Menon {GPMC_AD7, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad7.vin3a_d7 */ 2489a38953SNishanth Menon {GPMC_AD8, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad8.vin3a_d8 */ 2589a38953SNishanth Menon {GPMC_AD9, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad9.vin3a_d9 */ 2689a38953SNishanth Menon {GPMC_AD10, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad10.vin3a_d10 */ 2789a38953SNishanth Menon {GPMC_AD11, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad11.vin3a_d11 */ 2889a38953SNishanth Menon {GPMC_AD12, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad12.vin3a_d12 */ 2989a38953SNishanth Menon {GPMC_AD13, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad13.vin3a_d13 */ 3089a38953SNishanth Menon {GPMC_AD14, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad14.vin3a_d14 */ 3189a38953SNishanth Menon {GPMC_AD15, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad15.vin3a_d15 */ 3274cc8b09SKipisz, Steven {GPMC_A0, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a0.vin3a_d16 */ 3374cc8b09SKipisz, Steven {GPMC_A1, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a1.vin3a_d17 */ 3474cc8b09SKipisz, Steven {GPMC_A2, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a2.vin3a_d18 */ 3574cc8b09SKipisz, Steven {GPMC_A3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a3.vin3a_d19 */ 3674cc8b09SKipisz, Steven {GPMC_A4, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a4.vin3a_d20 */ 3774cc8b09SKipisz, Steven {GPMC_A5, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a5.vin3a_d21 */ 3874cc8b09SKipisz, Steven {GPMC_A6, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a6.vin3a_d22 */ 3974cc8b09SKipisz, Steven {GPMC_A7, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a7.vin3a_d23 */ 4074cc8b09SKipisz, Steven {GPMC_A8, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a8.vin3a_hsync0 */ 4174cc8b09SKipisz, Steven {GPMC_A9, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a9.vin3a_vsync0 */ 4274cc8b09SKipisz, Steven {GPMC_A10, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a10.vin3a_de0 */ 4374cc8b09SKipisz, Steven {GPMC_A11, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a11.vin3a_fld0 */ 4474cc8b09SKipisz, Steven {GPMC_A12, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a12.gpio2_2 */ 4574cc8b09SKipisz, Steven {GPMC_A13, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a13.gpio2_3 */ 4674cc8b09SKipisz, Steven {GPMC_A14, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a14.gpio2_4 */ 4774cc8b09SKipisz, Steven {GPMC_A15, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a15.gpio2_5 */ 4874cc8b09SKipisz, Steven {GPMC_A16, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a16.gpio2_6 */ 4974cc8b09SKipisz, Steven {GPMC_A17, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a17.gpio2_7 */ 5074cc8b09SKipisz, Steven {GPMC_A18, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a18.gpio2_8 */ 5174cc8b09SKipisz, Steven {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 5274cc8b09SKipisz, Steven {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 5374cc8b09SKipisz, Steven {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 5474cc8b09SKipisz, Steven {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 5574cc8b09SKipisz, Steven {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 5674cc8b09SKipisz, Steven {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 5774cc8b09SKipisz, Steven {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 5874cc8b09SKipisz, Steven {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 5974cc8b09SKipisz, Steven {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 6074cc8b09SKipisz, Steven {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 6174cc8b09SKipisz, Steven {GPMC_CS0, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_cs0.gpio2_19 */ 6274cc8b09SKipisz, Steven {GPMC_CS2, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_cs2.gpio2_20 */ 6389a38953SNishanth Menon {GPMC_CS3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_cs3.vin3a_clk0 */ 6474cc8b09SKipisz, Steven {GPMC_CLK, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_clk.dma_evt1 */ 6574cc8b09SKipisz, Steven {GPMC_ADVN_ALE, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_advn_ale.gpio2_23 */ 6674cc8b09SKipisz, Steven {GPMC_OEN_REN, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_oen_ren.gpio2_24 */ 6774cc8b09SKipisz, Steven {GPMC_WEN, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_wen.gpio2_25 */ 6874cc8b09SKipisz, Steven {GPMC_BEN0, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_ben0.dma_evt3 */ 6974cc8b09SKipisz, Steven {GPMC_BEN1, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_ben1.dma_evt4 */ 70*d9e14671SLokesh Vutla {GPMC_WAIT0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* gpmc_wait0.gpio2_28 */ 71*d9e14671SLokesh Vutla {VIN1B_CLK1, (M14 | PIN_INPUT_SLEW)}, /* vin1b_clk1.gpio2_31 */ 7274cc8b09SKipisz, Steven {VIN1A_D2, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d2.gpio3_6 */ 7374cc8b09SKipisz, Steven {VIN1A_D3, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d3.gpio3_7 */ 7474cc8b09SKipisz, Steven {VIN1A_D4, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d4.gpio3_8 */ 7574cc8b09SKipisz, Steven {VIN1A_D5, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d5.gpio3_9 */ 7674cc8b09SKipisz, Steven {VIN1A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d6.gpio3_10 */ 7774cc8b09SKipisz, Steven {VIN1A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d7.gpio3_11 */ 7874cc8b09SKipisz, Steven {VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d8.gpio3_12 */ 7974cc8b09SKipisz, Steven {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */ 8074cc8b09SKipisz, Steven {VIN1A_D11, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d11.gpio3_15 */ 8174cc8b09SKipisz, Steven {VIN1A_D12, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d12.gpio3_16 */ 8274cc8b09SKipisz, Steven {VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d14.gpio3_18 */ 8374cc8b09SKipisz, Steven {VIN1A_D16, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d16.gpio3_20 */ 8474cc8b09SKipisz, Steven {VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d19.gpio3_23 */ 8574cc8b09SKipisz, Steven {VIN1A_D20, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d20.gpio3_24 */ 8674cc8b09SKipisz, Steven {VIN1A_D22, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d22.gpio3_26 */ 8774cc8b09SKipisz, Steven {VIN2A_CLK0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_clk0.gpio3_28 */ 8874cc8b09SKipisz, Steven {VIN2A_DE0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_de0.gpio3_29 */ 8974cc8b09SKipisz, Steven {VIN2A_FLD0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_fld0.gpio3_30 */ 90*d9e14671SLokesh Vutla {VIN2A_HSYNC0, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.pr1_uart0_cts_n */ 9189a38953SNishanth Menon {VIN2A_VSYNC0, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_vsync0.pr1_uart0_rts_n */ 92*d9e14671SLokesh Vutla {VIN2A_D0, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_d0.pr1_uart0_rxd */ 93*d9e14671SLokesh Vutla {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */ 94*d9e14671SLokesh Vutla {VIN2A_D2, (M8 | PIN_INPUT_PULLUP)}, /* vin2a_d2.uart10_rxd */ 95*d9e14671SLokesh Vutla {VIN2A_D3, (M8 | PIN_OUTPUT)}, /* vin2a_d3.uart10_txd */ 96*d9e14671SLokesh Vutla {VIN2A_D4, (M8 | PIN_INPUT_PULLUP)}, /* vin2a_d4.uart10_ctsn */ 97*d9e14671SLokesh Vutla {VIN2A_D5, (M8 | PIN_OUTPUT_PULLUP)}, /* vin2a_d5.uart10_rtsn */ 9874cc8b09SKipisz, Steven {VIN2A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.gpio4_7 */ 9974cc8b09SKipisz, Steven {VIN2A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.gpio4_8 */ 10074cc8b09SKipisz, Steven {VIN2A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.gpio4_9 */ 10174cc8b09SKipisz, Steven {VIN2A_D9, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.gpio4_10 */ 10289a38953SNishanth Menon {VIN2A_D10, (M10 | PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.ehrpwm2B */ 10374cc8b09SKipisz, Steven {VIN2A_D11, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d11.ehrpwm2_tripzone_input */ 10489a38953SNishanth Menon {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 10589a38953SNishanth Menon {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 10689a38953SNishanth Menon {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 10789a38953SNishanth Menon {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 10889a38953SNishanth Menon {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 10989a38953SNishanth Menon {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 11089a38953SNishanth Menon {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 11189a38953SNishanth Menon {VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 11289a38953SNishanth Menon {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 11389a38953SNishanth Menon {VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 11489a38953SNishanth Menon {VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 11589a38953SNishanth Menon {VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 11674cc8b09SKipisz, Steven {VOUT1_FLD, (M14 | PIN_INPUT)}, /* vout1_fld.gpio4_21 */ 117*d9e14671SLokesh Vutla {MDIO_MCLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 118*d9e14671SLokesh Vutla {MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mdio_d.mdio_d */ 11974cc8b09SKipisz, Steven {RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)}, /* RMII_MHZ_50_CLK.gpio5_17 */ 120*d9e14671SLokesh Vutla {UART3_RXD, (M14 | PIN_INPUT_SLEW)}, /* uart3_rxd.gpio5_18 */ 121*d9e14671SLokesh Vutla {UART3_TXD, (M14 | PIN_INPUT_SLEW)}, /* uart3_txd.gpio5_19 */ 12289a38953SNishanth Menon {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 12389a38953SNishanth Menon {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 12489a38953SNishanth Menon {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 12589a38953SNishanth Menon {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 12689a38953SNishanth Menon {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 12789a38953SNishanth Menon {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 12889a38953SNishanth Menon {RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 12989a38953SNishanth Menon {RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 13089a38953SNishanth Menon {RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 13189a38953SNishanth Menon {RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 13289a38953SNishanth Menon {RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 13389a38953SNishanth Menon {RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 134*d9e14671SLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb1_drvvbus.usb1_drvvbus */ 135*d9e14671SLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* usb2_drvvbus.usb2_drvvbus */ 13674cc8b09SKipisz, Steven {GPIO6_14, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_14.timer1 */ 13774cc8b09SKipisz, Steven {GPIO6_15, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_15.timer2 */ 13874cc8b09SKipisz, Steven {GPIO6_16, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_16.timer3 */ 13989a38953SNishanth Menon {XREF_CLK0, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk0.clkout2 */ 14074cc8b09SKipisz, Steven {XREF_CLK1, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.gpio6_18 */ 14174cc8b09SKipisz, Steven {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.gpio6_19 */ 14289a38953SNishanth Menon {XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk3.clkout3 */ 14374cc8b09SKipisz, Steven {MCASP1_ACLKX, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkx.i2c3_sda */ 144*d9e14671SLokesh Vutla {MCASP1_FSX, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_fsx.i2c3_scl */ 14574cc8b09SKipisz, Steven {MCASP1_ACLKR, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.i2c4_sda */ 14674cc8b09SKipisz, Steven {MCASP1_FSR, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.i2c4_scl */ 147*d9e14671SLokesh Vutla {MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.i2c5_sda */ 148*d9e14671SLokesh Vutla {MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.i2c5_scl */ 14974cc8b09SKipisz, Steven {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 15074cc8b09SKipisz, Steven {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 15174cc8b09SKipisz, Steven {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 15274cc8b09SKipisz, Steven {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 15374cc8b09SKipisz, Steven {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 15474cc8b09SKipisz, Steven {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 155*d9e14671SLokesh Vutla {MCASP1_AXR8, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr8.gpio5_10 */ 156*d9e14671SLokesh Vutla {MCASP1_AXR9, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr9.gpio5_11 */ 157*d9e14671SLokesh Vutla {MCASP1_AXR10, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr10.gpio5_12 */ 158*d9e14671SLokesh Vutla {MCASP1_AXR11, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.gpio4_17 */ 159*d9e14671SLokesh Vutla {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 160*d9e14671SLokesh Vutla {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr13.mcasp7_axr1 */ 161*d9e14671SLokesh Vutla {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 162*d9e14671SLokesh Vutla {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 16374cc8b09SKipisz, Steven {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 164*d9e14671SLokesh Vutla {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 165*d9e14671SLokesh Vutla {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 166*d9e14671SLokesh Vutla {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr1.mcasp3_axr1 */ 16789a38953SNishanth Menon {MCASP4_ACLKX, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_aclkx.uart8_rxd */ 168*d9e14671SLokesh Vutla {MCASP4_FSX, (M3 | PIN_OUTPUT)}, /* mcasp4_fsx.uart8_txd */ 169*d9e14671SLokesh Vutla {MCASP4_AXR0, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_axr0.uart8_ctsn */ 17089a38953SNishanth Menon {MCASP4_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp4_axr1.uart8_rtsn */ 17189a38953SNishanth Menon {MCASP5_ACLKX, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_aclkx.uart9_rxd */ 172*d9e14671SLokesh Vutla {MCASP5_FSX, (M3 | PIN_OUTPUT)}, /* mcasp5_fsx.uart9_txd */ 173*d9e14671SLokesh Vutla {MCASP5_AXR0, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_axr0.uart9_ctsn */ 17489a38953SNishanth Menon {MCASP5_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp5_axr1.uart9_rtsn */ 175411278b8SSekhar Nori {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 17674cc8b09SKipisz, Steven {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 17774cc8b09SKipisz, Steven {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 17874cc8b09SKipisz, Steven {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 17974cc8b09SKipisz, Steven {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 18074cc8b09SKipisz, Steven {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 181*d9e14671SLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 18289a38953SNishanth Menon {GPIO6_10, (M10 | PIN_OUTPUT_PULLDOWN)}, /* gpio6_10.ehrpwm2A */ 18389a38953SNishanth Menon {GPIO6_11, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ 184411278b8SSekhar Nori {MMC3_CLK, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_clk.mmc3_clk */ 18589a38953SNishanth Menon {MMC3_CMD, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_cmd.mmc3_cmd */ 18689a38953SNishanth Menon {MMC3_DAT0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat0.mmc3_dat0 */ 18789a38953SNishanth Menon {MMC3_DAT1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat1.mmc3_dat1 */ 18889a38953SNishanth Menon {MMC3_DAT2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat2.mmc3_dat2 */ 18989a38953SNishanth Menon {MMC3_DAT3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat3.mmc3_dat3 */ 190*d9e14671SLokesh Vutla {MMC3_DAT4, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat4.mmc3_dat4 */ 191*d9e14671SLokesh Vutla {MMC3_DAT5, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat5.mmc3_dat5 */ 192*d9e14671SLokesh Vutla {MMC3_DAT6, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat6.mmc3_dat6 */ 193*d9e14671SLokesh Vutla {MMC3_DAT7, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat7.mmc3_dat7 */ 19474cc8b09SKipisz, Steven {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */ 19574cc8b09SKipisz, Steven {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */ 19674cc8b09SKipisz, Steven {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */ 19789a38953SNishanth Menon {SPI1_CS0, (M14 | PIN_INPUT)}, /* spi1_cs0.gpio7_10 */ 19889a38953SNishanth Menon {SPI1_CS1, (M14 | PIN_INPUT)}, /* spi1_cs1.gpio7_11 */ 199*d9e14671SLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */ 200*d9e14671SLokesh Vutla {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 20174cc8b09SKipisz, Steven {SPI2_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.gpio7_14 */ 202*d9e14671SLokesh Vutla {SPI2_D1, (M14 | PIN_INPUT_SLEW)}, /* spi2_d1.gpio7_15 */ 203*d9e14671SLokesh Vutla {SPI2_D0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_d0.gpio7_16 */ 204*d9e14671SLokesh Vutla {SPI2_CS0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.gpio7_17 */ 205*d9e14671SLokesh Vutla {DCAN1_TX, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* dcan1_tx.dcan1_tx */ 206*d9e14671SLokesh Vutla {DCAN1_RX, (M0 | PIN_INPUT | SLEWCONTROL)}, /* dcan1_rx.dcan1_rx */ 207*d9e14671SLokesh Vutla {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 208*d9e14671SLokesh Vutla {UART1_TXD, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 20989a38953SNishanth Menon {UART1_CTSN, (M14 | PIN_INPUT_PULLDOWN)}, /* uart1_ctsn.gpio7_24 */ 21089a38953SNishanth Menon {UART1_RTSN, (M14 | PIN_INPUT)}, /* uart1_rtsn.gpio7_25 */ 21189a38953SNishanth Menon {UART2_RXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart2_rxd.gpio7_26 */ 21289a38953SNishanth Menon {UART2_TXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart2_txd.gpio7_27 */ 21389a38953SNishanth Menon {UART2_CTSN, (M2 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.uart3_rxd */ 214*d9e14671SLokesh Vutla {UART2_RTSN, (M1 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */ 21589a38953SNishanth Menon {I2C1_SDA, (M0 | PIN_INPUT_PULLUP)}, /* i2c1_sda.i2c1_sda */ 21689a38953SNishanth Menon {I2C1_SCL, (M0 | PIN_INPUT_PULLUP)}, /* i2c1_scl.i2c1_scl */ 21789a38953SNishanth Menon {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */ 21889a38953SNishanth Menon {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ 21989a38953SNishanth Menon {WAKEUP0, (M0 | PIN_INPUT)}, /* Wakeup0.Wakeup0 */ 22089a38953SNishanth Menon {WAKEUP1, (M0 | PIN_INPUT)}, /* Wakeup1.Wakeup1 */ 22189a38953SNishanth Menon {WAKEUP2, (M0 | PIN_INPUT)}, /* Wakeup2.Wakeup2 */ 22289a38953SNishanth Menon {WAKEUP3, (M0 | PIN_INPUT)}, /* Wakeup3.Wakeup3 */ 22389a38953SNishanth Menon {ON_OFF, (M0 | PIN_OUTPUT)}, /* on_off.on_off */ 22489a38953SNishanth Menon {RTC_PORZ, (M0 | PIN_INPUT)}, /* rtc_porz.rtc_porz */ 22589a38953SNishanth Menon {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ 226*d9e14671SLokesh Vutla {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ 22789a38953SNishanth Menon {TDO, (M0 | PIN_OUTPUT)}, /* tdo.tdo */ 22889a38953SNishanth Menon {TCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* tclk.tclk */ 22989a38953SNishanth Menon {TRSTN, (M0 | PIN_INPUT)}, /* trstn.trstn */ 23089a38953SNishanth Menon {RTCK, (M0 | PIN_OUTPUT)}, /* rtck.rtck */ 23189a38953SNishanth Menon {EMU0, (M0 | PIN_INPUT)}, /* emu0.emu0 */ 23289a38953SNishanth Menon {EMU1, (M0 | PIN_INPUT)}, /* emu1.emu1 */ 23389a38953SNishanth Menon {NMIN_DSP, (M0 | PIN_INPUT)}, /* nmin_dsp.nmin_dsp */ 23489a38953SNishanth Menon {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 23589a38953SNishanth Menon }; 23689a38953SNishanth Menon 23789a38953SNishanth Menon const struct pad_conf_entry core_padconf_array_delta_x15_sr1_1[] = { 238*d9e14671SLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */ 239*d9e14671SLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_clk.vout1_clk */ 240*d9e14671SLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_de.vout1_de */ 241*d9e14671SLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_hsync.vout1_hsync */ 242*d9e14671SLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_vsync.vout1_vsync */ 243*d9e14671SLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d0.vout1_d0 */ 244*d9e14671SLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d1.vout1_d1 */ 245*d9e14671SLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d2.vout1_d2 */ 246*d9e14671SLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d3.vout1_d3 */ 247*d9e14671SLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d4.vout1_d4 */ 248*d9e14671SLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d5.vout1_d5 */ 249*d9e14671SLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d6.vout1_d6 */ 250*d9e14671SLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d7.vout1_d7 */ 251*d9e14671SLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d8.vout1_d8 */ 252*d9e14671SLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d9.vout1_d9 */ 253*d9e14671SLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d10.vout1_d10 */ 254*d9e14671SLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d11.vout1_d11 */ 255*d9e14671SLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d12.vout1_d12 */ 256*d9e14671SLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d13.vout1_d13 */ 257*d9e14671SLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d14.vout1_d14 */ 258*d9e14671SLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d15.vout1_d15 */ 259*d9e14671SLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d16.vout1_d16 */ 260*d9e14671SLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d17.vout1_d17 */ 261*d9e14671SLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d18.vout1_d18 */ 262*d9e14671SLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d19.vout1_d19 */ 263*d9e14671SLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d20.vout1_d20 */ 264*d9e14671SLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d21.vout1_d21 */ 265*d9e14671SLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d22.vout1_d22 */ 266*d9e14671SLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d23.vout1_d23 */ 26789a38953SNishanth Menon }; 26889a38953SNishanth Menon 26989a38953SNishanth Menon const struct pad_conf_entry core_padconf_array_delta_x15_sr2_0[] = { 27089a38953SNishanth Menon {VIN1A_CLK0, (M14 | PIN_INPUT)}, /* vin1a_clk0.gpio2_30 */ 271*d9e14671SLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_clk.vout1_clk */ 272*d9e14671SLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_de.vout1_de */ 273*d9e14671SLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ 274*d9e14671SLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_vsync.vout1_vsync */ 275*d9e14671SLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d0.vout1_d0 */ 276*d9e14671SLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d1.vout1_d1 */ 277*d9e14671SLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d2.vout1_d2 */ 278*d9e14671SLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d3.vout1_d3 */ 279*d9e14671SLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d4.vout1_d4 */ 280*d9e14671SLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d5.vout1_d5 */ 281*d9e14671SLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d6.vout1_d6 */ 282*d9e14671SLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d7.vout1_d7 */ 283*d9e14671SLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d8.vout1_d8 */ 284*d9e14671SLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d9.vout1_d9 */ 285*d9e14671SLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d10.vout1_d10 */ 286*d9e14671SLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d11.vout1_d11 */ 287*d9e14671SLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d12.vout1_d12 */ 288*d9e14671SLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d13.vout1_d13 */ 289*d9e14671SLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d14.vout1_d14 */ 290*d9e14671SLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d15.vout1_d15 */ 291*d9e14671SLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d16.vout1_d16 */ 292*d9e14671SLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d17.vout1_d17 */ 293*d9e14671SLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d18.vout1_d18 */ 294*d9e14671SLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d19.vout1_d19 */ 295*d9e14671SLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d20.vout1_d20 */ 296*d9e14671SLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d21.vout1_d21 */ 297*d9e14671SLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d22.vout1_d22 */ 298*d9e14671SLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d23.vout1_d23 */ 29974cc8b09SKipisz, Steven }; 30074cc8b09SKipisz, Steven 301c020d355SSteve Kipisz const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = { 302c887bef8SLokesh Vutla {GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a0.vin4b_d0 */ 303c887bef8SLokesh Vutla {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */ 304c887bef8SLokesh Vutla {GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a2.vin4b_d2 */ 305c887bef8SLokesh Vutla {GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a3.vin4b_d3 */ 306c887bef8SLokesh Vutla {GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a4.vin4b_d4 */ 307c887bef8SLokesh Vutla {GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a5.vin4b_d5 */ 308c887bef8SLokesh Vutla {GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a6.vin4b_d6 */ 309c887bef8SLokesh Vutla {GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a7.vin4b_d7 */ 310c887bef8SLokesh Vutla {GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a8.vin4b_hsync1 */ 311c887bef8SLokesh Vutla {GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a9.vin4b_vsync1 */ 312c887bef8SLokesh Vutla {GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a10.vin4b_clk1 */ 313c887bef8SLokesh Vutla {GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a11.vin4b_de1 */ 314c887bef8SLokesh Vutla {GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a12.vin4b_fld1 */ 315c887bef8SLokesh Vutla {GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 316c887bef8SLokesh Vutla {GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 317c887bef8SLokesh Vutla {GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 318c887bef8SLokesh Vutla {GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 319c887bef8SLokesh Vutla {GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 320c887bef8SLokesh Vutla {GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 321e79d2dc7SLokesh Vutla {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 322e79d2dc7SLokesh Vutla {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 323e79d2dc7SLokesh Vutla {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 324e79d2dc7SLokesh Vutla {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 325c020d355SSteve Kipisz {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 326e79d2dc7SLokesh Vutla {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 327e79d2dc7SLokesh Vutla {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 328e79d2dc7SLokesh Vutla {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 329e79d2dc7SLokesh Vutla {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 330e79d2dc7SLokesh Vutla {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 331c887bef8SLokesh Vutla {GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 332c887bef8SLokesh Vutla {VIN1A_D5, (M14 | PIN_OUTPUT)}, /* vin1a_d5.gpio3_9 */ 333c887bef8SLokesh Vutla {VIN1A_D6, (M14 | PIN_OUTPUT)}, /* vin1a_d6.gpio3_10 */ 334c887bef8SLokesh Vutla {VIN1A_D7, (M14 | PIN_OUTPUT)}, /* vin1a_d7.gpio3_11 */ 335c887bef8SLokesh Vutla {VIN1A_D8, (M14 | PIN_OUTPUT)}, /* vin1a_d8.gpio3_12 */ 336c020d355SSteve Kipisz {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */ 337c887bef8SLokesh Vutla {VIN1A_D12, (M14 | PIN_INPUT)}, /* vin1a_d12.gpio3_16 */ 338c887bef8SLokesh Vutla {VIN1A_D13, (M14 | PIN_OUTPUT)}, /* vin1a_d13.gpio3_17 */ 339c887bef8SLokesh Vutla {VIN1A_D14, (M14 | PIN_OUTPUT)}, /* vin1a_d14.gpio3_18 */ 340c887bef8SLokesh Vutla {VIN1A_D15, (M14 | PIN_OUTPUT)}, /* vin1a_d15.gpio3_19 */ 341c887bef8SLokesh Vutla {VIN1A_D17, (M14 | PIN_OUTPUT)}, /* vin1a_d17.gpio3_21 */ 342c887bef8SLokesh Vutla {VIN1A_D18, (M14 | PIN_OUTPUT_PULLDOWN)}, /* vin1a_d18.gpio3_22 */ 343c887bef8SLokesh Vutla {VIN1A_D19, (M14 | PIN_OUTPUT_PULLUP)}, /* vin1a_d19.gpio3_23 */ 344c887bef8SLokesh Vutla {VIN1A_D22, (M14 | PIN_INPUT)}, /* vin1a_d22.gpio3_26 */ 345c020d355SSteve Kipisz {VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_clk0.gpio3_28 */ 346c020d355SSteve Kipisz {VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_de0.gpio3_29 */ 347c020d355SSteve Kipisz {VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_fld0.gpio3_30 */ 348c020d355SSteve Kipisz {VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.gpio3_31 */ 349c887bef8SLokesh Vutla {VIN2A_VSYNC0, (M14 | PIN_INPUT)}, /* vin2a_vsync0.gpio4_0 */ 350c887bef8SLokesh Vutla {VIN2A_D0, (M11 | PIN_INPUT)}, /* vin2a_d0.pr1_uart0_rxd */ 351c887bef8SLokesh Vutla {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */ 352c887bef8SLokesh Vutla {VIN2A_D2, (M10 | PIN_OUTPUT)}, /* vin2a_d2.eCAP1_in_PWM1_out */ 353c887bef8SLokesh Vutla {VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.pr1_edc_latch0_in */ 354c887bef8SLokesh Vutla {VIN2A_D4, (M11 | PIN_OUTPUT)}, /* vin2a_d4.pr1_edc_sync0_out */ 355c887bef8SLokesh Vutla {VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d5.pr1_pru1_gpo2 */ 356c887bef8SLokesh Vutla {VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ 357c887bef8SLokesh Vutla {VIN2A_D11, (M11 | PIN_INPUT)}, /* vin2a_d11.pr1_mdio_data */ 358c887bef8SLokesh Vutla {VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 359c887bef8SLokesh Vutla {VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 360c887bef8SLokesh Vutla {VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 361c887bef8SLokesh Vutla {VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 362c887bef8SLokesh Vutla {VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 363c887bef8SLokesh Vutla {VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 364c020d355SSteve Kipisz {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 365c887bef8SLokesh Vutla {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 366c020d355SSteve Kipisz {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 367c020d355SSteve Kipisz {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 368c020d355SSteve Kipisz {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 369c020d355SSteve Kipisz {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 370e79d2dc7SLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_clk.vout1_clk */ 371e79d2dc7SLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_de.vout1_de */ 372c887bef8SLokesh Vutla {VOUT1_FLD, (M14 | PIN_OUTPUT)}, /* vout1_fld.gpio4_21 */ 373e79d2dc7SLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ 374e79d2dc7SLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_vsync.vout1_vsync */ 375e79d2dc7SLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d0.vout1_d0 */ 376e79d2dc7SLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d1.vout1_d1 */ 377e79d2dc7SLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d2.vout1_d2 */ 378e79d2dc7SLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d3.vout1_d3 */ 379e79d2dc7SLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d4.vout1_d4 */ 380e79d2dc7SLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d5.vout1_d5 */ 381e79d2dc7SLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d6.vout1_d6 */ 382e79d2dc7SLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d7.vout1_d7 */ 383e79d2dc7SLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d8.vout1_d8 */ 384e79d2dc7SLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d9.vout1_d9 */ 385e79d2dc7SLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d10.vout1_d10 */ 386e79d2dc7SLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d11.vout1_d11 */ 387e79d2dc7SLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d12.vout1_d12 */ 388e79d2dc7SLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d13.vout1_d13 */ 389e79d2dc7SLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d14.vout1_d14 */ 390e79d2dc7SLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d15.vout1_d15 */ 391e79d2dc7SLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d16.vout1_d16 */ 392e79d2dc7SLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d17.vout1_d17 */ 393e79d2dc7SLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d18.vout1_d18 */ 394e79d2dc7SLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d19.vout1_d19 */ 395e79d2dc7SLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d20.vout1_d20 */ 396e79d2dc7SLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d21.vout1_d21 */ 397e79d2dc7SLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d22.vout1_d22 */ 398e79d2dc7SLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d23.vout1_d23 */ 399e79d2dc7SLokesh Vutla {MDIO_MCLK, (M0 | PIN_INPUT_SLEW)}, /* mdio_mclk.mdio_mclk */ 400e79d2dc7SLokesh Vutla {MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mdio_d.mdio_d */ 401c887bef8SLokesh Vutla {RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 402c887bef8SLokesh Vutla {RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 403c887bef8SLokesh Vutla {RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 404c887bef8SLokesh Vutla {RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 405c887bef8SLokesh Vutla {RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 406c887bef8SLokesh Vutla {RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 407c020d355SSteve Kipisz {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 408c020d355SSteve Kipisz {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 409c020d355SSteve Kipisz {RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 410c020d355SSteve Kipisz {RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 411c020d355SSteve Kipisz {RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 412c020d355SSteve Kipisz {RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 413e79d2dc7SLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb1_drvvbus.usb1_drvvbus */ 414e79d2dc7SLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb2_drvvbus.usb2_drvvbus */ 415c887bef8SLokesh Vutla {GPIO6_14, (M0 | PIN_OUTPUT)}, /* gpio6_14.gpio6_14 */ 416c887bef8SLokesh Vutla {GPIO6_15, (M0 | PIN_OUTPUT)}, /* gpio6_15.gpio6_15 */ 417c887bef8SLokesh Vutla {GPIO6_16, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 418c020d355SSteve Kipisz {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ 419c020d355SSteve Kipisz {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ 420c887bef8SLokesh Vutla {XREF_CLK2, (M14 | PIN_OUTPUT)}, /* xref_clk2.gpio6_19 */ 421c887bef8SLokesh Vutla {XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk3.clkout3 */ 422c887bef8SLokesh Vutla {MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ 423e79d2dc7SLokesh Vutla {MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_fsx.pr2_mdio_data */ 424c887bef8SLokesh Vutla {MCASP1_ACLKR, (M14 | PIN_INPUT)}, /* mcasp1_aclkr.gpio5_0 */ 425c887bef8SLokesh Vutla {MCASP1_FSR, (M14 | PIN_INPUT)}, /* mcasp1_fsr.gpio5_1 */ 426e79d2dc7SLokesh Vutla {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ 427e79d2dc7SLokesh Vutla {MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ 428c887bef8SLokesh Vutla {MCASP1_AXR2, (M14 | PIN_INPUT)}, /* mcasp1_axr2.gpio5_4 */ 429c887bef8SLokesh Vutla {MCASP1_AXR3, (M14 | PIN_INPUT)}, /* mcasp1_axr3.gpio5_5 */ 430c887bef8SLokesh Vutla {MCASP1_AXR4, (M14 | PIN_OUTPUT)}, /* mcasp1_axr4.gpio5_6 */ 431c887bef8SLokesh Vutla {MCASP1_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp1_axr5.gpio5_7 */ 432c887bef8SLokesh Vutla {MCASP1_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp1_axr6.gpio5_8 */ 433c887bef8SLokesh Vutla {MCASP1_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp1_axr7.gpio5_9 */ 434e79d2dc7SLokesh Vutla {MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr8.pr2_mii0_txen */ 435e79d2dc7SLokesh Vutla {MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr9.pr2_mii0_txd3 */ 436e79d2dc7SLokesh Vutla {MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr10.pr2_mii0_txd2 */ 437e79d2dc7SLokesh Vutla {MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.pr2_mii0_txd1 */ 438e79d2dc7SLokesh Vutla {MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr12.pr2_mii0_txd0 */ 439e79d2dc7SLokesh Vutla {MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ 440e79d2dc7SLokesh Vutla {MCASP1_AXR14, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr14.pr2_mii0_rxdv */ 441e79d2dc7SLokesh Vutla {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ 442c887bef8SLokesh Vutla {MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ 443e79d2dc7SLokesh Vutla {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ 444e79d2dc7SLokesh Vutla {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ 445e79d2dc7SLokesh Vutla {MCASP2_AXR3, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr3.pr2_mii0_rxlink */ 446c887bef8SLokesh Vutla {MCASP2_AXR4, (M14 | PIN_OUTPUT)}, /* mcasp2_axr4.gpio1_4 */ 447c887bef8SLokesh Vutla {MCASP2_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp2_axr5.gpio6_7 */ 448c887bef8SLokesh Vutla {MCASP2_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp2_axr6.gpio2_29 */ 449c887bef8SLokesh Vutla {MCASP2_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp2_axr7.gpio1_5 */ 450c020d355SSteve Kipisz {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ 451e79d2dc7SLokesh Vutla {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ 452e79d2dc7SLokesh Vutla {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ 453e79d2dc7SLokesh Vutla {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ 454c887bef8SLokesh Vutla {MCASP4_ACLKX, (M2 | PIN_INPUT)}, /* mcasp4_aclkx.spi3_sclk */ 455c887bef8SLokesh Vutla {MCASP4_FSX, (M2 | PIN_INPUT)}, /* mcasp4_fsx.spi3_d1 */ 456e79d2dc7SLokesh Vutla {MCASP4_AXR1, (M2 | PIN_INPUT_PULLUP)}, /* mcasp4_axr1.spi3_cs0 */ 457c887bef8SLokesh Vutla {MCASP5_ACLKX, (M13 | PIN_OUTPUT | MANUAL_MODE)}, /* mcasp5_aclkx.pr2_pru1_gpo1 */ 458c887bef8SLokesh Vutla {MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)}, /* mcasp5_fsx.pr2_pru1_gpi2 */ 459c887bef8SLokesh Vutla {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 460e79d2dc7SLokesh Vutla {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 461e79d2dc7SLokesh Vutla {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 462e79d2dc7SLokesh Vutla {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 463e79d2dc7SLokesh Vutla {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 464e79d2dc7SLokesh Vutla {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 465e79d2dc7SLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 466e79d2dc7SLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */ 467c020d355SSteve Kipisz {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ 468c887bef8SLokesh Vutla {GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ 469c887bef8SLokesh Vutla {MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ 470c887bef8SLokesh Vutla {MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ 471c887bef8SLokesh Vutla {MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ 472c887bef8SLokesh Vutla {MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ 473c020d355SSteve Kipisz {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ 474c020d355SSteve Kipisz {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ 475c020d355SSteve Kipisz {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ 476c020d355SSteve Kipisz {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ 477c020d355SSteve Kipisz {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ 478c020d355SSteve Kipisz {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ 479c887bef8SLokesh Vutla {SPI1_SCLK, (M14 | PIN_OUTPUT)}, /* spi1_sclk.gpio7_7 */ 480c887bef8SLokesh Vutla {SPI1_D1, (M14 | PIN_OUTPUT)}, /* spi1_d1.gpio7_8 */ 481c887bef8SLokesh Vutla {SPI1_D0, (M14 | PIN_OUTPUT)}, /* spi1_d0.gpio7_9 */ 482c020d355SSteve Kipisz {SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */ 483c887bef8SLokesh Vutla {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 484e79d2dc7SLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */ 485e79d2dc7SLokesh Vutla {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 486e79d2dc7SLokesh Vutla {SPI2_SCLK, (M0 | PIN_INPUT)}, /* spi2_sclk.spi2_sclk */ 487e79d2dc7SLokesh Vutla {SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d1.spi2_d1 */ 488e79d2dc7SLokesh Vutla {SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d0.spi2_d0 */ 489e79d2dc7SLokesh Vutla {SPI2_CS0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_cs0.spi2_cs0 */ 490c887bef8SLokesh Vutla {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 491c887bef8SLokesh Vutla {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */ 492e79d2dc7SLokesh Vutla {UART1_RXD, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_rxd.gpio7_22 */ 493e79d2dc7SLokesh Vutla {UART1_TXD, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.gpio7_23 */ 494c887bef8SLokesh Vutla {UART2_RXD, (M4 | PIN_INPUT)}, /* uart2_rxd.uart2_rxd */ 495c887bef8SLokesh Vutla {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */ 496c887bef8SLokesh Vutla {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */ 497c887bef8SLokesh Vutla {UART2_RTSN, (M1 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */ 498c887bef8SLokesh Vutla {I2C1_SDA, (M0 | PIN_INPUT)}, /* i2c1_sda.i2c1_sda */ 499c887bef8SLokesh Vutla {I2C1_SCL, (M0 | PIN_INPUT)}, /* i2c1_scl.i2c1_scl */ 500c020d355SSteve Kipisz {I2C2_SDA, (M1 | PIN_INPUT)}, /* i2c2_sda.hdmi1_ddc_scl */ 501c020d355SSteve Kipisz {I2C2_SCL, (M1 | PIN_INPUT)}, /* i2c2_scl.hdmi1_ddc_sda */ 502c887bef8SLokesh Vutla {WAKEUP0, (M0 | PIN_INPUT)}, /* Wakeup0.Wakeup0 */ 503c887bef8SLokesh Vutla {WAKEUP1, (M0 | PIN_INPUT)}, /* Wakeup1.Wakeup1 */ 504c887bef8SLokesh Vutla {WAKEUP2, (M0 | PIN_INPUT)}, /* Wakeup2.Wakeup2 */ 505c887bef8SLokesh Vutla {WAKEUP3, (M0 | PIN_INPUT)}, /* Wakeup3.Wakeup3 */ 506c887bef8SLokesh Vutla {ON_OFF, (M0 | PIN_OUTPUT)}, /* on_off.on_off */ 507c887bef8SLokesh Vutla {RTC_PORZ, (M0 | PIN_INPUT)}, /* rtc_porz.rtc_porz */ 508c020d355SSteve Kipisz {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ 509e79d2dc7SLokesh Vutla {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ 510c887bef8SLokesh Vutla {TDO, (M0 | PIN_OUTPUT_PULLUP)}, /* tdo.tdo */ 511c020d355SSteve Kipisz {TCLK, (M0 | PIN_INPUT_PULLUP)}, /* tclk.tclk */ 512c020d355SSteve Kipisz {TRSTN, (M0 | PIN_INPUT_PULLDOWN)}, /* trstn.trstn */ 513c887bef8SLokesh Vutla {RTCK, (M0 | PIN_OUTPUT_PULLUP)}, /* rtck.rtck */ 514c020d355SSteve Kipisz {EMU0, (M0 | PIN_INPUT_PULLUP)}, /* emu0.emu0 */ 515c020d355SSteve Kipisz {EMU1, (M0 | PIN_INPUT_PULLUP)}, /* emu1.emu1 */ 516c887bef8SLokesh Vutla {RESETN, (M0 | PIN_INPUT)}, /* resetn.resetn */ 517e79d2dc7SLokesh Vutla {NMIN_DSP, (M0 | PIN_INPUT)}, /* nmin_dsp.nmin_dsp */ 518c887bef8SLokesh Vutla {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 519c020d355SSteve Kipisz }; 520c020d355SSteve Kipisz 5214d8397c6SSteve Kipisz const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { 5222d7e9e9dSLokesh Vutla {GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a0.vin1b_d0 */ 5232d7e9e9dSLokesh Vutla {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin1b_d1 */ 5242d7e9e9dSLokesh Vutla {GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a2.vin1b_d2 */ 5252d7e9e9dSLokesh Vutla {GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a3.vin1b_d3 */ 5262d7e9e9dSLokesh Vutla {GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a4.vin1b_d4 */ 5272d7e9e9dSLokesh Vutla {GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a5.vin1b_d5 */ 5282d7e9e9dSLokesh Vutla {GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a6.vin1b_d6 */ 5292d7e9e9dSLokesh Vutla {GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a7.vin1b_d7 */ 5302d7e9e9dSLokesh Vutla {GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a8.vin1b_hsync1 */ 5312d7e9e9dSLokesh Vutla {GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a9.vin1b_vsync1 */ 5322d7e9e9dSLokesh Vutla {GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a10.vin1b_clk1 */ 5332d7e9e9dSLokesh Vutla {GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a11.vin1b_de1 */ 5342d7e9e9dSLokesh Vutla {GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a12.vin1b_fld1 */ 5352d7e9e9dSLokesh Vutla {GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 5362d7e9e9dSLokesh Vutla {GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 5372d7e9e9dSLokesh Vutla {GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 5382d7e9e9dSLokesh Vutla {GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 5392d7e9e9dSLokesh Vutla {GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 5402d7e9e9dSLokesh Vutla {GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 5414d8397c6SSteve Kipisz {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 5424d8397c6SSteve Kipisz {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 5434d8397c6SSteve Kipisz {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 5444d8397c6SSteve Kipisz {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 5454d8397c6SSteve Kipisz {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 5464d8397c6SSteve Kipisz {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 5474d8397c6SSteve Kipisz {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 5484d8397c6SSteve Kipisz {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 5494d8397c6SSteve Kipisz {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 5504d8397c6SSteve Kipisz {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 5512d7e9e9dSLokesh Vutla {GPMC_CS0, (M14 | PIN_OUTPUT)}, /* gpmc_cs0.gpio2_19 */ 5522d7e9e9dSLokesh Vutla {GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 5532d7e9e9dSLokesh Vutla {GPMC_CS3, (M14 | PIN_OUTPUT)}, /* gpmc_cs3.gpio2_21 */ 5542d7e9e9dSLokesh Vutla {GPMC_CLK, (M14 | PIN_INPUT)}, /* gpmc_clk.gpio2_22 */ 5552d7e9e9dSLokesh Vutla {GPMC_ADVN_ALE, (M14 | PIN_OUTPUT)}, /* gpmc_advn_ale.gpio2_23 */ 5562d7e9e9dSLokesh Vutla {GPMC_OEN_REN, (M14 | PIN_OUTPUT)}, /* gpmc_oen_ren.gpio2_24 */ 5572d7e9e9dSLokesh Vutla {GPMC_WEN, (M14 | PIN_OUTPUT)}, /* gpmc_wen.gpio2_25 */ 5582d7e9e9dSLokesh Vutla {GPMC_BEN0, (M14 | PIN_OUTPUT)}, /* gpmc_ben0.gpio2_26 */ 5592d7e9e9dSLokesh Vutla {GPMC_BEN1, (M14 | PIN_OUTPUT)}, /* gpmc_ben1.gpio2_27 */ 5602d7e9e9dSLokesh Vutla {GPMC_WAIT0, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* gpmc_wait0.gpio2_28 */ 5614d8397c6SSteve Kipisz {VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_clk0.gpio3_28 */ 5624d8397c6SSteve Kipisz {VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_de0.gpio3_29 */ 5634d8397c6SSteve Kipisz {VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_fld0.gpio3_30 */ 5644d8397c6SSteve Kipisz {VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.gpio3_31 */ 5652d7e9e9dSLokesh Vutla {VIN2A_VSYNC0, (M14 | PIN_OUTPUT)}, /* vin2a_vsync0.gpio4_0 */ 5662d7e9e9dSLokesh Vutla {VIN2A_D0, (M11 | PIN_INPUT)}, /* vin2a_d0.pr1_uart0_rxd */ 5672d7e9e9dSLokesh Vutla {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */ 5682d7e9e9dSLokesh Vutla {VIN2A_D2, (M10 | PIN_OUTPUT)}, /* vin2a_d2.eCAP1_in_PWM1_out */ 5692d7e9e9dSLokesh Vutla {VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ 5702d7e9e9dSLokesh Vutla {VIN2A_D11, (M11 | PIN_INPUT)}, /* vin2a_d11.pr1_mdio_data */ 5712d7e9e9dSLokesh Vutla {VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 5722d7e9e9dSLokesh Vutla {VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 5732d7e9e9dSLokesh Vutla {VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 5742d7e9e9dSLokesh Vutla {VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 5752d7e9e9dSLokesh Vutla {VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 5762d7e9e9dSLokesh Vutla {VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 5774d8397c6SSteve Kipisz {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 5782d7e9e9dSLokesh Vutla {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 5794d8397c6SSteve Kipisz {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 5804d8397c6SSteve Kipisz {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 5814d8397c6SSteve Kipisz {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 5824d8397c6SSteve Kipisz {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 5832d7e9e9dSLokesh Vutla {VOUT1_FLD, (M14 | PIN_OUTPUT)}, /* vout1_fld.gpio4_21 */ 5842d7e9e9dSLokesh Vutla {MDIO_MCLK, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 5852d7e9e9dSLokesh Vutla {MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mdio_d.mdio_d */ 5862d7e9e9dSLokesh Vutla {UART3_RXD, (M14 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* uart3_rxd.gpio5_18 */ 5872d7e9e9dSLokesh Vutla {UART3_TXD, (M14 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* uart3_txd.gpio5_19 */ 5882d7e9e9dSLokesh Vutla {RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 5892d7e9e9dSLokesh Vutla {RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 5902d7e9e9dSLokesh Vutla {RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 5912d7e9e9dSLokesh Vutla {RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 5922d7e9e9dSLokesh Vutla {RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 5932d7e9e9dSLokesh Vutla {RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 5944d8397c6SSteve Kipisz {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 5954d8397c6SSteve Kipisz {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 5962d7e9e9dSLokesh Vutla {RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 5972d7e9e9dSLokesh Vutla {RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 5982d7e9e9dSLokesh Vutla {RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 5992d7e9e9dSLokesh Vutla {RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 6002d7e9e9dSLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb1_drvvbus.usb1_drvvbus */ 6012d7e9e9dSLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb2_drvvbus.usb2_drvvbus */ 6022d7e9e9dSLokesh Vutla {GPIO6_14, (M0 | PIN_OUTPUT)}, /* gpio6_14.gpio6_14 */ 6032d7e9e9dSLokesh Vutla {GPIO6_15, (M0 | PIN_OUTPUT)}, /* gpio6_15.gpio6_15 */ 6042d7e9e9dSLokesh Vutla {GPIO6_16, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 6052d7e9e9dSLokesh Vutla {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ 6062d7e9e9dSLokesh Vutla {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ 6072d7e9e9dSLokesh Vutla {XREF_CLK2, (M14 | PIN_OUTPUT)}, /* xref_clk2.gpio6_19 */ 6082d7e9e9dSLokesh Vutla {XREF_CLK3, (M7 | PIN_INPUT)}, /* xref_clk3.hdq0 */ 6092d7e9e9dSLokesh Vutla {MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ 6102d7e9e9dSLokesh Vutla {MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_fsx.pr2_mdio_data */ 6112d7e9e9dSLokesh Vutla {MCASP1_ACLKR, (M14 | PIN_INPUT)}, /* mcasp1_aclkr.gpio5_0 */ 6122d7e9e9dSLokesh Vutla {MCASP1_FSR, (M14 | PIN_INPUT)}, /* mcasp1_fsr.gpio5_1 */ 6132d7e9e9dSLokesh Vutla {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ 6142d7e9e9dSLokesh Vutla {MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ 6152d7e9e9dSLokesh Vutla {MCASP1_AXR2, (M14 | PIN_INPUT)}, /* mcasp1_axr2.gpio5_4 */ 6162d7e9e9dSLokesh Vutla {MCASP1_AXR3, (M14 | PIN_INPUT)}, /* mcasp1_axr3.gpio5_5 */ 6174d8397c6SSteve Kipisz {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 6182d7e9e9dSLokesh Vutla {MCASP1_AXR5, (M14 | PIN_INPUT)}, /* mcasp1_axr5.gpio5_7 */ 6192d7e9e9dSLokesh Vutla {MCASP1_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp1_axr6.gpio5_8 */ 6202d7e9e9dSLokesh Vutla {MCASP1_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp1_axr7.gpio5_9 */ 6212d7e9e9dSLokesh Vutla {MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr8.pr2_mii0_txen */ 6222d7e9e9dSLokesh Vutla {MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr9.pr2_mii0_txd3 */ 6232d7e9e9dSLokesh Vutla {MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr10.pr2_mii0_txd2 */ 6242d7e9e9dSLokesh Vutla {MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.pr2_mii0_txd1 */ 6252d7e9e9dSLokesh Vutla {MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr12.pr2_mii0_txd0 */ 6262d7e9e9dSLokesh Vutla {MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ 6272d7e9e9dSLokesh Vutla {MCASP1_AXR14, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr14.pr2_mii0_rxdv */ 6282d7e9e9dSLokesh Vutla {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ 6292d7e9e9dSLokesh Vutla {MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ 6302d7e9e9dSLokesh Vutla {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ 6312d7e9e9dSLokesh Vutla {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ 6322d7e9e9dSLokesh Vutla {MCASP2_AXR3, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr3.pr2_mii0_rxlink */ 6332d7e9e9dSLokesh Vutla {MCASP2_AXR4, (M14 | PIN_OUTPUT)}, /* mcasp2_axr4.gpio1_4 */ 6342d7e9e9dSLokesh Vutla {MCASP2_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp2_axr5.gpio6_7 */ 6352d7e9e9dSLokesh Vutla {MCASP2_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp2_axr6.gpio2_29 */ 6362d7e9e9dSLokesh Vutla {MCASP2_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp2_axr7.gpio1_5 */ 6372d7e9e9dSLokesh Vutla {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ 6382d7e9e9dSLokesh Vutla {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ 6392d7e9e9dSLokesh Vutla {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ 6402d7e9e9dSLokesh Vutla {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ 6412d7e9e9dSLokesh Vutla {MCASP4_ACLKX, (M2 | PIN_OUTPUT)}, /* mcasp4_aclkx.spi3_sclk */ 6422d7e9e9dSLokesh Vutla {MCASP4_FSX, (M2 | PIN_INPUT)}, /* mcasp4_fsx.spi3_d1 */ 6432d7e9e9dSLokesh Vutla {MCASP4_AXR1, (M2 | PIN_OUTPUT_PULLUP)}, /* mcasp4_axr1.spi3_cs0 */ 6442d7e9e9dSLokesh Vutla {MCASP5_AXR0, (M4 | PIN_INPUT)}, /* mcasp5_axr0.uart3_rxd */ 6452d7e9e9dSLokesh Vutla {MCASP5_AXR1, (M4 | PIN_OUTPUT)}, /* mcasp5_axr1.uart3_txd */ 6464d8397c6SSteve Kipisz {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 6474d8397c6SSteve Kipisz {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 6484d8397c6SSteve Kipisz {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 6494d8397c6SSteve Kipisz {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 6504d8397c6SSteve Kipisz {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 6514d8397c6SSteve Kipisz {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 6522d7e9e9dSLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 6532d7e9e9dSLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */ 6542d7e9e9dSLokesh Vutla {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ 6552d7e9e9dSLokesh Vutla {GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ 6562d7e9e9dSLokesh Vutla {MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ 6572d7e9e9dSLokesh Vutla {MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ 6582d7e9e9dSLokesh Vutla {MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ 6592d7e9e9dSLokesh Vutla {MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ 6602d7e9e9dSLokesh Vutla {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ 6614d8397c6SSteve Kipisz {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ 6622d7e9e9dSLokesh Vutla {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ 6632d7e9e9dSLokesh Vutla {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ 6642d7e9e9dSLokesh Vutla {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ 6652d7e9e9dSLokesh Vutla {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ 6662d7e9e9dSLokesh Vutla {SPI1_SCLK, (M14 | PIN_OUTPUT)}, /* spi1_sclk.gpio7_7 */ 6672d7e9e9dSLokesh Vutla {SPI1_D1, (M14 | PIN_OUTPUT)}, /* spi1_d1.gpio7_8 */ 6682d7e9e9dSLokesh Vutla {SPI1_D0, (M14 | PIN_OUTPUT)}, /* spi1_d0.gpio7_9 */ 6692d7e9e9dSLokesh Vutla {SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */ 6702d7e9e9dSLokesh Vutla {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 6712d7e9e9dSLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */ 6722d7e9e9dSLokesh Vutla {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 6732d7e9e9dSLokesh Vutla {SPI2_SCLK, (M0 | PIN_INPUT)}, /* spi2_sclk.spi2_sclk */ 6742d7e9e9dSLokesh Vutla {SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d1.spi2_d1 */ 6752d7e9e9dSLokesh Vutla {SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d0.spi2_d0 */ 6762d7e9e9dSLokesh Vutla {SPI2_CS0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_cs0.spi2_cs0 */ 6774d8397c6SSteve Kipisz {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 6784d8397c6SSteve Kipisz {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */ 6792d7e9e9dSLokesh Vutla {UART1_RXD, (M14 | PIN_INPUT | SLEWCONTROL)}, /* uart1_rxd.gpio7_22 */ 6802d7e9e9dSLokesh Vutla {UART1_CTSN, (M14 | PIN_OUTPUT)}, /* uart1_ctsn.gpio7_24 */ 6812d7e9e9dSLokesh Vutla {UART1_RTSN, (M14 | PIN_OUTPUT)}, /* uart1_rtsn.gpio7_25 */ 6822d7e9e9dSLokesh Vutla {I2C1_SDA, (M0 | PIN_INPUT)}, /* i2c1_sda.i2c1_sda */ 6832d7e9e9dSLokesh Vutla {I2C1_SCL, (M0 | PIN_INPUT)}, /* i2c1_scl.i2c1_scl */ 6842d7e9e9dSLokesh Vutla {I2C2_SDA, (M1 | PIN_INPUT)}, /* i2c2_sda.hdmi1_ddc_scl */ 6852d7e9e9dSLokesh Vutla {I2C2_SCL, (M1 | PIN_INPUT)}, /* i2c2_scl.hdmi1_ddc_sda */ 6862d7e9e9dSLokesh Vutla {WAKEUP0, (M0 | PIN_INPUT)}, /* Wakeup0.Wakeup0 */ 6872d7e9e9dSLokesh Vutla {WAKEUP3, (M0 | PIN_INPUT)}, /* Wakeup3.Wakeup3 */ 6882d7e9e9dSLokesh Vutla {ON_OFF, (M0 | PIN_OUTPUT)}, /* on_off.on_off */ 6892d7e9e9dSLokesh Vutla {RTC_PORZ, (M0 | PIN_INPUT)}, /* rtc_porz.rtc_porz */ 6904d8397c6SSteve Kipisz {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ 6914d8397c6SSteve Kipisz {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ 6922d7e9e9dSLokesh Vutla {TDO, (M0 | PIN_OUTPUT_PULLUP)}, /* tdo.tdo */ 6934d8397c6SSteve Kipisz {TCLK, (M0 | PIN_INPUT_PULLUP)}, /* tclk.tclk */ 6942d7e9e9dSLokesh Vutla {TRSTN, (M0 | PIN_INPUT)}, /* trstn.trstn */ 6952d7e9e9dSLokesh Vutla {RTCK, (M0 | PIN_OUTPUT_PULLUP)}, /* rtck.rtck */ 6962d7e9e9dSLokesh Vutla {EMU0, (M0 | PIN_INPUT)}, /* emu0.emu0 */ 6972d7e9e9dSLokesh Vutla {EMU1, (M0 | PIN_INPUT)}, /* emu1.emu1 */ 6982d7e9e9dSLokesh Vutla {RESETN, (M0 | PIN_INPUT)}, /* resetn.resetn */ 6992d7e9e9dSLokesh Vutla {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 7004d8397c6SSteve Kipisz }; 7014d8397c6SSteve Kipisz 70237611052SRoger Quadros const struct pad_conf_entry core_padconf_array_icss1eth_am571x_idk[] = { 70337611052SRoger Quadros /* PR1 MII0 */ 7042d7e9e9dSLokesh Vutla {VOUT1_D8, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d8.pr1_mii_mt0_clk */ 7052d7e9e9dSLokesh Vutla {VOUT1_D9, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d9.pr1_mii0_txd3 */ 7062d7e9e9dSLokesh Vutla {VOUT1_D10, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d10.pr1_mii0_txd2 */ 7072d7e9e9dSLokesh Vutla {VOUT1_D11, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d11.pr1_mii0_txen */ 7082d7e9e9dSLokesh Vutla {VOUT1_D12, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d12.pr1_mii0_txd1 */ 7092d7e9e9dSLokesh Vutla {VOUT1_D13, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d13.pr1_mii0_txd0 */ 7102d7e9e9dSLokesh Vutla {VOUT1_D14, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d14.pr1_mii_mr0_clk */ 71137611052SRoger Quadros {VOUT1_D15, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.pr1_mii0_rxdv */ 7122d7e9e9dSLokesh Vutla {VOUT1_D16, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.pr1_mii0_rxd3 */ 7132d7e9e9dSLokesh Vutla {VOUT1_D17, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.pr1_mii0_rxd2 */ 7142d7e9e9dSLokesh Vutla {VOUT1_D18, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.pr1_mii0_rxd1 */ 7152d7e9e9dSLokesh Vutla {VOUT1_D19, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.pr1_mii0_rxd0 */ 71637611052SRoger Quadros {VOUT1_D20, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d20.pr1_mii0_rxer */ 7172d7e9e9dSLokesh Vutla {VOUT1_D21, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.pr1_mii0_rxlink */ 7182d7e9e9dSLokesh Vutla {VOUT1_D22, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.pr1_mii0_col */ 7192d7e9e9dSLokesh Vutla {VOUT1_D23, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.pr1_mii0_crs */ 72037611052SRoger Quadros 72137611052SRoger Quadros /* PR1 MII1 */ 7222d7e9e9dSLokesh Vutla {VIN2A_D3, (M12 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.pr1_mii1_col */ 7232d7e9e9dSLokesh Vutla {VIN2A_D4, (M13 | PIN_OUTPUT_PULLUP)}, /* vin2a_d4.pr1_mii1_txd1 */ 7242d7e9e9dSLokesh Vutla {VIN2A_D5, (M13 | PIN_OUTPUT_PULLUP)}, /* vin2a_d5.pr1_mii1_txd0 */ 7252d7e9e9dSLokesh Vutla {VIN2A_D6, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_d6.pr1_mii_mt1_clk */ 7262d7e9e9dSLokesh Vutla {VIN2A_D7, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_d7.pr1_mii1_txen */ 7272d7e9e9dSLokesh Vutla {VIN2A_D8, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_d8.pr1_mii1_txd3 */ 7282d7e9e9dSLokesh Vutla {VIN2A_D9, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_d9.pr1_mii1_txd2 */ 72937611052SRoger Quadros {VOUT1_VSYNC, (M12 | PIN_INPUT_PULLUP)}, /* vout1_vsync.pr1_mii1_rxer */ 7302d7e9e9dSLokesh Vutla {VOUT1_D0, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d0.pr1_mii1_rxlink */ 7312d7e9e9dSLokesh Vutla {VOUT1_D1, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.pr1_mii1_crs */ 7322d7e9e9dSLokesh Vutla {VOUT1_D2, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d2.pr1_mii_mr1_clk */ 73337611052SRoger Quadros {VOUT1_D3, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.pr1_mii1_rxdv */ 7342d7e9e9dSLokesh Vutla {VOUT1_D4, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.pr1_mii1_rxd3 */ 7352d7e9e9dSLokesh Vutla {VOUT1_D5, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.pr1_mii1_rxd2 */ 7362d7e9e9dSLokesh Vutla {VOUT1_D6, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.pr1_mii1_rxd1 */ 7372d7e9e9dSLokesh Vutla {VOUT1_D7, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.pr1_mii1_rxd0 */ 73837611052SRoger Quadros }; 73937611052SRoger Quadros 74037611052SRoger Quadros const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = { 7412d7e9e9dSLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_clk.vout1_clk */ 7422d7e9e9dSLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_de.vout1_de */ 7432d7e9e9dSLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_hsync.vout1_hsync */ 7442d7e9e9dSLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_vsync.vout1_vsync */ 7452d7e9e9dSLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d0.vout1_d0 */ 7462d7e9e9dSLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d1.vout1_d1 */ 7472d7e9e9dSLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d2.vout1_d2 */ 7482d7e9e9dSLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d3.vout1_d3 */ 7492d7e9e9dSLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d4.vout1_d4 */ 7502d7e9e9dSLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d5.vout1_d5 */ 7512d7e9e9dSLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d6.vout1_d6 */ 7522d7e9e9dSLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d7.vout1_d7 */ 7532d7e9e9dSLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d8.vout1_d8 */ 7542d7e9e9dSLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d9.vout1_d9 */ 7552d7e9e9dSLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d10.vout1_d10 */ 7562d7e9e9dSLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d11.vout1_d11 */ 7572d7e9e9dSLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d12.vout1_d12 */ 7582d7e9e9dSLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d13.vout1_d13 */ 7592d7e9e9dSLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d14.vout1_d14 */ 7602d7e9e9dSLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d15.vout1_d15 */ 7612d7e9e9dSLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d16.vout1_d16 */ 7622d7e9e9dSLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d17.vout1_d17 */ 7632d7e9e9dSLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d18.vout1_d18 */ 7642d7e9e9dSLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d19.vout1_d19 */ 7652d7e9e9dSLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d20.vout1_d20 */ 7662d7e9e9dSLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d21.vout1_d21 */ 7672d7e9e9dSLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d22.vout1_d22 */ 7682d7e9e9dSLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d23.vout1_d23 */ 7692d7e9e9dSLokesh Vutla 7702d7e9e9dSLokesh Vutla {MCASP5_ACLKX, (M12 | PIN_INPUT | MANUAL_MODE)}, /* mcasp5_aclkx.pr2_pru1_gpi1 */ 7712d7e9e9dSLokesh Vutla {MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)}, /* mcasp5_fsx.pr2_pru1_gpi2 */ 7722d7e9e9dSLokesh Vutla {UART2_RXD, (M0 | PIN_INPUT)}, /* uart2_rxd.uart2_rxd */ 7732d7e9e9dSLokesh Vutla {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */ 7742d7e9e9dSLokesh Vutla {VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d5.pr1_pru1_gpo2 */ 77537611052SRoger Quadros }; 77637611052SRoger Quadros 77774cc8b09SKipisz, Steven const struct pad_conf_entry early_padconf[] = { 77874cc8b09SKipisz, Steven {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ 77974cc8b09SKipisz, Steven {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ 78074cc8b09SKipisz, Steven {I2C1_SDA, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SDA */ 78174cc8b09SKipisz, Steven {I2C1_SCL, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SCL */ 78274cc8b09SKipisz, Steven }; 78374cc8b09SKipisz, Steven 78474cc8b09SKipisz, Steven #ifdef CONFIG_IODELAY_RECALIBRATION 78589a38953SNishanth Menon const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr1_1[] = { 78674cc8b09SKipisz, Steven {0x0114, 2980, 0}, /* CFG_GPMC_A0_IN */ 78774cc8b09SKipisz, Steven {0x0120, 2648, 0}, /* CFG_GPMC_A10_IN */ 78874cc8b09SKipisz, Steven {0x012C, 2918, 0}, /* CFG_GPMC_A11_IN */ 78974cc8b09SKipisz, Steven {0x0198, 2917, 0}, /* CFG_GPMC_A1_IN */ 79074cc8b09SKipisz, Steven {0x0204, 3156, 178}, /* CFG_GPMC_A2_IN */ 79174cc8b09SKipisz, Steven {0x0210, 3109, 246}, /* CFG_GPMC_A3_IN */ 79274cc8b09SKipisz, Steven {0x021C, 3142, 100}, /* CFG_GPMC_A4_IN */ 79374cc8b09SKipisz, Steven {0x0228, 3084, 33}, /* CFG_GPMC_A5_IN */ 79474cc8b09SKipisz, Steven {0x0234, 2778, 0}, /* CFG_GPMC_A6_IN */ 79574cc8b09SKipisz, Steven {0x0240, 3110, 0}, /* CFG_GPMC_A7_IN */ 79674cc8b09SKipisz, Steven {0x024C, 2874, 0}, /* CFG_GPMC_A8_IN */ 79774cc8b09SKipisz, Steven {0x0258, 3072, 0}, /* CFG_GPMC_A9_IN */ 79874cc8b09SKipisz, Steven {0x0264, 2466, 0}, /* CFG_GPMC_AD0_IN */ 79974cc8b09SKipisz, Steven {0x0270, 2523, 0}, /* CFG_GPMC_AD10_IN */ 80074cc8b09SKipisz, Steven {0x027C, 2453, 0}, /* CFG_GPMC_AD11_IN */ 80174cc8b09SKipisz, Steven {0x0288, 2285, 0}, /* CFG_GPMC_AD12_IN */ 80274cc8b09SKipisz, Steven {0x0294, 2206, 0}, /* CFG_GPMC_AD13_IN */ 80374cc8b09SKipisz, Steven {0x02A0, 1898, 0}, /* CFG_GPMC_AD14_IN */ 80474cc8b09SKipisz, Steven {0x02AC, 2473, 0}, /* CFG_GPMC_AD15_IN */ 80574cc8b09SKipisz, Steven {0x02B8, 2307, 0}, /* CFG_GPMC_AD1_IN */ 80674cc8b09SKipisz, Steven {0x02C4, 2691, 0}, /* CFG_GPMC_AD2_IN */ 80774cc8b09SKipisz, Steven {0x02D0, 2384, 0}, /* CFG_GPMC_AD3_IN */ 80874cc8b09SKipisz, Steven {0x02DC, 2462, 0}, /* CFG_GPMC_AD4_IN */ 80974cc8b09SKipisz, Steven {0x02E8, 2335, 0}, /* CFG_GPMC_AD5_IN */ 81074cc8b09SKipisz, Steven {0x02F4, 2370, 0}, /* CFG_GPMC_AD6_IN */ 81174cc8b09SKipisz, Steven {0x0300, 2389, 0}, /* CFG_GPMC_AD7_IN */ 81274cc8b09SKipisz, Steven {0x030C, 2672, 0}, /* CFG_GPMC_AD8_IN */ 81374cc8b09SKipisz, Steven {0x0318, 2334, 0}, /* CFG_GPMC_AD9_IN */ 814*d9e14671SLokesh Vutla {0x0378, 0, 0}, /* CFG_GPMC_CS3_IN */ 815*d9e14671SLokesh Vutla {0x0678, 406, 0}, /* CFG_MMC3_CLK_IN */ 816*d9e14671SLokesh Vutla {0x0680, 659, 0}, /* CFG_MMC3_CLK_OUT */ 817*d9e14671SLokesh Vutla {0x0684, 0, 0}, /* CFG_MMC3_CMD_IN */ 818*d9e14671SLokesh Vutla {0x0688, 0, 0}, /* CFG_MMC3_CMD_OEN */ 819*d9e14671SLokesh Vutla {0x068C, 0, 0}, /* CFG_MMC3_CMD_OUT */ 820*d9e14671SLokesh Vutla {0x0690, 130, 0}, /* CFG_MMC3_DAT0_IN */ 821*d9e14671SLokesh Vutla {0x0694, 0, 0}, /* CFG_MMC3_DAT0_OEN */ 822*d9e14671SLokesh Vutla {0x0698, 0, 0}, /* CFG_MMC3_DAT0_OUT */ 823*d9e14671SLokesh Vutla {0x069C, 169, 0}, /* CFG_MMC3_DAT1_IN */ 824*d9e14671SLokesh Vutla {0x06A0, 0, 0}, /* CFG_MMC3_DAT1_OEN */ 825*d9e14671SLokesh Vutla {0x06A4, 0, 0}, /* CFG_MMC3_DAT1_OUT */ 826*d9e14671SLokesh Vutla {0x06A8, 0, 0}, /* CFG_MMC3_DAT2_IN */ 827*d9e14671SLokesh Vutla {0x06AC, 0, 0}, /* CFG_MMC3_DAT2_OEN */ 828*d9e14671SLokesh Vutla {0x06B0, 0, 0}, /* CFG_MMC3_DAT2_OUT */ 829*d9e14671SLokesh Vutla {0x06B4, 457, 0}, /* CFG_MMC3_DAT3_IN */ 830*d9e14671SLokesh Vutla {0x06B8, 0, 0}, /* CFG_MMC3_DAT3_OEN */ 831*d9e14671SLokesh Vutla {0x06BC, 0, 0}, /* CFG_MMC3_DAT3_OUT */ 832*d9e14671SLokesh Vutla {0x06C0, 702, 0}, /* CFG_MMC3_DAT4_IN */ 833*d9e14671SLokesh Vutla {0x06C4, 0, 0}, /* CFG_MMC3_DAT4_OEN */ 834*d9e14671SLokesh Vutla {0x06C8, 0, 0}, /* CFG_MMC3_DAT4_OUT */ 835*d9e14671SLokesh Vutla {0x06CC, 738, 0}, /* CFG_MMC3_DAT5_IN */ 836*d9e14671SLokesh Vutla {0x06D0, 0, 0}, /* CFG_MMC3_DAT5_OEN */ 837*d9e14671SLokesh Vutla {0x06D4, 0, 0}, /* CFG_MMC3_DAT5_OUT */ 838*d9e14671SLokesh Vutla {0x06D8, 856, 0}, /* CFG_MMC3_DAT6_IN */ 839*d9e14671SLokesh Vutla {0x06DC, 0, 0}, /* CFG_MMC3_DAT6_OEN */ 840*d9e14671SLokesh Vutla {0x06E0, 0, 0}, /* CFG_MMC3_DAT6_OUT */ 841*d9e14671SLokesh Vutla {0x06E4, 610, 0}, /* CFG_MMC3_DAT7_IN */ 842*d9e14671SLokesh Vutla {0x06E8, 0, 0}, /* CFG_MMC3_DAT7_OEN */ 843*d9e14671SLokesh Vutla {0x06EC, 0, 0}, /* CFG_MMC3_DAT7_OUT */ 84474cc8b09SKipisz, Steven {0x06F0, 480, 0}, /* CFG_RGMII0_RXC_IN */ 84574cc8b09SKipisz, Steven {0x06FC, 111, 1641}, /* CFG_RGMII0_RXCTL_IN */ 84674cc8b09SKipisz, Steven {0x0708, 272, 1116}, /* CFG_RGMII0_RXD0_IN */ 84774cc8b09SKipisz, Steven {0x0714, 243, 1260}, /* CFG_RGMII0_RXD1_IN */ 84874cc8b09SKipisz, Steven {0x0720, 0, 1614}, /* CFG_RGMII0_RXD2_IN */ 84974cc8b09SKipisz, Steven {0x072C, 105, 1673}, /* CFG_RGMII0_RXD3_IN */ 85074cc8b09SKipisz, Steven {0x0740, 531, 120}, /* CFG_RGMII0_TXC_OUT */ 8515d43e168SNishanth Menon {0x074C, 201, 60}, /* CFG_RGMII0_TXCTL_OUT */ 8525d43e168SNishanth Menon {0x0758, 229, 120}, /* CFG_RGMII0_TXD0_OUT */ 8535d43e168SNishanth Menon {0x0764, 141, 0}, /* CFG_RGMII0_TXD1_OUT */ 8545d43e168SNishanth Menon {0x0770, 495, 120}, /* CFG_RGMII0_TXD2_OUT */ 8555d43e168SNishanth Menon {0x077C, 660, 120}, /* CFG_RGMII0_TXD3_OUT */ 85674cc8b09SKipisz, Steven {0x0A70, 1551, 115}, /* CFG_VIN2A_D12_OUT */ 85774cc8b09SKipisz, Steven {0x0A7C, 816, 0}, /* CFG_VIN2A_D13_OUT */ 85874cc8b09SKipisz, Steven {0x0A88, 876, 0}, /* CFG_VIN2A_D14_OUT */ 85974cc8b09SKipisz, Steven {0x0A94, 312, 0}, /* CFG_VIN2A_D15_OUT */ 86074cc8b09SKipisz, Steven {0x0AA0, 58, 0}, /* CFG_VIN2A_D16_OUT */ 86174cc8b09SKipisz, Steven {0x0AAC, 0, 0}, /* CFG_VIN2A_D17_OUT */ 86274cc8b09SKipisz, Steven {0x0AB0, 702, 0}, /* CFG_VIN2A_D18_IN */ 86374cc8b09SKipisz, Steven {0x0ABC, 136, 976}, /* CFG_VIN2A_D19_IN */ 86474cc8b09SKipisz, Steven {0x0AD4, 210, 1357}, /* CFG_VIN2A_D20_IN */ 86574cc8b09SKipisz, Steven {0x0AE0, 189, 1462}, /* CFG_VIN2A_D21_IN */ 86674cc8b09SKipisz, Steven {0x0AEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ 86774cc8b09SKipisz, Steven {0x0AF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ 86874cc8b09SKipisz, Steven }; 869c020d355SSteve Kipisz 87089a38953SNishanth Menon const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr2_0[] = { 87189a38953SNishanth Menon {0x0114, 2519, 702}, /* CFG_GPMC_A0_IN */ 87289a38953SNishanth Menon {0x0120, 2435, 411}, /* CFG_GPMC_A10_IN */ 87389a38953SNishanth Menon {0x012C, 2379, 755}, /* CFG_GPMC_A11_IN */ 87489a38953SNishanth Menon {0x0198, 2384, 778}, /* CFG_GPMC_A1_IN */ 87589a38953SNishanth Menon {0x0204, 2499, 1127}, /* CFG_GPMC_A2_IN */ 87689a38953SNishanth Menon {0x0210, 2455, 1181}, /* CFG_GPMC_A3_IN */ 87789a38953SNishanth Menon {0x021C, 2486, 1039}, /* CFG_GPMC_A4_IN */ 87889a38953SNishanth Menon {0x0228, 2456, 938}, /* CFG_GPMC_A5_IN */ 87989a38953SNishanth Menon {0x0234, 2463, 573}, /* CFG_GPMC_A6_IN */ 88089a38953SNishanth Menon {0x0240, 2608, 783}, /* CFG_GPMC_A7_IN */ 88189a38953SNishanth Menon {0x024C, 2430, 656}, /* CFG_GPMC_A8_IN */ 88289a38953SNishanth Menon {0x0258, 2465, 850}, /* CFG_GPMC_A9_IN */ 88389a38953SNishanth Menon {0x0264, 2316, 301}, /* CFG_GPMC_AD0_IN */ 88489a38953SNishanth Menon {0x0270, 2324, 406}, /* CFG_GPMC_AD10_IN */ 88589a38953SNishanth Menon {0x027C, 2278, 352}, /* CFG_GPMC_AD11_IN */ 88689a38953SNishanth Menon {0x0288, 2297, 160}, /* CFG_GPMC_AD12_IN */ 88789a38953SNishanth Menon {0x0294, 2278, 108}, /* CFG_GPMC_AD13_IN */ 88889a38953SNishanth Menon {0x02A0, 2035, 0}, /* CFG_GPMC_AD14_IN */ 88989a38953SNishanth Menon {0x02AC, 2279, 378}, /* CFG_GPMC_AD15_IN */ 89089a38953SNishanth Menon {0x02B8, 2440, 70}, /* CFG_GPMC_AD1_IN */ 89189a38953SNishanth Menon {0x02C4, 2404, 446}, /* CFG_GPMC_AD2_IN */ 89289a38953SNishanth Menon {0x02D0, 2343, 212}, /* CFG_GPMC_AD3_IN */ 89389a38953SNishanth Menon {0x02DC, 2355, 322}, /* CFG_GPMC_AD4_IN */ 89489a38953SNishanth Menon {0x02E8, 2337, 192}, /* CFG_GPMC_AD5_IN */ 89589a38953SNishanth Menon {0x02F4, 2270, 314}, /* CFG_GPMC_AD6_IN */ 89689a38953SNishanth Menon {0x0300, 2339, 259}, /* CFG_GPMC_AD7_IN */ 89789a38953SNishanth Menon {0x030C, 2308, 577}, /* CFG_GPMC_AD8_IN */ 89889a38953SNishanth Menon {0x0318, 2334, 166}, /* CFG_GPMC_AD9_IN */ 89989a38953SNishanth Menon {0x0378, 0, 0}, /* CFG_GPMC_CS3_IN */ 90089a38953SNishanth Menon {0x0678, 0, 386}, /* CFG_MMC3_CLK_IN */ 90189a38953SNishanth Menon {0x0680, 605, 0}, /* CFG_MMC3_CLK_OUT */ 90289a38953SNishanth Menon {0x0684, 0, 0}, /* CFG_MMC3_CMD_IN */ 90389a38953SNishanth Menon {0x0688, 0, 0}, /* CFG_MMC3_CMD_OEN */ 90489a38953SNishanth Menon {0x068C, 0, 0}, /* CFG_MMC3_CMD_OUT */ 90589a38953SNishanth Menon {0x0690, 171, 0}, /* CFG_MMC3_DAT0_IN */ 90689a38953SNishanth Menon {0x0694, 0, 0}, /* CFG_MMC3_DAT0_OEN */ 90789a38953SNishanth Menon {0x0698, 0, 0}, /* CFG_MMC3_DAT0_OUT */ 90889a38953SNishanth Menon {0x069C, 221, 0}, /* CFG_MMC3_DAT1_IN */ 90989a38953SNishanth Menon {0x06A0, 0, 0}, /* CFG_MMC3_DAT1_OEN */ 91089a38953SNishanth Menon {0x06A4, 0, 0}, /* CFG_MMC3_DAT1_OUT */ 91189a38953SNishanth Menon {0x06A8, 0, 0}, /* CFG_MMC3_DAT2_IN */ 91289a38953SNishanth Menon {0x06AC, 0, 0}, /* CFG_MMC3_DAT2_OEN */ 91389a38953SNishanth Menon {0x06B0, 0, 0}, /* CFG_MMC3_DAT2_OUT */ 91489a38953SNishanth Menon {0x06B4, 474, 0}, /* CFG_MMC3_DAT3_IN */ 91589a38953SNishanth Menon {0x06B8, 0, 0}, /* CFG_MMC3_DAT3_OEN */ 91689a38953SNishanth Menon {0x06BC, 0, 0}, /* CFG_MMC3_DAT3_OUT */ 917*d9e14671SLokesh Vutla {0x06C0, 792, 0}, /* CFG_MMC3_DAT4_IN */ 918*d9e14671SLokesh Vutla {0x06C4, 0, 0}, /* CFG_MMC3_DAT4_OEN */ 919*d9e14671SLokesh Vutla {0x06C8, 0, 0}, /* CFG_MMC3_DAT4_OUT */ 920*d9e14671SLokesh Vutla {0x06CC, 782, 0}, /* CFG_MMC3_DAT5_IN */ 921*d9e14671SLokesh Vutla {0x06D0, 0, 0}, /* CFG_MMC3_DAT5_OEN */ 922*d9e14671SLokesh Vutla {0x06D4, 0, 0}, /* CFG_MMC3_DAT5_OUT */ 923*d9e14671SLokesh Vutla {0x06D8, 942, 0}, /* CFG_MMC3_DAT6_IN */ 924*d9e14671SLokesh Vutla {0x06DC, 0, 0}, /* CFG_MMC3_DAT6_OEN */ 925*d9e14671SLokesh Vutla {0x06E0, 0, 0}, /* CFG_MMC3_DAT6_OUT */ 926*d9e14671SLokesh Vutla {0x06E4, 636, 0}, /* CFG_MMC3_DAT7_IN */ 927*d9e14671SLokesh Vutla {0x06E8, 0, 0}, /* CFG_MMC3_DAT7_OEN */ 928*d9e14671SLokesh Vutla {0x06EC, 0, 0}, /* CFG_MMC3_DAT7_OUT */ 92989a38953SNishanth Menon {0x06F0, 260, 0}, /* CFG_RGMII0_RXC_IN */ 93089a38953SNishanth Menon {0x06FC, 0, 1412}, /* CFG_RGMII0_RXCTL_IN */ 93189a38953SNishanth Menon {0x0708, 123, 1047}, /* CFG_RGMII0_RXD0_IN */ 93289a38953SNishanth Menon {0x0714, 139, 1081}, /* CFG_RGMII0_RXD1_IN */ 93389a38953SNishanth Menon {0x0720, 195, 1100}, /* CFG_RGMII0_RXD2_IN */ 93489a38953SNishanth Menon {0x072C, 239, 1216}, /* CFG_RGMII0_RXD3_IN */ 93589a38953SNishanth Menon {0x0740, 89, 0}, /* CFG_RGMII0_TXC_OUT */ 93689a38953SNishanth Menon {0x074C, 15, 125}, /* CFG_RGMII0_TXCTL_OUT */ 93789a38953SNishanth Menon {0x0758, 339, 162}, /* CFG_RGMII0_TXD0_OUT */ 93889a38953SNishanth Menon {0x0764, 146, 94}, /* CFG_RGMII0_TXD1_OUT */ 93989a38953SNishanth Menon {0x0770, 0, 27}, /* CFG_RGMII0_TXD2_OUT */ 94089a38953SNishanth Menon {0x077C, 291, 205}, /* CFG_RGMII0_TXD3_OUT */ 94189a38953SNishanth Menon {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 94289a38953SNishanth Menon {0x0A7C, 219, 101}, /* CFG_VIN2A_D13_OUT */ 94389a38953SNishanth Menon {0x0A88, 92, 58}, /* CFG_VIN2A_D14_OUT */ 94489a38953SNishanth Menon {0x0A94, 135, 100}, /* CFG_VIN2A_D15_OUT */ 94589a38953SNishanth Menon {0x0AA0, 154, 101}, /* CFG_VIN2A_D16_OUT */ 94689a38953SNishanth Menon {0x0AAC, 78, 27}, /* CFG_VIN2A_D17_OUT */ 94789a38953SNishanth Menon {0x0AB0, 411, 0}, /* CFG_VIN2A_D18_IN */ 94889a38953SNishanth Menon {0x0ABC, 0, 382}, /* CFG_VIN2A_D19_IN */ 94989a38953SNishanth Menon {0x0AD4, 320, 750}, /* CFG_VIN2A_D20_IN */ 95089a38953SNishanth Menon {0x0AE0, 192, 836}, /* CFG_VIN2A_D21_IN */ 95189a38953SNishanth Menon {0x0AEC, 294, 669}, /* CFG_VIN2A_D22_IN */ 95289a38953SNishanth Menon {0x0AF8, 50, 700}, /* CFG_VIN2A_D23_IN */ 953*d9e14671SLokesh Vutla {0x0B9C, 0, 706}, /* CFG_VOUT1_CLK_OUT */ 954*d9e14671SLokesh Vutla {0x0BA8, 2313, 0}, /* CFG_VOUT1_D0_OUT */ 955*d9e14671SLokesh Vutla {0x0BB4, 2199, 0}, /* CFG_VOUT1_D10_OUT */ 956*d9e14671SLokesh Vutla {0x0BC0, 2266, 0}, /* CFG_VOUT1_D11_OUT */ 957*d9e14671SLokesh Vutla {0x0BCC, 3159, 0}, /* CFG_VOUT1_D12_OUT */ 958*d9e14671SLokesh Vutla {0x0BD8, 2100, 0}, /* CFG_VOUT1_D13_OUT */ 959*d9e14671SLokesh Vutla {0x0BE4, 2229, 0}, /* CFG_VOUT1_D14_OUT */ 960*d9e14671SLokesh Vutla {0x0BF0, 2202, 0}, /* CFG_VOUT1_D15_OUT */ 961*d9e14671SLokesh Vutla {0x0BFC, 2084, 0}, /* CFG_VOUT1_D16_OUT */ 962*d9e14671SLokesh Vutla {0x0C08, 2195, 0}, /* CFG_VOUT1_D17_OUT */ 963*d9e14671SLokesh Vutla {0x0C14, 2342, 0}, /* CFG_VOUT1_D18_OUT */ 964*d9e14671SLokesh Vutla {0x0C20, 2463, 0}, /* CFG_VOUT1_D19_OUT */ 965*d9e14671SLokesh Vutla {0x0C2C, 2439, 0}, /* CFG_VOUT1_D1_OUT */ 966*d9e14671SLokesh Vutla {0x0C38, 2304, 0}, /* CFG_VOUT1_D20_OUT */ 967*d9e14671SLokesh Vutla {0x0C44, 2103, 0}, /* CFG_VOUT1_D21_OUT */ 968*d9e14671SLokesh Vutla {0x0C50, 2145, 0}, /* CFG_VOUT1_D22_OUT */ 969*d9e14671SLokesh Vutla {0x0C5C, 1932, 0}, /* CFG_VOUT1_D23_OUT */ 970*d9e14671SLokesh Vutla {0x0C68, 2200, 0}, /* CFG_VOUT1_D2_OUT */ 971*d9e14671SLokesh Vutla {0x0C74, 2355, 0}, /* CFG_VOUT1_D3_OUT */ 972*d9e14671SLokesh Vutla {0x0C80, 3215, 0}, /* CFG_VOUT1_D4_OUT */ 973*d9e14671SLokesh Vutla {0x0C8C, 2314, 0}, /* CFG_VOUT1_D5_OUT */ 974*d9e14671SLokesh Vutla {0x0C98, 2238, 0}, /* CFG_VOUT1_D6_OUT */ 975*d9e14671SLokesh Vutla {0x0CA4, 2381, 0}, /* CFG_VOUT1_D7_OUT */ 976*d9e14671SLokesh Vutla {0x0CB0, 2138, 0}, /* CFG_VOUT1_D8_OUT */ 977*d9e14671SLokesh Vutla {0x0CBC, 2383, 0}, /* CFG_VOUT1_D9_OUT */ 978*d9e14671SLokesh Vutla {0x0CC8, 1984, 0}, /* CFG_VOUT1_DE_OUT */ 979*d9e14671SLokesh Vutla {0x0CE0, 1947, 0}, /* CFG_VOUT1_HSYNC_OUT */ 980*d9e14671SLokesh Vutla {0x0CEC, 2739, 0}, /* CFG_VOUT1_VSYNC_OUT */ 98189a38953SNishanth Menon }; 98289a38953SNishanth Menon 983c020d355SSteve Kipisz const struct iodelay_cfg_entry iodelay_cfg_array_am572x_idk[] = { 984c887bef8SLokesh Vutla {0x0114, 1861, 901}, /* CFG_GPMC_A0_IN */ 985c887bef8SLokesh Vutla {0x0120, 0, 0}, /* CFG_GPMC_A10_IN */ 986c887bef8SLokesh Vutla {0x012C, 1783, 1178}, /* CFG_GPMC_A11_IN */ 987c887bef8SLokesh Vutla {0x0138, 1903, 853}, /* CFG_GPMC_A12_IN */ 988c020d355SSteve Kipisz {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 989c887bef8SLokesh Vutla {0x0150, 2575, 966}, /* CFG_GPMC_A14_IN */ 990c887bef8SLokesh Vutla {0x015C, 2503, 889}, /* CFG_GPMC_A15_IN */ 991c887bef8SLokesh Vutla {0x0168, 2528, 1007}, /* CFG_GPMC_A16_IN */ 992c887bef8SLokesh Vutla {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 993c887bef8SLokesh Vutla {0x0174, 2533, 980}, /* CFG_GPMC_A17_IN */ 994c887bef8SLokesh Vutla {0x0188, 590, 0}, /* CFG_GPMC_A18_OUT */ 995c887bef8SLokesh Vutla {0x0198, 1652, 891}, /* CFG_GPMC_A1_IN */ 996c887bef8SLokesh Vutla {0x0204, 1888, 1212}, /* CFG_GPMC_A2_IN */ 997c887bef8SLokesh Vutla {0x0210, 1839, 1274}, /* CFG_GPMC_A3_IN */ 998c887bef8SLokesh Vutla {0x021C, 1868, 1113}, /* CFG_GPMC_A4_IN */ 999c887bef8SLokesh Vutla {0x0228, 1757, 1079}, /* CFG_GPMC_A5_IN */ 1000c887bef8SLokesh Vutla {0x0234, 1800, 670}, /* CFG_GPMC_A6_IN */ 1001c887bef8SLokesh Vutla {0x0240, 1967, 898}, /* CFG_GPMC_A7_IN */ 1002c887bef8SLokesh Vutla {0x024C, 1731, 959}, /* CFG_GPMC_A8_IN */ 1003c887bef8SLokesh Vutla {0x0258, 1766, 1150}, /* CFG_GPMC_A9_IN */ 1004c020d355SSteve Kipisz {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 1005c887bef8SLokesh Vutla {0x0590, 1000, 4200}, /* CFG_MCASP5_ACLKX_OUT */ 1006c887bef8SLokesh Vutla {0x05AC, 800, 3800}, /* CFG_MCASP5_FSX_IN */ 1007e79d2dc7SLokesh Vutla {0x06F0, 260, 0}, /* CFG_RGMII0_RXC_IN */ 1008e79d2dc7SLokesh Vutla {0x06FC, 0, 1412}, /* CFG_RGMII0_RXCTL_IN */ 1009e79d2dc7SLokesh Vutla {0x0708, 123, 1047}, /* CFG_RGMII0_RXD0_IN */ 1010e79d2dc7SLokesh Vutla {0x0714, 139, 1081}, /* CFG_RGMII0_RXD1_IN */ 1011e79d2dc7SLokesh Vutla {0x0720, 195, 1100}, /* CFG_RGMII0_RXD2_IN */ 1012e79d2dc7SLokesh Vutla {0x072C, 239, 1216}, /* CFG_RGMII0_RXD3_IN */ 1013e79d2dc7SLokesh Vutla {0x0740, 89, 0}, /* CFG_RGMII0_TXC_OUT */ 1014e79d2dc7SLokesh Vutla {0x074C, 15, 125}, /* CFG_RGMII0_TXCTL_OUT */ 1015e79d2dc7SLokesh Vutla {0x0758, 339, 162}, /* CFG_RGMII0_TXD0_OUT */ 1016e79d2dc7SLokesh Vutla {0x0764, 146, 94}, /* CFG_RGMII0_TXD1_OUT */ 1017e79d2dc7SLokesh Vutla {0x0770, 0, 27}, /* CFG_RGMII0_TXD2_OUT */ 1018e79d2dc7SLokesh Vutla {0x077C, 291, 205}, /* CFG_RGMII0_TXD3_OUT */ 1019e79d2dc7SLokesh Vutla {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 1020e79d2dc7SLokesh Vutla {0x0A7C, 219, 101}, /* CFG_VIN2A_D13_OUT */ 1021e79d2dc7SLokesh Vutla {0x0A88, 92, 58}, /* CFG_VIN2A_D14_OUT */ 1022e79d2dc7SLokesh Vutla {0x0A94, 135, 100}, /* CFG_VIN2A_D15_OUT */ 1023e79d2dc7SLokesh Vutla {0x0AA0, 154, 101}, /* CFG_VIN2A_D16_OUT */ 1024e79d2dc7SLokesh Vutla {0x0AAC, 78, 27}, /* CFG_VIN2A_D17_OUT */ 1025e79d2dc7SLokesh Vutla {0x0AB0, 411, 0}, /* CFG_VIN2A_D18_IN */ 1026e79d2dc7SLokesh Vutla {0x0ABC, 0, 382}, /* CFG_VIN2A_D19_IN */ 1027e79d2dc7SLokesh Vutla {0x0AD4, 320, 750}, /* CFG_VIN2A_D20_IN */ 1028e79d2dc7SLokesh Vutla {0x0AE0, 192, 836}, /* CFG_VIN2A_D21_IN */ 1029e79d2dc7SLokesh Vutla {0x0AEC, 294, 669}, /* CFG_VIN2A_D22_IN */ 1030e79d2dc7SLokesh Vutla {0x0AF8, 50, 700}, /* CFG_VIN2A_D23_IN */ 1031c887bef8SLokesh Vutla {0x0B30, 0, 0}, /* CFG_VIN2A_D5_OUT */ 1032e79d2dc7SLokesh Vutla {0x0B9C, 1126, 751}, /* CFG_VOUT1_CLK_OUT */ 1033e79d2dc7SLokesh Vutla {0x0BA8, 395, 0}, /* CFG_VOUT1_D0_OUT */ 1034e79d2dc7SLokesh Vutla {0x0BB4, 282, 0}, /* CFG_VOUT1_D10_OUT */ 1035e79d2dc7SLokesh Vutla {0x0BC0, 348, 0}, /* CFG_VOUT1_D11_OUT */ 1036e79d2dc7SLokesh Vutla {0x0BCC, 1240, 0}, /* CFG_VOUT1_D12_OUT */ 1037e79d2dc7SLokesh Vutla {0x0BD8, 182, 0}, /* CFG_VOUT1_D13_OUT */ 1038e79d2dc7SLokesh Vutla {0x0BE4, 311, 0}, /* CFG_VOUT1_D14_OUT */ 1039e79d2dc7SLokesh Vutla {0x0BF0, 285, 0}, /* CFG_VOUT1_D15_OUT */ 1040e79d2dc7SLokesh Vutla {0x0BFC, 166, 0}, /* CFG_VOUT1_D16_OUT */ 1041e79d2dc7SLokesh Vutla {0x0C08, 278, 0}, /* CFG_VOUT1_D17_OUT */ 1042e79d2dc7SLokesh Vutla {0x0C14, 425, 0}, /* CFG_VOUT1_D18_OUT */ 1043e79d2dc7SLokesh Vutla {0x0C20, 516, 0}, /* CFG_VOUT1_D19_OUT */ 1044e79d2dc7SLokesh Vutla {0x0C2C, 521, 0}, /* CFG_VOUT1_D1_OUT */ 1045e79d2dc7SLokesh Vutla {0x0C38, 386, 0}, /* CFG_VOUT1_D20_OUT */ 1046e79d2dc7SLokesh Vutla {0x0C44, 111, 0}, /* CFG_VOUT1_D21_OUT */ 1047e79d2dc7SLokesh Vutla {0x0C50, 227, 0}, /* CFG_VOUT1_D22_OUT */ 1048e79d2dc7SLokesh Vutla {0x0C5C, 0, 0}, /* CFG_VOUT1_D23_OUT */ 1049e79d2dc7SLokesh Vutla {0x0C68, 282, 0}, /* CFG_VOUT1_D2_OUT */ 1050e79d2dc7SLokesh Vutla {0x0C74, 438, 0}, /* CFG_VOUT1_D3_OUT */ 1051e79d2dc7SLokesh Vutla {0x0C80, 1298, 0}, /* CFG_VOUT1_D4_OUT */ 1052e79d2dc7SLokesh Vutla {0x0C8C, 397, 0}, /* CFG_VOUT1_D5_OUT */ 1053e79d2dc7SLokesh Vutla {0x0C98, 321, 0}, /* CFG_VOUT1_D6_OUT */ 1054e79d2dc7SLokesh Vutla {0x0CA4, 155, 309}, /* CFG_VOUT1_D7_OUT */ 1055e79d2dc7SLokesh Vutla {0x0CB0, 212, 0}, /* CFG_VOUT1_D8_OUT */ 1056e79d2dc7SLokesh Vutla {0x0CBC, 466, 0}, /* CFG_VOUT1_D9_OUT */ 1057e79d2dc7SLokesh Vutla {0x0CC8, 0, 0}, /* CFG_VOUT1_DE_OUT */ 1058e79d2dc7SLokesh Vutla {0x0CE0, 0, 0}, /* CFG_VOUT1_HSYNC_OUT */ 1059e79d2dc7SLokesh Vutla {0x0CEC, 139, 701}, /* CFG_VOUT1_VSYNC_OUT */ 1060c020d355SSteve Kipisz }; 10614d8397c6SSteve Kipisz 10624d8397c6SSteve Kipisz const struct iodelay_cfg_entry iodelay_cfg_array_am571x_idk[] = { 10632d7e9e9dSLokesh Vutla {0x0114, 1873, 702}, /* CFG_GPMC_A0_IN */ 10642d7e9e9dSLokesh Vutla {0x0120, 0, 0}, /* CFG_GPMC_A10_IN */ 10652d7e9e9dSLokesh Vutla {0x012C, 1851, 1011}, /* CFG_GPMC_A11_IN */ 10662d7e9e9dSLokesh Vutla {0x0138, 2009, 601}, /* CFG_GPMC_A12_IN */ 10674d8397c6SSteve Kipisz {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 10682d7e9e9dSLokesh Vutla {0x0150, 2247, 1186}, /* CFG_GPMC_A14_IN */ 10692d7e9e9dSLokesh Vutla {0x015C, 2176, 1197}, /* CFG_GPMC_A15_IN */ 10702d7e9e9dSLokesh Vutla {0x0168, 2229, 1268}, /* CFG_GPMC_A16_IN */ 10714d8397c6SSteve Kipisz {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 10722d7e9e9dSLokesh Vutla {0x0174, 2251, 1217}, /* CFG_GPMC_A17_IN */ 10734d8397c6SSteve Kipisz {0x0188, 0, 0}, /* CFG_GPMC_A18_OUT */ 10742d7e9e9dSLokesh Vutla {0x0198, 1629, 772}, /* CFG_GPMC_A1_IN */ 10752d7e9e9dSLokesh Vutla {0x0204, 1734, 898}, /* CFG_GPMC_A2_IN */ 10762d7e9e9dSLokesh Vutla {0x0210, 1757, 1076}, /* CFG_GPMC_A3_IN */ 10772d7e9e9dSLokesh Vutla {0x021C, 1794, 893}, /* CFG_GPMC_A4_IN */ 10782d7e9e9dSLokesh Vutla {0x0228, 1726, 853}, /* CFG_GPMC_A5_IN */ 10792d7e9e9dSLokesh Vutla {0x0234, 1792, 612}, /* CFG_GPMC_A6_IN */ 10802d7e9e9dSLokesh Vutla {0x0240, 2117, 610}, /* CFG_GPMC_A7_IN */ 10812d7e9e9dSLokesh Vutla {0x024C, 1758, 653}, /* CFG_GPMC_A8_IN */ 10822d7e9e9dSLokesh Vutla {0x0258, 1705, 899}, /* CFG_GPMC_A9_IN */ 10832d7e9e9dSLokesh Vutla {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 10844d8397c6SSteve Kipisz {0x06F0, 413, 0}, /* CFG_RGMII0_RXC_IN */ 10854d8397c6SSteve Kipisz {0x06FC, 27, 2296}, /* CFG_RGMII0_RXCTL_IN */ 10864d8397c6SSteve Kipisz {0x0708, 3, 1721}, /* CFG_RGMII0_RXD0_IN */ 10874d8397c6SSteve Kipisz {0x0714, 134, 1786}, /* CFG_RGMII0_RXD1_IN */ 10884d8397c6SSteve Kipisz {0x0720, 40, 1966}, /* CFG_RGMII0_RXD2_IN */ 10894d8397c6SSteve Kipisz {0x072C, 0, 2057}, /* CFG_RGMII0_RXD3_IN */ 10904d8397c6SSteve Kipisz {0x0740, 0, 60}, /* CFG_RGMII0_TXC_OUT */ 10914d8397c6SSteve Kipisz {0x074C, 0, 60}, /* CFG_RGMII0_TXCTL_OUT */ 10924d8397c6SSteve Kipisz {0x0758, 0, 60}, /* CFG_RGMII0_TXD0_OUT */ 10934d8397c6SSteve Kipisz {0x0764, 0, 0}, /* CFG_RGMII0_TXD1_OUT */ 10944d8397c6SSteve Kipisz {0x0770, 0, 60}, /* CFG_RGMII0_TXD2_OUT */ 10954d8397c6SSteve Kipisz {0x077C, 0, 120}, /* CFG_RGMII0_TXD3_OUT */ 10964d8397c6SSteve Kipisz {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 10974d8397c6SSteve Kipisz {0x0A7C, 170, 0}, /* CFG_VIN2A_D13_OUT */ 10984d8397c6SSteve Kipisz {0x0A88, 150, 0}, /* CFG_VIN2A_D14_OUT */ 10994d8397c6SSteve Kipisz {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */ 11004d8397c6SSteve Kipisz {0x0AA0, 60, 0}, /* CFG_VIN2A_D16_OUT */ 11014d8397c6SSteve Kipisz {0x0AAC, 60, 0}, /* CFG_VIN2A_D17_OUT */ 11024d8397c6SSteve Kipisz {0x0AB0, 530, 0}, /* CFG_VIN2A_D18_IN */ 11034d8397c6SSteve Kipisz {0x0ABC, 71, 1099}, /* CFG_VIN2A_D19_IN */ 11044d8397c6SSteve Kipisz {0x0AD4, 142, 1337}, /* CFG_VIN2A_D20_IN */ 11054d8397c6SSteve Kipisz {0x0AE0, 114, 1517}, /* CFG_VIN2A_D21_IN */ 11064d8397c6SSteve Kipisz {0x0AEC, 171, 1331}, /* CFG_VIN2A_D22_IN */ 11074d8397c6SSteve Kipisz {0x0AF8, 0, 1328}, /* CFG_VIN2A_D23_IN */ 11084d8397c6SSteve Kipisz }; 11094d8397c6SSteve Kipisz 11102d7e9e9dSLokesh Vutla const struct iodelay_cfg_entry iodelay_cfg_array_am571x_idk_4port[] = { 11112d7e9e9dSLokesh Vutla {0x0588, 2100, 1959}, /* CFG_MCASP5_ACLKX_IN */ 11122d7e9e9dSLokesh Vutla {0x05AC, 2100, 1780}, /* CFG_MCASP5_FSX_IN */ 11132d7e9e9dSLokesh Vutla {0x0B30, 0, 400}, /* CFG_VIN2A_D5_OUT */ 11142d7e9e9dSLokesh Vutla }; 111574cc8b09SKipisz, Steven #endif 111674cc8b09SKipisz, Steven #endif /* _MUX_DATA_BEAGLE_X15_H_ */ 1117