174cc8b09SKipisz, Steven /* 274cc8b09SKipisz, Steven * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com 374cc8b09SKipisz, Steven * 474cc8b09SKipisz, Steven * Author: Felipe Balbi <balbi@ti.com> 574cc8b09SKipisz, Steven * 674cc8b09SKipisz, Steven * Based on board/ti/dra7xx/evm.c 774cc8b09SKipisz, Steven * 874cc8b09SKipisz, Steven * SPDX-License-Identifier: GPL-2.0+ 974cc8b09SKipisz, Steven */ 1074cc8b09SKipisz, Steven 1174cc8b09SKipisz, Steven #include <common.h> 1274cc8b09SKipisz, Steven #include <palmas.h> 1374cc8b09SKipisz, Steven #include <sata.h> 1474cc8b09SKipisz, Steven #include <usb.h> 1574cc8b09SKipisz, Steven #include <asm/omap_common.h> 1617c29873SAndreas Dannenberg #include <asm/omap_sec_common.h> 1774cc8b09SKipisz, Steven #include <asm/emif.h> 1874cc8b09SKipisz, Steven #include <asm/gpio.h> 1974cc8b09SKipisz, Steven #include <asm/arch/gpio.h> 2074cc8b09SKipisz, Steven #include <asm/arch/clock.h> 2174cc8b09SKipisz, Steven #include <asm/arch/dra7xx_iodelay.h> 2274cc8b09SKipisz, Steven #include <asm/arch/sys_proto.h> 2374cc8b09SKipisz, Steven #include <asm/arch/mmc_host_def.h> 2474cc8b09SKipisz, Steven #include <asm/arch/sata.h> 2574cc8b09SKipisz, Steven #include <asm/arch/gpio.h> 2674cc8b09SKipisz, Steven #include <asm/arch/omap.h> 2774cc8b09SKipisz, Steven #include <environment.h> 2874cc8b09SKipisz, Steven #include <usb.h> 2974cc8b09SKipisz, Steven #include <linux/usb/gadget.h> 3074cc8b09SKipisz, Steven #include <dwc3-uboot.h> 3174cc8b09SKipisz, Steven #include <dwc3-omap-uboot.h> 3274cc8b09SKipisz, Steven #include <ti-usb-phy-uboot.h> 3374cc8b09SKipisz, Steven 34212f96f6SKipisz, Steven #include "../common/board_detect.h" 3574cc8b09SKipisz, Steven #include "mux_data.h" 3674cc8b09SKipisz, Steven 37212f96f6SKipisz, Steven #define board_is_x15() board_ti_is("BBRDX15_") 38f7f9f6beSLokesh Vutla #define board_is_x15_revb1() (board_ti_is("BBRDX15_") && \ 3970879224SLokesh Vutla !strncmp("B.10", board_ti_get_rev(), 3)) 40*f70a4272SLokesh Vutla #define board_is_x15_revc() (board_ti_is("BBRDX15_") && \ 41*f70a4272SLokesh Vutla !strncmp("C.00", board_ti_get_rev(), 3)) 42212f96f6SKipisz, Steven #define board_is_am572x_evm() board_ti_is("AM572PM_") 43bf43ce6cSNishanth Menon #define board_is_am572x_evm_reva3() \ 44bf43ce6cSNishanth Menon (board_ti_is("AM572PM_") && \ 4570879224SLokesh Vutla !strncmp("A.30", board_ti_get_rev(), 3)) 46c020d355SSteve Kipisz #define board_is_am572x_idk() board_ti_is("AM572IDK") 474d8397c6SSteve Kipisz #define board_is_am571x_idk() board_ti_is("AM571IDK") 48212f96f6SKipisz, Steven 4974cc8b09SKipisz, Steven #ifdef CONFIG_DRIVER_TI_CPSW 5074cc8b09SKipisz, Steven #include <cpsw.h> 5174cc8b09SKipisz, Steven #endif 5274cc8b09SKipisz, Steven 5374cc8b09SKipisz, Steven DECLARE_GLOBAL_DATA_PTR; 5474cc8b09SKipisz, Steven 5537611052SRoger Quadros #define GPIO_ETH_LCD GPIO_TO_PIN(2, 22) 5674cc8b09SKipisz, Steven /* GPIO 7_11 */ 5774cc8b09SKipisz, Steven #define GPIO_DDR_VTT_EN 203 5874cc8b09SKipisz, Steven 59fcb18524SNishanth Menon /* Touch screen controller to identify the LCD */ 60fcb18524SNishanth Menon #define OSD_TS_FT_BUS_ADDRESS 0 61fcb18524SNishanth Menon #define OSD_TS_FT_CHIP_ADDRESS 0x38 62fcb18524SNishanth Menon #define OSD_TS_FT_REG_ID 0xA3 63fcb18524SNishanth Menon /* 64fcb18524SNishanth Menon * Touchscreen IDs for various OSD panels 65fcb18524SNishanth Menon * Ref: http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf 66fcb18524SNishanth Menon */ 67fcb18524SNishanth Menon /* Used on newer osd101t2587 Panels */ 68fcb18524SNishanth Menon #define OSD_TS_FT_ID_5x46 0x54 69fcb18524SNishanth Menon /* Used on older osd101t2045 Panels */ 70fcb18524SNishanth Menon #define OSD_TS_FT_ID_5606 0x08 71fcb18524SNishanth Menon 72212f96f6SKipisz, Steven #define SYSINFO_BOARD_NAME_MAX_LEN 45 73212f96f6SKipisz, Steven 74385d3632SKeerthy #define TPS65903X_PRIMARY_SECONDARY_PAD2 0xFB 75385d3632SKeerthy #define TPS65903X_PAD2_POWERHOLD_MASK 0x20 76385d3632SKeerthy 7774cc8b09SKipisz, Steven const struct omap_sysinfo sysinfo = { 78212f96f6SKipisz, Steven "Board: UNKNOWN(BeagleBoard X15?) REV UNKNOWN\n" 7974cc8b09SKipisz, Steven }; 8074cc8b09SKipisz, Steven 8174cc8b09SKipisz, Steven static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = { 8274cc8b09SKipisz, Steven .dmm_lisa_map_3 = 0x80740300, 8374cc8b09SKipisz, Steven .is_ma_present = 0x1 8474cc8b09SKipisz, Steven }; 8574cc8b09SKipisz, Steven 864d8397c6SSteve Kipisz static const struct dmm_lisa_map_regs am571x_idk_lisa_regs = { 874d8397c6SSteve Kipisz .dmm_lisa_map_3 = 0x80640100, 884d8397c6SSteve Kipisz .is_ma_present = 0x1 894d8397c6SSteve Kipisz }; 904d8397c6SSteve Kipisz 9174cc8b09SKipisz, Steven void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) 9274cc8b09SKipisz, Steven { 934d8397c6SSteve Kipisz if (board_is_am571x_idk()) 944d8397c6SSteve Kipisz *dmm_lisa_regs = &am571x_idk_lisa_regs; 954d8397c6SSteve Kipisz else 9674cc8b09SKipisz, Steven *dmm_lisa_regs = &beagle_x15_lisa_regs; 9774cc8b09SKipisz, Steven } 9874cc8b09SKipisz, Steven 9974cc8b09SKipisz, Steven static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = { 10074cc8b09SKipisz, Steven .sdram_config_init = 0x61851b32, 10174cc8b09SKipisz, Steven .sdram_config = 0x61851b32, 10211e2b043SLokesh Vutla .sdram_config2 = 0x08000000, 10374cc8b09SKipisz, Steven .ref_ctrl = 0x000040F1, 10474cc8b09SKipisz, Steven .ref_ctrl_final = 0x00001035, 10511e2b043SLokesh Vutla .sdram_tim1 = 0xcccf36ab, 10611e2b043SLokesh Vutla .sdram_tim2 = 0x308f7fda, 10711e2b043SLokesh Vutla .sdram_tim3 = 0x409f88a8, 10874cc8b09SKipisz, Steven .read_idle_ctrl = 0x00050000, 10911e2b043SLokesh Vutla .zq_config = 0x5007190b, 11074cc8b09SKipisz, Steven .temp_alert_config = 0x00000000, 11174cc8b09SKipisz, Steven .emif_ddr_phy_ctlr_1_init = 0x0024400b, 11274cc8b09SKipisz, Steven .emif_ddr_phy_ctlr_1 = 0x0e24400b, 11374cc8b09SKipisz, Steven .emif_ddr_ext_phy_ctrl_1 = 0x10040100, 11411e2b043SLokesh Vutla .emif_ddr_ext_phy_ctrl_2 = 0x00910091, 11511e2b043SLokesh Vutla .emif_ddr_ext_phy_ctrl_3 = 0x00950095, 11611e2b043SLokesh Vutla .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, 11711e2b043SLokesh Vutla .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, 11874cc8b09SKipisz, Steven .emif_rd_wr_lvl_rmp_win = 0x00000000, 11974cc8b09SKipisz, Steven .emif_rd_wr_lvl_rmp_ctl = 0x80000000, 12074cc8b09SKipisz, Steven .emif_rd_wr_lvl_ctl = 0x00000000, 12174cc8b09SKipisz, Steven .emif_rd_wr_exec_thresh = 0x00000305 12274cc8b09SKipisz, Steven }; 12374cc8b09SKipisz, Steven 12474cc8b09SKipisz, Steven /* Ext phy ctrl regs 1-35 */ 12574cc8b09SKipisz, Steven static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = { 12674cc8b09SKipisz, Steven 0x10040100, 12711e2b043SLokesh Vutla 0x00910091, 12811e2b043SLokesh Vutla 0x00950095, 12911e2b043SLokesh Vutla 0x009B009B, 13011e2b043SLokesh Vutla 0x009E009E, 13111e2b043SLokesh Vutla 0x00980098, 13274cc8b09SKipisz, Steven 0x00340034, 13374cc8b09SKipisz, Steven 0x00350035, 13411e2b043SLokesh Vutla 0x00340034, 13511e2b043SLokesh Vutla 0x00310031, 13611e2b043SLokesh Vutla 0x00340034, 13711e2b043SLokesh Vutla 0x007F007F, 13811e2b043SLokesh Vutla 0x007F007F, 13911e2b043SLokesh Vutla 0x007F007F, 14011e2b043SLokesh Vutla 0x007F007F, 14111e2b043SLokesh Vutla 0x007F007F, 14211e2b043SLokesh Vutla 0x00480048, 14311e2b043SLokesh Vutla 0x004A004A, 14411e2b043SLokesh Vutla 0x00520052, 14511e2b043SLokesh Vutla 0x00550055, 14611e2b043SLokesh Vutla 0x00500050, 14774cc8b09SKipisz, Steven 0x00000000, 14874cc8b09SKipisz, Steven 0x00600020, 14974cc8b09SKipisz, Steven 0x40011080, 15074cc8b09SKipisz, Steven 0x08102040, 15111e2b043SLokesh Vutla 0x0, 15211e2b043SLokesh Vutla 0x0, 15311e2b043SLokesh Vutla 0x0, 15411e2b043SLokesh Vutla 0x0, 15511e2b043SLokesh Vutla 0x0, 15674cc8b09SKipisz, Steven 0x0, 15774cc8b09SKipisz, Steven 0x0, 15874cc8b09SKipisz, Steven 0x0, 15974cc8b09SKipisz, Steven 0x0, 16074cc8b09SKipisz, Steven 0x0 16174cc8b09SKipisz, Steven }; 16274cc8b09SKipisz, Steven 16374cc8b09SKipisz, Steven static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { 16474cc8b09SKipisz, Steven .sdram_config_init = 0x61851b32, 16574cc8b09SKipisz, Steven .sdram_config = 0x61851b32, 16611e2b043SLokesh Vutla .sdram_config2 = 0x08000000, 16774cc8b09SKipisz, Steven .ref_ctrl = 0x000040F1, 16874cc8b09SKipisz, Steven .ref_ctrl_final = 0x00001035, 1695f405e7fSSchuyler Patton .sdram_tim1 = 0xcccf36b3, 17011e2b043SLokesh Vutla .sdram_tim2 = 0x308f7fda, 1715f405e7fSSchuyler Patton .sdram_tim3 = 0x407f88a8, 17274cc8b09SKipisz, Steven .read_idle_ctrl = 0x00050000, 17311e2b043SLokesh Vutla .zq_config = 0x5007190b, 17474cc8b09SKipisz, Steven .temp_alert_config = 0x00000000, 17574cc8b09SKipisz, Steven .emif_ddr_phy_ctlr_1_init = 0x0024400b, 17674cc8b09SKipisz, Steven .emif_ddr_phy_ctlr_1 = 0x0e24400b, 17774cc8b09SKipisz, Steven .emif_ddr_ext_phy_ctrl_1 = 0x10040100, 17811e2b043SLokesh Vutla .emif_ddr_ext_phy_ctrl_2 = 0x00910091, 17911e2b043SLokesh Vutla .emif_ddr_ext_phy_ctrl_3 = 0x00950095, 18011e2b043SLokesh Vutla .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, 18111e2b043SLokesh Vutla .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, 18274cc8b09SKipisz, Steven .emif_rd_wr_lvl_rmp_win = 0x00000000, 18374cc8b09SKipisz, Steven .emif_rd_wr_lvl_rmp_ctl = 0x80000000, 18474cc8b09SKipisz, Steven .emif_rd_wr_lvl_ctl = 0x00000000, 18574cc8b09SKipisz, Steven .emif_rd_wr_exec_thresh = 0x00000305 18674cc8b09SKipisz, Steven }; 18774cc8b09SKipisz, Steven 18874cc8b09SKipisz, Steven static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = { 18974cc8b09SKipisz, Steven 0x10040100, 19011e2b043SLokesh Vutla 0x00910091, 19111e2b043SLokesh Vutla 0x00950095, 19211e2b043SLokesh Vutla 0x009B009B, 19311e2b043SLokesh Vutla 0x009E009E, 19411e2b043SLokesh Vutla 0x00980098, 19511e2b043SLokesh Vutla 0x00340034, 19674cc8b09SKipisz, Steven 0x00350035, 19711e2b043SLokesh Vutla 0x00340034, 19811e2b043SLokesh Vutla 0x00310031, 19911e2b043SLokesh Vutla 0x00340034, 20011e2b043SLokesh Vutla 0x007F007F, 20111e2b043SLokesh Vutla 0x007F007F, 20211e2b043SLokesh Vutla 0x007F007F, 20311e2b043SLokesh Vutla 0x007F007F, 20411e2b043SLokesh Vutla 0x007F007F, 20511e2b043SLokesh Vutla 0x00480048, 20611e2b043SLokesh Vutla 0x004A004A, 20711e2b043SLokesh Vutla 0x00520052, 20811e2b043SLokesh Vutla 0x00550055, 20911e2b043SLokesh Vutla 0x00500050, 21074cc8b09SKipisz, Steven 0x00000000, 21174cc8b09SKipisz, Steven 0x00600020, 21274cc8b09SKipisz, Steven 0x40011080, 21374cc8b09SKipisz, Steven 0x08102040, 21411e2b043SLokesh Vutla 0x0, 21511e2b043SLokesh Vutla 0x0, 21611e2b043SLokesh Vutla 0x0, 21711e2b043SLokesh Vutla 0x0, 21811e2b043SLokesh Vutla 0x0, 21974cc8b09SKipisz, Steven 0x0, 22074cc8b09SKipisz, Steven 0x0, 22174cc8b09SKipisz, Steven 0x0, 22274cc8b09SKipisz, Steven 0x0, 22374cc8b09SKipisz, Steven 0x0 22474cc8b09SKipisz, Steven }; 22574cc8b09SKipisz, Steven 22674cc8b09SKipisz, Steven void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) 22774cc8b09SKipisz, Steven { 22874cc8b09SKipisz, Steven switch (emif_nr) { 22974cc8b09SKipisz, Steven case 1: 23074cc8b09SKipisz, Steven *regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs; 23174cc8b09SKipisz, Steven break; 23274cc8b09SKipisz, Steven case 2: 23374cc8b09SKipisz, Steven *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs; 23474cc8b09SKipisz, Steven break; 23574cc8b09SKipisz, Steven } 23674cc8b09SKipisz, Steven } 23774cc8b09SKipisz, Steven 23874cc8b09SKipisz, Steven void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size) 23974cc8b09SKipisz, Steven { 24074cc8b09SKipisz, Steven switch (emif_nr) { 24174cc8b09SKipisz, Steven case 1: 24274cc8b09SKipisz, Steven *regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs; 24374cc8b09SKipisz, Steven *size = ARRAY_SIZE(beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs); 24474cc8b09SKipisz, Steven break; 24574cc8b09SKipisz, Steven case 2: 24674cc8b09SKipisz, Steven *regs = beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs; 24774cc8b09SKipisz, Steven *size = ARRAY_SIZE(beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs); 24874cc8b09SKipisz, Steven break; 24974cc8b09SKipisz, Steven } 25074cc8b09SKipisz, Steven } 25174cc8b09SKipisz, Steven 25274cc8b09SKipisz, Steven struct vcores_data beagle_x15_volts = { 253beb71279SLokesh Vutla .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM, 254beb71279SLokesh Vutla .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM, 25574cc8b09SKipisz, Steven .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 25674cc8b09SKipisz, Steven .mpu.addr = TPS659038_REG_ADDR_SMPS12, 25774cc8b09SKipisz, Steven .mpu.pmic = &tps659038, 2583708e78cSNishanth Menon .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK, 25974cc8b09SKipisz, Steven 260beb71279SLokesh Vutla .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM, 261beb71279SLokesh Vutla .eve.value[OPP_OD] = VDD_EVE_DRA7_OD, 262beb71279SLokesh Vutla .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH, 263beb71279SLokesh Vutla .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM, 264beb71279SLokesh Vutla .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD, 265beb71279SLokesh Vutla .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH, 26674cc8b09SKipisz, Steven .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, 26774cc8b09SKipisz, Steven .eve.addr = TPS659038_REG_ADDR_SMPS45, 26874cc8b09SKipisz, Steven .eve.pmic = &tps659038, 269e52e334eSNishanth Menon .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK, 27074cc8b09SKipisz, Steven 271beb71279SLokesh Vutla .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM, 272beb71279SLokesh Vutla .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD, 273beb71279SLokesh Vutla .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH, 274beb71279SLokesh Vutla .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM, 275beb71279SLokesh Vutla .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD, 276beb71279SLokesh Vutla .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH, 27774cc8b09SKipisz, Steven .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 27874cc8b09SKipisz, Steven .gpu.addr = TPS659038_REG_ADDR_SMPS45, 27974cc8b09SKipisz, Steven .gpu.pmic = &tps659038, 280e52e334eSNishanth Menon .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK, 28174cc8b09SKipisz, Steven 282beb71279SLokesh Vutla .core.value[OPP_NOM] = VDD_CORE_DRA7_NOM, 283beb71279SLokesh Vutla .core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM, 28474cc8b09SKipisz, Steven .core.efuse.reg_bits = DRA752_EFUSE_REGBITS, 28574cc8b09SKipisz, Steven .core.addr = TPS659038_REG_ADDR_SMPS6, 28674cc8b09SKipisz, Steven .core.pmic = &tps659038, 28774cc8b09SKipisz, Steven 288beb71279SLokesh Vutla .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM, 289beb71279SLokesh Vutla .iva.value[OPP_OD] = VDD_IVA_DRA7_OD, 290beb71279SLokesh Vutla .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH, 291beb71279SLokesh Vutla .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM, 292beb71279SLokesh Vutla .iva.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_IVA_OD, 293beb71279SLokesh Vutla .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH, 29474cc8b09SKipisz, Steven .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, 29574cc8b09SKipisz, Steven .iva.addr = TPS659038_REG_ADDR_SMPS45, 29674cc8b09SKipisz, Steven .iva.pmic = &tps659038, 297e52e334eSNishanth Menon .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK, 29874cc8b09SKipisz, Steven }; 29974cc8b09SKipisz, Steven 300d60198daSKeerthy struct vcores_data am572x_idk_volts = { 301beb71279SLokesh Vutla .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM, 302beb71279SLokesh Vutla .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM, 303d60198daSKeerthy .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 304d60198daSKeerthy .mpu.addr = TPS659038_REG_ADDR_SMPS12, 305d60198daSKeerthy .mpu.pmic = &tps659038, 306d60198daSKeerthy .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK, 307d60198daSKeerthy 308beb71279SLokesh Vutla .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM, 309beb71279SLokesh Vutla .eve.value[OPP_OD] = VDD_EVE_DRA7_OD, 310beb71279SLokesh Vutla .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH, 311beb71279SLokesh Vutla .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM, 312beb71279SLokesh Vutla .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD, 313beb71279SLokesh Vutla .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH, 314d60198daSKeerthy .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, 315d60198daSKeerthy .eve.addr = TPS659038_REG_ADDR_SMPS45, 316d60198daSKeerthy .eve.pmic = &tps659038, 317d60198daSKeerthy .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK, 318d60198daSKeerthy 319beb71279SLokesh Vutla .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM, 320beb71279SLokesh Vutla .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD, 321beb71279SLokesh Vutla .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH, 322beb71279SLokesh Vutla .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM, 323beb71279SLokesh Vutla .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD, 324beb71279SLokesh Vutla .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH, 325d60198daSKeerthy .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 326d60198daSKeerthy .gpu.addr = TPS659038_REG_ADDR_SMPS6, 327d60198daSKeerthy .gpu.pmic = &tps659038, 328d60198daSKeerthy .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK, 329d60198daSKeerthy 330beb71279SLokesh Vutla .core.value[OPP_NOM] = VDD_CORE_DRA7_NOM, 331beb71279SLokesh Vutla .core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM, 332d60198daSKeerthy .core.efuse.reg_bits = DRA752_EFUSE_REGBITS, 333d60198daSKeerthy .core.addr = TPS659038_REG_ADDR_SMPS7, 334d60198daSKeerthy .core.pmic = &tps659038, 335d60198daSKeerthy 336beb71279SLokesh Vutla .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM, 337beb71279SLokesh Vutla .iva.value[OPP_OD] = VDD_IVA_DRA7_OD, 338beb71279SLokesh Vutla .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH, 339beb71279SLokesh Vutla .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM, 340beb71279SLokesh Vutla .iva.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_IVA_OD, 341beb71279SLokesh Vutla .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH, 342d60198daSKeerthy .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, 343d60198daSKeerthy .iva.addr = TPS659038_REG_ADDR_SMPS8, 344d60198daSKeerthy .iva.pmic = &tps659038, 345d60198daSKeerthy .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK, 346d60198daSKeerthy }; 347d60198daSKeerthy 348b12550ebSKeerthy struct vcores_data am571x_idk_volts = { 349b12550ebSKeerthy .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM, 350b12550ebSKeerthy .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM, 351b12550ebSKeerthy .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 352b12550ebSKeerthy .mpu.addr = TPS659038_REG_ADDR_SMPS12, 353b12550ebSKeerthy .mpu.pmic = &tps659038, 354b12550ebSKeerthy .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK, 355b12550ebSKeerthy 356b12550ebSKeerthy .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM, 357b12550ebSKeerthy .eve.value[OPP_OD] = VDD_EVE_DRA7_OD, 358b12550ebSKeerthy .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH, 359b12550ebSKeerthy .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM, 360b12550ebSKeerthy .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD, 361b12550ebSKeerthy .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH, 362b12550ebSKeerthy .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, 363b12550ebSKeerthy .eve.addr = TPS659038_REG_ADDR_SMPS45, 364b12550ebSKeerthy .eve.pmic = &tps659038, 365b12550ebSKeerthy .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK, 366b12550ebSKeerthy 367b12550ebSKeerthy .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM, 368b12550ebSKeerthy .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD, 369b12550ebSKeerthy .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH, 370b12550ebSKeerthy .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM, 371b12550ebSKeerthy .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD, 372b12550ebSKeerthy .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH, 373b12550ebSKeerthy .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 374b12550ebSKeerthy .gpu.addr = TPS659038_REG_ADDR_SMPS6, 375b12550ebSKeerthy .gpu.pmic = &tps659038, 376b12550ebSKeerthy .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK, 377b12550ebSKeerthy 378b12550ebSKeerthy .core.value[OPP_NOM] = VDD_CORE_DRA7_NOM, 379b12550ebSKeerthy .core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM, 380b12550ebSKeerthy .core.efuse.reg_bits = DRA752_EFUSE_REGBITS, 381b12550ebSKeerthy .core.addr = TPS659038_REG_ADDR_SMPS7, 382b12550ebSKeerthy .core.pmic = &tps659038, 383b12550ebSKeerthy 384b12550ebSKeerthy .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM, 385b12550ebSKeerthy .iva.value[OPP_OD] = VDD_IVA_DRA7_OD, 386b12550ebSKeerthy .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH, 387b12550ebSKeerthy .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM, 388b12550ebSKeerthy .iva.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_IVA_OD, 389b12550ebSKeerthy .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH, 390b12550ebSKeerthy .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, 391b12550ebSKeerthy .iva.addr = TPS659038_REG_ADDR_SMPS45, 392b12550ebSKeerthy .iva.pmic = &tps659038, 393b12550ebSKeerthy .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK, 394b12550ebSKeerthy }; 395b12550ebSKeerthy 396beb71279SLokesh Vutla int get_voltrail_opp(int rail_offset) 397beb71279SLokesh Vutla { 398beb71279SLokesh Vutla int opp; 399beb71279SLokesh Vutla 400beb71279SLokesh Vutla switch (rail_offset) { 401beb71279SLokesh Vutla case VOLT_MPU: 402beb71279SLokesh Vutla opp = DRA7_MPU_OPP; 403beb71279SLokesh Vutla break; 404beb71279SLokesh Vutla case VOLT_CORE: 405beb71279SLokesh Vutla opp = DRA7_CORE_OPP; 406beb71279SLokesh Vutla break; 407beb71279SLokesh Vutla case VOLT_GPU: 408beb71279SLokesh Vutla opp = DRA7_GPU_OPP; 409beb71279SLokesh Vutla break; 410beb71279SLokesh Vutla case VOLT_EVE: 411beb71279SLokesh Vutla opp = DRA7_DSPEVE_OPP; 412beb71279SLokesh Vutla break; 413beb71279SLokesh Vutla case VOLT_IVA: 414beb71279SLokesh Vutla opp = DRA7_IVA_OPP; 415beb71279SLokesh Vutla break; 416beb71279SLokesh Vutla default: 417beb71279SLokesh Vutla opp = OPP_NOM; 418beb71279SLokesh Vutla } 419beb71279SLokesh Vutla 420beb71279SLokesh Vutla return opp; 421beb71279SLokesh Vutla } 422beb71279SLokesh Vutla 423beb71279SLokesh Vutla 424212f96f6SKipisz, Steven #ifdef CONFIG_SPL_BUILD 425212f96f6SKipisz, Steven /* No env to setup for SPL */ 426212f96f6SKipisz, Steven static inline void setup_board_eeprom_env(void) { } 427212f96f6SKipisz, Steven 428212f96f6SKipisz, Steven /* Override function to read eeprom information */ 429212f96f6SKipisz, Steven void do_board_detect(void) 430212f96f6SKipisz, Steven { 431212f96f6SKipisz, Steven int rc; 432212f96f6SKipisz, Steven 433212f96f6SKipisz, Steven rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, 434212f96f6SKipisz, Steven CONFIG_EEPROM_CHIP_ADDRESS); 435212f96f6SKipisz, Steven if (rc) 436212f96f6SKipisz, Steven printf("ti_i2c_eeprom_init failed %d\n", rc); 437212f96f6SKipisz, Steven } 438212f96f6SKipisz, Steven 439212f96f6SKipisz, Steven #else /* CONFIG_SPL_BUILD */ 440212f96f6SKipisz, Steven 441212f96f6SKipisz, Steven /* Override function to read eeprom information: actual i2c read done by SPL*/ 442212f96f6SKipisz, Steven void do_board_detect(void) 443212f96f6SKipisz, Steven { 444212f96f6SKipisz, Steven char *bname = NULL; 445212f96f6SKipisz, Steven int rc; 446212f96f6SKipisz, Steven 447212f96f6SKipisz, Steven rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, 448212f96f6SKipisz, Steven CONFIG_EEPROM_CHIP_ADDRESS); 449212f96f6SKipisz, Steven if (rc) 450212f96f6SKipisz, Steven printf("ti_i2c_eeprom_init failed %d\n", rc); 451212f96f6SKipisz, Steven 452212f96f6SKipisz, Steven if (board_is_x15()) 453212f96f6SKipisz, Steven bname = "BeagleBoard X15"; 454212f96f6SKipisz, Steven else if (board_is_am572x_evm()) 455212f96f6SKipisz, Steven bname = "AM572x EVM"; 456c020d355SSteve Kipisz else if (board_is_am572x_idk()) 457c020d355SSteve Kipisz bname = "AM572x IDK"; 4584d8397c6SSteve Kipisz else if (board_is_am571x_idk()) 4594d8397c6SSteve Kipisz bname = "AM571x IDK"; 460212f96f6SKipisz, Steven 461212f96f6SKipisz, Steven if (bname) 462212f96f6SKipisz, Steven snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN, 463212f96f6SKipisz, Steven "Board: %s REV %s\n", bname, board_ti_get_rev()); 464212f96f6SKipisz, Steven } 465212f96f6SKipisz, Steven 466212f96f6SKipisz, Steven static void setup_board_eeprom_env(void) 467212f96f6SKipisz, Steven { 468212f96f6SKipisz, Steven char *name = "beagle_x15"; 469212f96f6SKipisz, Steven int rc; 470212f96f6SKipisz, Steven 471212f96f6SKipisz, Steven rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, 472212f96f6SKipisz, Steven CONFIG_EEPROM_CHIP_ADDRESS); 473212f96f6SKipisz, Steven if (rc) 474212f96f6SKipisz, Steven goto invalid_eeprom; 475212f96f6SKipisz, Steven 476bf43ce6cSNishanth Menon if (board_is_x15()) { 477f7f9f6beSLokesh Vutla if (board_is_x15_revb1()) 478f7f9f6beSLokesh Vutla name = "beagle_x15_revb1"; 479*f70a4272SLokesh Vutla else if (board_is_x15_revc()) 480*f70a4272SLokesh Vutla name = "beagle_x15_revc"; 481f7f9f6beSLokesh Vutla else 482c9891660SNishanth Menon name = "beagle_x15"; 483bf43ce6cSNishanth Menon } else if (board_is_am572x_evm()) { 484bf43ce6cSNishanth Menon if (board_is_am572x_evm_reva3()) 485bf43ce6cSNishanth Menon name = "am57xx_evm_reva3"; 486212f96f6SKipisz, Steven else 487bf43ce6cSNishanth Menon name = "am57xx_evm"; 488bf43ce6cSNishanth Menon } else if (board_is_am572x_idk()) { 489bf43ce6cSNishanth Menon name = "am572x_idk"; 4904d8397c6SSteve Kipisz } else if (board_is_am571x_idk()) { 4914d8397c6SSteve Kipisz name = "am571x_idk"; 492bf43ce6cSNishanth Menon } else { 493212f96f6SKipisz, Steven printf("Unidentified board claims %s in eeprom header\n", 494212f96f6SKipisz, Steven board_ti_get_name()); 495bf43ce6cSNishanth Menon } 496212f96f6SKipisz, Steven 497212f96f6SKipisz, Steven invalid_eeprom: 498212f96f6SKipisz, Steven set_board_info_env(name); 499212f96f6SKipisz, Steven } 500212f96f6SKipisz, Steven 501212f96f6SKipisz, Steven #endif /* CONFIG_SPL_BUILD */ 502212f96f6SKipisz, Steven 503d60198daSKeerthy void vcores_init(void) 504d60198daSKeerthy { 505d60198daSKeerthy if (board_is_am572x_idk()) 506d60198daSKeerthy *omap_vcores = &am572x_idk_volts; 507b12550ebSKeerthy else if (board_is_am571x_idk()) 508b12550ebSKeerthy *omap_vcores = &am571x_idk_volts; 509d60198daSKeerthy else 510d60198daSKeerthy *omap_vcores = &beagle_x15_volts; 511d60198daSKeerthy } 512d60198daSKeerthy 51374cc8b09SKipisz, Steven void hw_data_init(void) 51474cc8b09SKipisz, Steven { 51574cc8b09SKipisz, Steven *prcm = &dra7xx_prcm; 51674cc8b09SKipisz, Steven *dplls_data = &dra7xx_dplls; 51774cc8b09SKipisz, Steven *ctrl = &dra7xx_ctrl; 51874cc8b09SKipisz, Steven } 51974cc8b09SKipisz, Steven 52037611052SRoger Quadros bool am571x_idk_needs_lcd(void) 52137611052SRoger Quadros { 52237611052SRoger Quadros bool needs_lcd; 52337611052SRoger Quadros 52437611052SRoger Quadros gpio_request(GPIO_ETH_LCD, "nLCD_Detect"); 52537611052SRoger Quadros if (gpio_get_value(GPIO_ETH_LCD)) 52637611052SRoger Quadros needs_lcd = false; 52737611052SRoger Quadros else 52837611052SRoger Quadros needs_lcd = true; 52937611052SRoger Quadros 53037611052SRoger Quadros gpio_free(GPIO_ETH_LCD); 53137611052SRoger Quadros 53237611052SRoger Quadros return needs_lcd; 53337611052SRoger Quadros } 53437611052SRoger Quadros 53574cc8b09SKipisz, Steven int board_init(void) 53674cc8b09SKipisz, Steven { 53774cc8b09SKipisz, Steven gpmc_init(); 53874cc8b09SKipisz, Steven gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100); 53974cc8b09SKipisz, Steven 54074cc8b09SKipisz, Steven return 0; 54174cc8b09SKipisz, Steven } 54274cc8b09SKipisz, Steven 543fcb18524SNishanth Menon void am57x_idk_lcd_detect(void) 544fcb18524SNishanth Menon { 545fcb18524SNishanth Menon int r = -ENODEV; 546fcb18524SNishanth Menon char *idk_lcd = "no"; 547fcb18524SNishanth Menon uint8_t buf = 0; 548fcb18524SNishanth Menon 549fcb18524SNishanth Menon /* Only valid for IDKs */ 550fcb18524SNishanth Menon if (board_is_x15() || board_is_am572x_evm()) 551fcb18524SNishanth Menon return; 552fcb18524SNishanth Menon 553fcb18524SNishanth Menon /* Only AM571x IDK has gpio control detect.. so check that */ 554fcb18524SNishanth Menon if (board_is_am571x_idk() && !am571x_idk_needs_lcd()) 555fcb18524SNishanth Menon goto out; 556fcb18524SNishanth Menon 557fcb18524SNishanth Menon r = i2c_set_bus_num(OSD_TS_FT_BUS_ADDRESS); 558fcb18524SNishanth Menon if (r) { 559fcb18524SNishanth Menon printf("%s: Failed to set bus address to %d: %d\n", 560fcb18524SNishanth Menon __func__, OSD_TS_FT_BUS_ADDRESS, r); 561fcb18524SNishanth Menon goto out; 562fcb18524SNishanth Menon } 563fcb18524SNishanth Menon r = i2c_probe(OSD_TS_FT_CHIP_ADDRESS); 564fcb18524SNishanth Menon if (r) { 565fcb18524SNishanth Menon /* AM572x IDK has no explicit settings for optional LCD kit */ 566fcb18524SNishanth Menon if (board_is_am571x_idk()) { 567fcb18524SNishanth Menon printf("%s: Touch screen detect failed: %d!\n", 568fcb18524SNishanth Menon __func__, r); 569fcb18524SNishanth Menon } 570fcb18524SNishanth Menon goto out; 571fcb18524SNishanth Menon } 572fcb18524SNishanth Menon 573fcb18524SNishanth Menon /* Read FT ID */ 574fcb18524SNishanth Menon r = i2c_read(OSD_TS_FT_CHIP_ADDRESS, OSD_TS_FT_REG_ID, 1, &buf, 1); 575fcb18524SNishanth Menon if (r) { 576fcb18524SNishanth Menon printf("%s: Touch screen ID read %d:0x%02x[0x%02x] failed:%d\n", 577fcb18524SNishanth Menon __func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS, 578fcb18524SNishanth Menon OSD_TS_FT_REG_ID, r); 579fcb18524SNishanth Menon goto out; 580fcb18524SNishanth Menon } 581fcb18524SNishanth Menon 582fcb18524SNishanth Menon switch (buf) { 583fcb18524SNishanth Menon case OSD_TS_FT_ID_5606: 584fcb18524SNishanth Menon idk_lcd = "osd101t2045"; 585fcb18524SNishanth Menon break; 586fcb18524SNishanth Menon case OSD_TS_FT_ID_5x46: 587fcb18524SNishanth Menon idk_lcd = "osd101t2587"; 588fcb18524SNishanth Menon break; 589fcb18524SNishanth Menon default: 590fcb18524SNishanth Menon printf("%s: Unidentifed Touch screen ID 0x%02x\n", 591fcb18524SNishanth Menon __func__, buf); 592fcb18524SNishanth Menon /* we will let default be "no lcd" */ 593fcb18524SNishanth Menon } 594fcb18524SNishanth Menon out: 595fcb18524SNishanth Menon setenv("idk_lcd", idk_lcd); 596fcb18524SNishanth Menon return; 597fcb18524SNishanth Menon } 598fcb18524SNishanth Menon 59974cc8b09SKipisz, Steven int board_late_init(void) 60074cc8b09SKipisz, Steven { 601212f96f6SKipisz, Steven setup_board_eeprom_env(); 602385d3632SKeerthy u8 val; 603212f96f6SKipisz, Steven 60474cc8b09SKipisz, Steven /* 60574cc8b09SKipisz, Steven * DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds 60674cc8b09SKipisz, Steven * This is the POWERHOLD-in-Low behavior. 60774cc8b09SKipisz, Steven */ 60874cc8b09SKipisz, Steven palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1); 60982cca5a6SLokesh Vutla 61082cca5a6SLokesh Vutla /* 61182cca5a6SLokesh Vutla * Default FIT boot on HS devices. Non FIT images are not allowed 61282cca5a6SLokesh Vutla * on HS devices. 61382cca5a6SLokesh Vutla */ 61482cca5a6SLokesh Vutla if (get_device_type() == HS_DEVICE) 61582cca5a6SLokesh Vutla setenv("boot_fit", "1"); 61682cca5a6SLokesh Vutla 617385d3632SKeerthy /* 618385d3632SKeerthy * Set the GPIO7 Pad to POWERHOLD. This has higher priority 619385d3632SKeerthy * over DEV_CTRL.DEV_ON bit. This can be reset in case of 620385d3632SKeerthy * PMIC Power off. So to be on the safer side set it back 621385d3632SKeerthy * to POWERHOLD mode irrespective of the current state. 622385d3632SKeerthy */ 623385d3632SKeerthy palmas_i2c_read_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2, 624385d3632SKeerthy &val); 625385d3632SKeerthy val = val | TPS65903X_PAD2_POWERHOLD_MASK; 626385d3632SKeerthy palmas_i2c_write_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2, 627385d3632SKeerthy val); 628385d3632SKeerthy 6297a2af751SSemen Protsenko omap_die_id_serial(); 6308bd29623SSemen Protsenko omap_set_fastboot_vars(); 6317a2af751SSemen Protsenko 632fcb18524SNishanth Menon am57x_idk_lcd_detect(); 63337611052SRoger Quadros 63437611052SRoger Quadros #if !defined(CONFIG_SPL_BUILD) 63537611052SRoger Quadros board_ti_set_ethaddr(2); 63637611052SRoger Quadros #endif 63737611052SRoger Quadros 63874cc8b09SKipisz, Steven return 0; 63974cc8b09SKipisz, Steven } 64074cc8b09SKipisz, Steven 6413ef56e61SPaul Kocialkowski void set_muxconf_regs(void) 64274cc8b09SKipisz, Steven { 64374cc8b09SKipisz, Steven do_set_mux32((*ctrl)->control_padconf_core_base, 64474cc8b09SKipisz, Steven early_padconf, ARRAY_SIZE(early_padconf)); 64574cc8b09SKipisz, Steven } 64674cc8b09SKipisz, Steven 64774cc8b09SKipisz, Steven #ifdef CONFIG_IODELAY_RECALIBRATION 64874cc8b09SKipisz, Steven void recalibrate_iodelay(void) 64974cc8b09SKipisz, Steven { 650c020d355SSteve Kipisz const struct pad_conf_entry *pconf; 6512d7e9e9dSLokesh Vutla const struct iodelay_cfg_entry *iod, *delta_iod; 6522d7e9e9dSLokesh Vutla int pconf_sz, iod_sz, delta_iod_sz = 0; 65389a38953SNishanth Menon int ret; 654c020d355SSteve Kipisz 655c020d355SSteve Kipisz if (board_is_am572x_idk()) { 656c020d355SSteve Kipisz pconf = core_padconf_array_essential_am572x_idk; 657c020d355SSteve Kipisz pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am572x_idk); 658c020d355SSteve Kipisz iod = iodelay_cfg_array_am572x_idk; 659c020d355SSteve Kipisz iod_sz = ARRAY_SIZE(iodelay_cfg_array_am572x_idk); 6604d8397c6SSteve Kipisz } else if (board_is_am571x_idk()) { 6614d8397c6SSteve Kipisz pconf = core_padconf_array_essential_am571x_idk; 6624d8397c6SSteve Kipisz pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am571x_idk); 6634d8397c6SSteve Kipisz iod = iodelay_cfg_array_am571x_idk; 6644d8397c6SSteve Kipisz iod_sz = ARRAY_SIZE(iodelay_cfg_array_am571x_idk); 665c020d355SSteve Kipisz } else { 666c020d355SSteve Kipisz /* Common for X15/GPEVM */ 667c020d355SSteve Kipisz pconf = core_padconf_array_essential_x15; 668c020d355SSteve Kipisz pconf_sz = ARRAY_SIZE(core_padconf_array_essential_x15); 66989a38953SNishanth Menon /* There never was an SR1.0 X15.. So.. */ 67089a38953SNishanth Menon if (omap_revision() == DRA752_ES1_1) { 67189a38953SNishanth Menon iod = iodelay_cfg_array_x15_sr1_1; 67289a38953SNishanth Menon iod_sz = ARRAY_SIZE(iodelay_cfg_array_x15_sr1_1); 67389a38953SNishanth Menon } else { 67489a38953SNishanth Menon /* Since full production should switch to SR2.0 */ 67589a38953SNishanth Menon iod = iodelay_cfg_array_x15_sr2_0; 67689a38953SNishanth Menon iod_sz = ARRAY_SIZE(iodelay_cfg_array_x15_sr2_0); 67789a38953SNishanth Menon } 678c020d355SSteve Kipisz } 679c020d355SSteve Kipisz 68089a38953SNishanth Menon /* Setup I/O isolation */ 68189a38953SNishanth Menon ret = __recalibrate_iodelay_start(); 68289a38953SNishanth Menon if (ret) 68389a38953SNishanth Menon goto err; 68489a38953SNishanth Menon 68589a38953SNishanth Menon /* Do the muxing here */ 68689a38953SNishanth Menon do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); 68789a38953SNishanth Menon 68889a38953SNishanth Menon /* Now do the weird minor deltas that should be safe */ 68989a38953SNishanth Menon if (board_is_x15() || board_is_am572x_evm()) { 690*f70a4272SLokesh Vutla if (board_is_x15_revb1() || board_is_am572x_evm_reva3() || 691*f70a4272SLokesh Vutla board_is_x15_revc()) { 69289a38953SNishanth Menon pconf = core_padconf_array_delta_x15_sr2_0; 69389a38953SNishanth Menon pconf_sz = ARRAY_SIZE(core_padconf_array_delta_x15_sr2_0); 69489a38953SNishanth Menon } else { 69589a38953SNishanth Menon pconf = core_padconf_array_delta_x15_sr1_1; 69689a38953SNishanth Menon pconf_sz = ARRAY_SIZE(core_padconf_array_delta_x15_sr1_1); 69789a38953SNishanth Menon } 69889a38953SNishanth Menon do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); 69989a38953SNishanth Menon } 70089a38953SNishanth Menon 70137611052SRoger Quadros if (board_is_am571x_idk()) { 70237611052SRoger Quadros if (am571x_idk_needs_lcd()) { 70337611052SRoger Quadros pconf = core_padconf_array_vout_am571x_idk; 70437611052SRoger Quadros pconf_sz = ARRAY_SIZE(core_padconf_array_vout_am571x_idk); 7052d7e9e9dSLokesh Vutla delta_iod = iodelay_cfg_array_am571x_idk_4port; 7062d7e9e9dSLokesh Vutla delta_iod_sz = ARRAY_SIZE(iodelay_cfg_array_am571x_idk_4port); 7072d7e9e9dSLokesh Vutla 70837611052SRoger Quadros } else { 70937611052SRoger Quadros pconf = core_padconf_array_icss1eth_am571x_idk; 71037611052SRoger Quadros pconf_sz = ARRAY_SIZE(core_padconf_array_icss1eth_am571x_idk); 71137611052SRoger Quadros } 71237611052SRoger Quadros do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); 71337611052SRoger Quadros } 71437611052SRoger Quadros 71589a38953SNishanth Menon /* Setup IOdelay configuration */ 71689a38953SNishanth Menon ret = do_set_iodelay((*ctrl)->iodelay_config_base, iod, iod_sz); 7172d7e9e9dSLokesh Vutla if (delta_iod_sz) 7182d7e9e9dSLokesh Vutla ret = do_set_iodelay((*ctrl)->iodelay_config_base, delta_iod, 7192d7e9e9dSLokesh Vutla delta_iod_sz); 7202d7e9e9dSLokesh Vutla 72189a38953SNishanth Menon err: 72289a38953SNishanth Menon /* Closeup.. remove isolation */ 72389a38953SNishanth Menon __recalibrate_iodelay_end(ret); 72474cc8b09SKipisz, Steven } 72574cc8b09SKipisz, Steven #endif 72674cc8b09SKipisz, Steven 7274aa2ba3aSMasahiro Yamada #if defined(CONFIG_MMC) 72874cc8b09SKipisz, Steven int board_mmc_init(bd_t *bis) 72974cc8b09SKipisz, Steven { 73074cc8b09SKipisz, Steven omap_mmc_init(0, 0, 0, -1, -1); 73174cc8b09SKipisz, Steven omap_mmc_init(1, 0, 0, -1, -1); 73274cc8b09SKipisz, Steven return 0; 73374cc8b09SKipisz, Steven } 73474cc8b09SKipisz, Steven #endif 73574cc8b09SKipisz, Steven 73674cc8b09SKipisz, Steven #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT) 73774cc8b09SKipisz, Steven int spl_start_uboot(void) 73874cc8b09SKipisz, Steven { 73974cc8b09SKipisz, Steven /* break into full u-boot on 'c' */ 74074cc8b09SKipisz, Steven if (serial_tstc() && serial_getc() == 'c') 74174cc8b09SKipisz, Steven return 1; 74274cc8b09SKipisz, Steven 74374cc8b09SKipisz, Steven #ifdef CONFIG_SPL_ENV_SUPPORT 74474cc8b09SKipisz, Steven env_init(); 74574cc8b09SKipisz, Steven env_relocate_spec(); 74674cc8b09SKipisz, Steven if (getenv_yesno("boot_os") != 1) 74774cc8b09SKipisz, Steven return 1; 74874cc8b09SKipisz, Steven #endif 74974cc8b09SKipisz, Steven 75074cc8b09SKipisz, Steven return 0; 75174cc8b09SKipisz, Steven } 75274cc8b09SKipisz, Steven #endif 75374cc8b09SKipisz, Steven 75474cc8b09SKipisz, Steven #ifdef CONFIG_USB_DWC3 75574cc8b09SKipisz, Steven static struct dwc3_device usb_otg_ss2 = { 75674cc8b09SKipisz, Steven .maximum_speed = USB_SPEED_HIGH, 75774cc8b09SKipisz, Steven .base = DRA7_USB_OTG_SS2_BASE, 75874cc8b09SKipisz, Steven .tx_fifo_resize = false, 75974cc8b09SKipisz, Steven .index = 1, 76074cc8b09SKipisz, Steven }; 76174cc8b09SKipisz, Steven 76274cc8b09SKipisz, Steven static struct dwc3_omap_device usb_otg_ss2_glue = { 76374cc8b09SKipisz, Steven .base = (void *)DRA7_USB_OTG_SS2_GLUE_BASE, 76474cc8b09SKipisz, Steven .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, 76574cc8b09SKipisz, Steven .index = 1, 76674cc8b09SKipisz, Steven }; 76774cc8b09SKipisz, Steven 76874cc8b09SKipisz, Steven static struct ti_usb_phy_device usb_phy2_device = { 76974cc8b09SKipisz, Steven .usb2_phy_power = (void *)DRA7_USB2_PHY2_POWER, 77074cc8b09SKipisz, Steven .index = 1, 77174cc8b09SKipisz, Steven }; 77274cc8b09SKipisz, Steven 77374cc8b09SKipisz, Steven int usb_gadget_handle_interrupts(int index) 77474cc8b09SKipisz, Steven { 77574cc8b09SKipisz, Steven u32 status; 77674cc8b09SKipisz, Steven 77774cc8b09SKipisz, Steven status = dwc3_omap_uboot_interrupt_status(index); 77874cc8b09SKipisz, Steven if (status) 77974cc8b09SKipisz, Steven dwc3_uboot_handle_interrupt(index); 78074cc8b09SKipisz, Steven 78174cc8b09SKipisz, Steven return 0; 78274cc8b09SKipisz, Steven } 78355efaddeSRoger Quadros #endif /* CONFIG_USB_DWC3 */ 78455efaddeSRoger Quadros 78555efaddeSRoger Quadros #if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) 7861a9a5f7aSUri Mashiach int omap_xhci_board_usb_init(int index, enum usb_init_type init) 78755efaddeSRoger Quadros { 78855efaddeSRoger Quadros enable_usb_clocks(index); 78955efaddeSRoger Quadros switch (index) { 79055efaddeSRoger Quadros case 0: 79155efaddeSRoger Quadros if (init == USB_INIT_DEVICE) { 79255efaddeSRoger Quadros printf("port %d can't be used as device\n", index); 79355efaddeSRoger Quadros disable_usb_clocks(index); 79455efaddeSRoger Quadros return -EINVAL; 79555efaddeSRoger Quadros } 79655efaddeSRoger Quadros break; 79755efaddeSRoger Quadros case 1: 79855efaddeSRoger Quadros if (init == USB_INIT_DEVICE) { 79955efaddeSRoger Quadros #ifdef CONFIG_USB_DWC3 80055efaddeSRoger Quadros usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL; 80155efaddeSRoger Quadros usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; 80255efaddeSRoger Quadros ti_usb_phy_uboot_init(&usb_phy2_device); 80355efaddeSRoger Quadros dwc3_omap_uboot_init(&usb_otg_ss2_glue); 80455efaddeSRoger Quadros dwc3_uboot_init(&usb_otg_ss2); 80574cc8b09SKipisz, Steven #endif 80655efaddeSRoger Quadros } else { 80755efaddeSRoger Quadros printf("port %d can't be used as host\n", index); 80855efaddeSRoger Quadros disable_usb_clocks(index); 80955efaddeSRoger Quadros return -EINVAL; 81055efaddeSRoger Quadros } 81155efaddeSRoger Quadros 81255efaddeSRoger Quadros break; 81355efaddeSRoger Quadros default: 81455efaddeSRoger Quadros printf("Invalid Controller Index\n"); 81555efaddeSRoger Quadros } 81655efaddeSRoger Quadros 81755efaddeSRoger Quadros return 0; 81855efaddeSRoger Quadros } 81955efaddeSRoger Quadros 8201a9a5f7aSUri Mashiach int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init) 82155efaddeSRoger Quadros { 82255efaddeSRoger Quadros #ifdef CONFIG_USB_DWC3 82355efaddeSRoger Quadros switch (index) { 82455efaddeSRoger Quadros case 0: 82555efaddeSRoger Quadros case 1: 82655efaddeSRoger Quadros if (init == USB_INIT_DEVICE) { 82755efaddeSRoger Quadros ti_usb_phy_uboot_exit(index); 82855efaddeSRoger Quadros dwc3_uboot_exit(index); 82955efaddeSRoger Quadros dwc3_omap_uboot_exit(index); 83055efaddeSRoger Quadros } 83155efaddeSRoger Quadros break; 83255efaddeSRoger Quadros default: 83355efaddeSRoger Quadros printf("Invalid Controller Index\n"); 83455efaddeSRoger Quadros } 83555efaddeSRoger Quadros #endif 83655efaddeSRoger Quadros disable_usb_clocks(index); 83755efaddeSRoger Quadros return 0; 83855efaddeSRoger Quadros } 83955efaddeSRoger Quadros #endif /* defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) */ 84074cc8b09SKipisz, Steven 84174cc8b09SKipisz, Steven #ifdef CONFIG_DRIVER_TI_CPSW 84274cc8b09SKipisz, Steven 84374cc8b09SKipisz, Steven /* Delay value to add to calibrated value */ 84474cc8b09SKipisz, Steven #define RGMII0_TXCTL_DLY_VAL ((0x3 << 5) + 0x8) 84574cc8b09SKipisz, Steven #define RGMII0_TXD0_DLY_VAL ((0x3 << 5) + 0x8) 84674cc8b09SKipisz, Steven #define RGMII0_TXD1_DLY_VAL ((0x3 << 5) + 0x2) 84774cc8b09SKipisz, Steven #define RGMII0_TXD2_DLY_VAL ((0x4 << 5) + 0x0) 84874cc8b09SKipisz, Steven #define RGMII0_TXD3_DLY_VAL ((0x4 << 5) + 0x0) 84974cc8b09SKipisz, Steven #define VIN2A_D13_DLY_VAL ((0x3 << 5) + 0x8) 85074cc8b09SKipisz, Steven #define VIN2A_D17_DLY_VAL ((0x3 << 5) + 0x8) 85174cc8b09SKipisz, Steven #define VIN2A_D16_DLY_VAL ((0x3 << 5) + 0x2) 85274cc8b09SKipisz, Steven #define VIN2A_D15_DLY_VAL ((0x4 << 5) + 0x0) 85374cc8b09SKipisz, Steven #define VIN2A_D14_DLY_VAL ((0x4 << 5) + 0x0) 85474cc8b09SKipisz, Steven 85574cc8b09SKipisz, Steven static void cpsw_control(int enabled) 85674cc8b09SKipisz, Steven { 85774cc8b09SKipisz, Steven /* VTP can be added here */ 85874cc8b09SKipisz, Steven } 85974cc8b09SKipisz, Steven 86074cc8b09SKipisz, Steven static struct cpsw_slave_data cpsw_slaves[] = { 86174cc8b09SKipisz, Steven { 86274cc8b09SKipisz, Steven .slave_reg_ofs = 0x208, 86374cc8b09SKipisz, Steven .sliver_reg_ofs = 0xd80, 86474cc8b09SKipisz, Steven .phy_addr = 1, 86574cc8b09SKipisz, Steven }, 86674cc8b09SKipisz, Steven { 86774cc8b09SKipisz, Steven .slave_reg_ofs = 0x308, 86874cc8b09SKipisz, Steven .sliver_reg_ofs = 0xdc0, 86974cc8b09SKipisz, Steven .phy_addr = 2, 87074cc8b09SKipisz, Steven }, 87174cc8b09SKipisz, Steven }; 87274cc8b09SKipisz, Steven 87374cc8b09SKipisz, Steven static struct cpsw_platform_data cpsw_data = { 87474cc8b09SKipisz, Steven .mdio_base = CPSW_MDIO_BASE, 87574cc8b09SKipisz, Steven .cpsw_base = CPSW_BASE, 87674cc8b09SKipisz, Steven .mdio_div = 0xff, 87774cc8b09SKipisz, Steven .channels = 8, 87874cc8b09SKipisz, Steven .cpdma_reg_ofs = 0x800, 87974cc8b09SKipisz, Steven .slaves = 1, 88074cc8b09SKipisz, Steven .slave_data = cpsw_slaves, 88174cc8b09SKipisz, Steven .ale_reg_ofs = 0xd00, 88274cc8b09SKipisz, Steven .ale_entries = 1024, 88374cc8b09SKipisz, Steven .host_port_reg_ofs = 0x108, 88474cc8b09SKipisz, Steven .hw_stats_reg_ofs = 0x900, 88574cc8b09SKipisz, Steven .bd_ram_ofs = 0x2000, 88674cc8b09SKipisz, Steven .mac_control = (1 << 5), 88774cc8b09SKipisz, Steven .control = cpsw_control, 88874cc8b09SKipisz, Steven .host_port_num = 0, 88974cc8b09SKipisz, Steven .version = CPSW_CTRL_VERSION_2, 89074cc8b09SKipisz, Steven }; 89174cc8b09SKipisz, Steven 89292667e89SRoger Quadros static u64 mac_to_u64(u8 mac[6]) 89392667e89SRoger Quadros { 89492667e89SRoger Quadros int i; 89592667e89SRoger Quadros u64 addr = 0; 89692667e89SRoger Quadros 89792667e89SRoger Quadros for (i = 0; i < 6; i++) { 89892667e89SRoger Quadros addr <<= 8; 89992667e89SRoger Quadros addr |= mac[i]; 90092667e89SRoger Quadros } 90192667e89SRoger Quadros 90292667e89SRoger Quadros return addr; 90392667e89SRoger Quadros } 90492667e89SRoger Quadros 90592667e89SRoger Quadros static void u64_to_mac(u64 addr, u8 mac[6]) 90692667e89SRoger Quadros { 90792667e89SRoger Quadros mac[5] = addr; 90892667e89SRoger Quadros mac[4] = addr >> 8; 90992667e89SRoger Quadros mac[3] = addr >> 16; 91092667e89SRoger Quadros mac[2] = addr >> 24; 91192667e89SRoger Quadros mac[1] = addr >> 32; 91292667e89SRoger Quadros mac[0] = addr >> 40; 91392667e89SRoger Quadros } 91492667e89SRoger Quadros 91574cc8b09SKipisz, Steven int board_eth_init(bd_t *bis) 91674cc8b09SKipisz, Steven { 91774cc8b09SKipisz, Steven int ret; 91874cc8b09SKipisz, Steven uint8_t mac_addr[6]; 91974cc8b09SKipisz, Steven uint32_t mac_hi, mac_lo; 92074cc8b09SKipisz, Steven uint32_t ctrl_val; 92192667e89SRoger Quadros int i; 92292667e89SRoger Quadros u64 mac1, mac2; 92392667e89SRoger Quadros u8 mac_addr1[6], mac_addr2[6]; 92492667e89SRoger Quadros int num_macs; 92574cc8b09SKipisz, Steven 92674cc8b09SKipisz, Steven /* try reading mac address from efuse */ 92774cc8b09SKipisz, Steven mac_lo = readl((*ctrl)->control_core_mac_id_0_lo); 92874cc8b09SKipisz, Steven mac_hi = readl((*ctrl)->control_core_mac_id_0_hi); 92974cc8b09SKipisz, Steven mac_addr[0] = (mac_hi & 0xFF0000) >> 16; 93074cc8b09SKipisz, Steven mac_addr[1] = (mac_hi & 0xFF00) >> 8; 93174cc8b09SKipisz, Steven mac_addr[2] = mac_hi & 0xFF; 93274cc8b09SKipisz, Steven mac_addr[3] = (mac_lo & 0xFF0000) >> 16; 93374cc8b09SKipisz, Steven mac_addr[4] = (mac_lo & 0xFF00) >> 8; 93474cc8b09SKipisz, Steven mac_addr[5] = mac_lo & 0xFF; 93574cc8b09SKipisz, Steven 93674cc8b09SKipisz, Steven if (!getenv("ethaddr")) { 93774cc8b09SKipisz, Steven printf("<ethaddr> not set. Validating first E-fuse MAC\n"); 93874cc8b09SKipisz, Steven 93974cc8b09SKipisz, Steven if (is_valid_ethaddr(mac_addr)) 94074cc8b09SKipisz, Steven eth_setenv_enetaddr("ethaddr", mac_addr); 94174cc8b09SKipisz, Steven } 94274cc8b09SKipisz, Steven 94374cc8b09SKipisz, Steven mac_lo = readl((*ctrl)->control_core_mac_id_1_lo); 94474cc8b09SKipisz, Steven mac_hi = readl((*ctrl)->control_core_mac_id_1_hi); 94574cc8b09SKipisz, Steven mac_addr[0] = (mac_hi & 0xFF0000) >> 16; 94674cc8b09SKipisz, Steven mac_addr[1] = (mac_hi & 0xFF00) >> 8; 94774cc8b09SKipisz, Steven mac_addr[2] = mac_hi & 0xFF; 94874cc8b09SKipisz, Steven mac_addr[3] = (mac_lo & 0xFF0000) >> 16; 94974cc8b09SKipisz, Steven mac_addr[4] = (mac_lo & 0xFF00) >> 8; 95074cc8b09SKipisz, Steven mac_addr[5] = mac_lo & 0xFF; 95174cc8b09SKipisz, Steven 95274cc8b09SKipisz, Steven if (!getenv("eth1addr")) { 95374cc8b09SKipisz, Steven if (is_valid_ethaddr(mac_addr)) 95474cc8b09SKipisz, Steven eth_setenv_enetaddr("eth1addr", mac_addr); 95574cc8b09SKipisz, Steven } 95674cc8b09SKipisz, Steven 95774cc8b09SKipisz, Steven ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33); 95874cc8b09SKipisz, Steven ctrl_val |= 0x22; 95974cc8b09SKipisz, Steven writel(ctrl_val, (*ctrl)->control_core_control_io1); 96074cc8b09SKipisz, Steven 9614d8397c6SSteve Kipisz /* The phy address for the AM57xx IDK are different than x15 */ 9624d8397c6SSteve Kipisz if (board_is_am572x_idk() || board_is_am571x_idk()) { 963c020d355SSteve Kipisz cpsw_data.slave_data[0].phy_addr = 0; 964c020d355SSteve Kipisz cpsw_data.slave_data[1].phy_addr = 1; 965c020d355SSteve Kipisz } 966c020d355SSteve Kipisz 96774cc8b09SKipisz, Steven ret = cpsw_register(&cpsw_data); 96874cc8b09SKipisz, Steven if (ret < 0) 96974cc8b09SKipisz, Steven printf("Error %d registering CPSW switch\n", ret); 97074cc8b09SKipisz, Steven 97192667e89SRoger Quadros /* 97292667e89SRoger Quadros * Export any Ethernet MAC addresses from EEPROM. 97392667e89SRoger Quadros * On AM57xx the 2 MAC addresses define the address range 97492667e89SRoger Quadros */ 97592667e89SRoger Quadros board_ti_get_eth_mac_addr(0, mac_addr1); 97692667e89SRoger Quadros board_ti_get_eth_mac_addr(1, mac_addr2); 97792667e89SRoger Quadros 97892667e89SRoger Quadros if (is_valid_ethaddr(mac_addr1) && is_valid_ethaddr(mac_addr2)) { 97992667e89SRoger Quadros mac1 = mac_to_u64(mac_addr1); 98092667e89SRoger Quadros mac2 = mac_to_u64(mac_addr2); 98192667e89SRoger Quadros 98292667e89SRoger Quadros /* must contain an address range */ 98392667e89SRoger Quadros num_macs = mac2 - mac1 + 1; 98492667e89SRoger Quadros /* <= 50 to protect against user programming error */ 98592667e89SRoger Quadros if (num_macs > 0 && num_macs <= 50) { 98692667e89SRoger Quadros for (i = 0; i < num_macs; i++) { 98792667e89SRoger Quadros u64_to_mac(mac1 + i, mac_addr); 98892667e89SRoger Quadros if (is_valid_ethaddr(mac_addr)) { 98992667e89SRoger Quadros eth_setenv_enetaddr_by_index("eth", 99092667e89SRoger Quadros i + 2, 99192667e89SRoger Quadros mac_addr); 99292667e89SRoger Quadros } 99392667e89SRoger Quadros } 99492667e89SRoger Quadros } 99592667e89SRoger Quadros } 99692667e89SRoger Quadros 99774cc8b09SKipisz, Steven return ret; 99874cc8b09SKipisz, Steven } 99974cc8b09SKipisz, Steven #endif 100074cc8b09SKipisz, Steven 100174cc8b09SKipisz, Steven #ifdef CONFIG_BOARD_EARLY_INIT_F 100274cc8b09SKipisz, Steven /* VTT regulator enable */ 100374cc8b09SKipisz, Steven static inline void vtt_regulator_enable(void) 100474cc8b09SKipisz, Steven { 100574cc8b09SKipisz, Steven if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL) 100674cc8b09SKipisz, Steven return; 100774cc8b09SKipisz, Steven 100874cc8b09SKipisz, Steven gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en"); 100974cc8b09SKipisz, Steven gpio_direction_output(GPIO_DDR_VTT_EN, 1); 101074cc8b09SKipisz, Steven } 101174cc8b09SKipisz, Steven 101274cc8b09SKipisz, Steven int board_early_init_f(void) 101374cc8b09SKipisz, Steven { 101474cc8b09SKipisz, Steven vtt_regulator_enable(); 101574cc8b09SKipisz, Steven return 0; 101674cc8b09SKipisz, Steven } 101774cc8b09SKipisz, Steven #endif 101862a09f05SDaniel Allred 101962a09f05SDaniel Allred #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) 102062a09f05SDaniel Allred int ft_board_setup(void *blob, bd_t *bd) 102162a09f05SDaniel Allred { 102262a09f05SDaniel Allred ft_cpu_setup(blob, bd); 102362a09f05SDaniel Allred 102462a09f05SDaniel Allred return 0; 102562a09f05SDaniel Allred } 102662a09f05SDaniel Allred #endif 10277a0ea589SLokesh Vutla 10287a0ea589SLokesh Vutla #ifdef CONFIG_SPL_LOAD_FIT 10297a0ea589SLokesh Vutla int board_fit_config_name_match(const char *name) 10307a0ea589SLokesh Vutla { 1031f7f9f6beSLokesh Vutla if (board_is_x15()) { 1032f7f9f6beSLokesh Vutla if (board_is_x15_revb1()) { 1033f7f9f6beSLokesh Vutla if (!strcmp(name, "am57xx-beagle-x15-revb1")) 10347a0ea589SLokesh Vutla return 0; 1035f7f9f6beSLokesh Vutla } else if (!strcmp(name, "am57xx-beagle-x15")) { 10367a0ea589SLokesh Vutla return 0; 1037f7f9f6beSLokesh Vutla } 1038f7f9f6beSLokesh Vutla } else if (board_is_am572x_evm() && 1039f7f9f6beSLokesh Vutla !strcmp(name, "am57xx-beagle-x15")) { 1040332dddc6SSchuyler Patton return 0; 1041f7f9f6beSLokesh Vutla } else if (board_is_am572x_idk() && !strcmp(name, "am572x-idk")) { 1042f7f9f6beSLokesh Vutla return 0; 104345e7f7e7SSchuyler Patton } else if (board_is_am571x_idk() && !strcmp(name, "am571x-idk")) { 104445e7f7e7SSchuyler Patton return 0; 1045f7f9f6beSLokesh Vutla } 1046f7f9f6beSLokesh Vutla 10477a0ea589SLokesh Vutla return -1; 10487a0ea589SLokesh Vutla } 10497a0ea589SLokesh Vutla #endif 105017c29873SAndreas Dannenberg 105117c29873SAndreas Dannenberg #ifdef CONFIG_TI_SECURE_DEVICE 105217c29873SAndreas Dannenberg void board_fit_image_post_process(void **p_image, size_t *p_size) 105317c29873SAndreas Dannenberg { 105417c29873SAndreas Dannenberg secure_boot_verify_image(p_image, p_size); 105517c29873SAndreas Dannenberg } 10561b597adaSAndrew F. Davis 10571b597adaSAndrew F. Davis void board_tee_image_process(ulong tee_image, size_t tee_size) 10581b597adaSAndrew F. Davis { 10591b597adaSAndrew F. Davis secure_tee_install((u32)tee_image); 10601b597adaSAndrew F. Davis } 10611b597adaSAndrew F. Davis 10621b597adaSAndrew F. Davis U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process); 106317c29873SAndreas Dannenberg #endif 1064