1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * board.h 4 * 5 * TI AM335x boards information header 6 * 7 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ 8 */ 9 10 #ifndef _BOARD_H_ 11 #define _BOARD_H_ 12 13 /** 14 * AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and 15 * REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame 16 * Synchronization Lost errors. The values are the biggest that work 17 * reliably with offered video modes and the memory subsystem on the 18 * boards. These register have are briefly documented in "7.3.3.5.2 19 * Command Starvation" section of AM335x TRM. The REG_COS_COUNT_1 and 20 * REG_COS_COUNT_2 do not have any effect on current versions of 21 * AM335x. 22 */ 23 #define EMIF_OCP_CONFIG_BEAGLEBONE_BLACK 0x00141414 24 #define EMIF_OCP_CONFIG_AM335X_EVM 0x003d3d3d 25 26 static inline int board_is_bone(void) 27 { 28 return board_ti_is("A335BONE"); 29 } 30 31 static inline int board_is_bone_lt(void) 32 { 33 return board_ti_is("A335BNLT"); 34 } 35 36 static inline int board_is_pb(void) 37 { 38 return board_ti_is("A335PBGL"); 39 } 40 41 static inline int board_is_bbg1(void) 42 { 43 return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4); 44 } 45 46 static inline int board_is_beaglebonex(void) 47 { 48 return board_is_pb() || board_is_bone() || board_is_bone_lt() || board_is_bbg1(); 49 } 50 51 static inline int board_is_evm_sk(void) 52 { 53 return board_ti_is("A335X_SK"); 54 } 55 56 static inline int board_is_idk(void) 57 { 58 return !strncmp(board_ti_get_config(), "SKU#02", 6); 59 } 60 61 static inline int board_is_gp_evm(void) 62 { 63 return board_ti_is("A33515BB"); 64 } 65 66 static inline int board_is_evm_15_or_later(void) 67 { 68 return (board_is_gp_evm() && 69 strncmp("1.5", board_ti_get_rev(), 3) <= 0); 70 } 71 72 static inline int board_is_icev2(void) 73 { 74 return board_ti_is("A335_ICE") && !strncmp("2", board_ti_get_rev(), 1); 75 } 76 77 /* 78 * We have three pin mux functions that must exist. We must be able to enable 79 * uart0, for initial output and i2c0 to read the main EEPROM. We then have a 80 * main pinmux function that can be overridden to enable all other pinmux that 81 * is required on the board. 82 */ 83 void enable_uart0_pin_mux(void); 84 void enable_uart1_pin_mux(void); 85 void enable_uart2_pin_mux(void); 86 void enable_uart3_pin_mux(void); 87 void enable_uart4_pin_mux(void); 88 void enable_uart5_pin_mux(void); 89 void enable_i2c0_pin_mux(void); 90 void enable_board_pin_mux(void); 91 #endif 92