1 /* 2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <dm.h> 8 #include <misc.h> 9 #include <ram.h> 10 #include <dm/pinctrl.h> 11 #include <dm/uclass-internal.h> 12 #include <asm/arch/periph.h> 13 #include <power/regulator.h> 14 #include <u-boot/sha256.h> 15 16 DECLARE_GLOBAL_DATA_PTR; 17 18 #define RK3399_CPUID_OFF 0x7 19 #define RK3399_CPUID_LEN 0x10 20 21 DECLARE_GLOBAL_DATA_PTR; 22 23 int board_init(void) 24 { 25 struct udevice *pinctrl, *regulator; 26 int ret; 27 28 /* 29 * The PWM does not have decicated interrupt number in dts and can 30 * not get periph_id by pinctrl framework, so let's init them here. 31 * The PWM2 and PWM3 are for pwm regulators. 32 */ 33 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); 34 if (ret) { 35 debug("%s: Cannot find pinctrl device\n", __func__); 36 goto out; 37 } 38 39 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2); 40 if (ret) { 41 debug("%s PWM2 pinctrl init fail!\n", __func__); 42 goto out; 43 } 44 45 /* rk3399 need to init vdd_center to get the correct output voltage */ 46 ret = regulator_get_by_platname("vdd_center", ®ulator); 47 if (ret) 48 debug("%s: Cannot get vdd_center regulator\n", __func__); 49 50 ret = regulator_get_by_platname("vcc5v0_host", ®ulator); 51 if (ret) { 52 debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); 53 goto out; 54 } 55 56 ret = regulator_set_enable(regulator, true); 57 if (ret) { 58 debug("%s vcc5v0-host-en set fail!\n", __func__); 59 goto out; 60 } 61 62 out: 63 return 0; 64 } 65 66 int dram_init(void) 67 { 68 struct ram_info ram; 69 struct udevice *dev; 70 int ret; 71 72 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 73 if (ret) { 74 debug("DRAM init failed: %d\n", ret); 75 return ret; 76 } 77 ret = ram_get_info(dev, &ram); 78 if (ret) { 79 debug("Cannot get DRAM size: %d\n", ret); 80 return ret; 81 } 82 debug("SDRAM base=%llx, size=%x\n", ram.base, (unsigned int)ram.size); 83 gd->ram_size = ram.size; 84 85 return 0; 86 } 87 88 int dram_init_banksize(void) 89 { 90 /* Reserve 0x200000 for ATF bl31 */ 91 gd->bd->bi_dram[0].start = 0x200000; 92 gd->bd->bi_dram[0].size = 0x7e000000; 93 94 return 0; 95 } 96