1*92e30c07SStefano Babic /* 2*92e30c07SStefano Babic * Copyright (C) 2011 3*92e30c07SStefano Babic * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 4*92e30c07SStefano Babic * 5*92e30c07SStefano Babic * Copyright (C) 2010 TechNexion Ltd. 6*92e30c07SStefano Babic * 7*92e30c07SStefano Babic * This program is free software; you can redistribute it and/or modify 8*92e30c07SStefano Babic * it under the terms of the GNU General Public License as published by 9*92e30c07SStefano Babic * the Free Software Foundation; either version 2 of the License, or 10*92e30c07SStefano Babic * (at your option) any later version. 11*92e30c07SStefano Babic * 12*92e30c07SStefano Babic * This program is distributed in the hope that it will be useful, 13*92e30c07SStefano Babic * but WITHOUT ANY WARRANTY; without even the implied warranty of 14*92e30c07SStefano Babic * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15*92e30c07SStefano Babic * GNU General Public License for more details. 16*92e30c07SStefano Babic * 17*92e30c07SStefano Babic * You should have received a copy of the GNU General Public License 18*92e30c07SStefano Babic * along with this program; if not, write to the Free Software 19*92e30c07SStefano Babic * Foundation, Inc. 20*92e30c07SStefano Babic */ 21*92e30c07SStefano Babic 22*92e30c07SStefano Babic #ifndef _TAM3517_H_ 23*92e30c07SStefano Babic #define _TAM3517_H_ 24*92e30c07SStefano Babic 25*92e30c07SStefano Babic const omap3_sysinfo sysinfo = { 26*92e30c07SStefano Babic DDR_DISCRETE, 27*92e30c07SStefano Babic "TAM3517 TWISTER Board", 28*92e30c07SStefano Babic "NAND", 29*92e30c07SStefano Babic }; 30*92e30c07SStefano Babic 31*92e30c07SStefano Babic #define XR16L2751_GPMC_CONFIG1 0x00000000 32*92e30c07SStefano Babic #define XR16L2751_GPMC_CONFIG2 0x001e1e01 33*92e30c07SStefano Babic #define XR16L2751_GPMC_CONFIG3 0x00080300 34*92e30c07SStefano Babic #define XR16L2751_GPMC_CONFIG4 0x1c091c09 35*92e30c07SStefano Babic #define XR16L2751_GPMC_CONFIG5 0x04181f1f 36*92e30c07SStefano Babic #define XR16L2751_GPMC_CONFIG6 0x00000FCF 37*92e30c07SStefano Babic 38*92e30c07SStefano Babic #define XR16L2751_UART1_BASE 0x21000000 39*92e30c07SStefano Babic #define XR16L2751_UART2_BASE 0x23000000 40*92e30c07SStefano Babic 41*92e30c07SStefano Babic 42*92e30c07SStefano Babic /* 43*92e30c07SStefano Babic * IEN - Input Enable 44*92e30c07SStefano Babic * IDIS - Input Disable 45*92e30c07SStefano Babic * PTD - Pull type Down 46*92e30c07SStefano Babic * PTU - Pull type Up 47*92e30c07SStefano Babic * DIS - Pull type selection is inactive 48*92e30c07SStefano Babic * EN - Pull type selection is active 49*92e30c07SStefano Babic * M0 - Mode 0 50*92e30c07SStefano Babic * The commented string gives the final mux configuration for that pin 51*92e30c07SStefano Babic */ 52*92e30c07SStefano Babic #define MUX_TWISTER() \ 53*92e30c07SStefano Babic /* SDRC */\ 54*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) \ 55*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) \ 56*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) \ 57*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) \ 58*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) \ 59*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) \ 60*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) \ 61*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) \ 62*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) \ 63*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) \ 64*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) \ 65*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) \ 66*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) \ 67*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) \ 68*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) \ 69*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) \ 70*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) \ 71*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) \ 72*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) \ 73*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) \ 74*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) \ 75*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) \ 76*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) \ 77*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) \ 78*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) \ 79*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) \ 80*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) \ 81*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) \ 82*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) \ 83*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) \ 84*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) \ 85*92e30c07SStefano Babic MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) \ 86*92e30c07SStefano Babic MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) \ 87*92e30c07SStefano Babic MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) \ 88*92e30c07SStefano Babic MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) \ 89*92e30c07SStefano Babic MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) \ 90*92e30c07SStefano Babic MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) \ 91*92e30c07SStefano Babic MUX_VAL(CP(SDRC_DQS0N), (IEN | PTD | EN | M0)) \ 92*92e30c07SStefano Babic MUX_VAL(CP(SDRC_DQS1N), (IEN | PTD | EN | M0)) \ 93*92e30c07SStefano Babic MUX_VAL(CP(SDRC_DQS2N), (IEN | PTD | EN | M0)) \ 94*92e30c07SStefano Babic MUX_VAL(CP(SDRC_DQS3N), (IEN | PTD | EN | M0)) \ 95*92e30c07SStefano Babic MUX_VAL(CP(SDRC_CKE0), (M0)) \ 96*92e30c07SStefano Babic MUX_VAL(CP(SDRC_CKE1), (M0)) \ 97*92e30c07SStefano Babic MUX_VAL(CP(STRBEN_DLY0), (IEN | PTD | EN | M0)) \ 98*92e30c07SStefano Babic /*sdrc_strben_dly0*/\ 99*92e30c07SStefano Babic MUX_VAL(CP(STRBEN_DLY1), (IEN | PTD | EN | M0)) \ 100*92e30c07SStefano Babic /*sdrc_strben_dly1*/\ 101*92e30c07SStefano Babic /* GPMC */\ 102*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) \ 103*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) \ 104*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) \ 105*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) \ 106*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) \ 107*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) \ 108*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) \ 109*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) \ 110*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) \ 111*92e30c07SStefano Babic MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) \ 112*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) \ 113*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) \ 114*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) \ 115*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) \ 116*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) \ 117*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) \ 118*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) \ 119*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) \ 120*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) \ 121*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) \ 122*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) \ 123*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) \ 124*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) \ 125*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) \ 126*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) \ 127*92e30c07SStefano Babic MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) \ 128*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) \ 129*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NCS1), (IEN | PTU | EN | M0)) \ 130*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NCS2), (IDIS | PTD | EN | M2)) /*PWM9*/\ 131*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M0)) \ 132*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NCS4), (IEN | PTD | EN | M4)) \ 133*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) \ 134*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NCS6), (IDIS | PTD | EN | M3)) /*PWM11*/ \ 135*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | EN | M4)) /*GPIO_58*/ \ 136*92e30c07SStefano Babic MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) \ 137*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) \ 138*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) \ 139*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) \ 140*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) \ 141*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)) \ 142*92e30c07SStefano Babic MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) \ 143*92e30c07SStefano Babic MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) \ 144*92e30c07SStefano Babic MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \ 145*92e30c07SStefano Babic MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ 146*92e30c07SStefano Babic MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \ 147*92e30c07SStefano Babic /* DSS */\ 148*92e30c07SStefano Babic MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \ 149*92e30c07SStefano Babic MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) \ 150*92e30c07SStefano Babic MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) \ 151*92e30c07SStefano Babic MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) \ 152*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) \ 153*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) \ 154*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) \ 155*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) \ 156*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) \ 157*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) \ 158*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) \ 159*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) \ 160*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) \ 161*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) \ 162*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) \ 163*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) \ 164*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) \ 165*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) \ 166*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) \ 167*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) \ 168*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) \ 169*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) \ 170*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) \ 171*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) \ 172*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) \ 173*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) \ 174*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \ 175*92e30c07SStefano Babic MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \ 176*92e30c07SStefano Babic /* CAMERA */\ 177*92e30c07SStefano Babic MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \ 178*92e30c07SStefano Babic MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \ 179*92e30c07SStefano Babic MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \ 180*92e30c07SStefano Babic MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \ 181*92e30c07SStefano Babic MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ 182*92e30c07SStefano Babic MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \ 183*92e30c07SStefano Babic MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \ 184*92e30c07SStefano Babic MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \ 185*92e30c07SStefano Babic MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \ 186*92e30c07SStefano Babic MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \ 187*92e30c07SStefano Babic MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \ 188*92e30c07SStefano Babic MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \ 189*92e30c07SStefano Babic MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \ 190*92e30c07SStefano Babic MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \ 191*92e30c07SStefano Babic MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \ 192*92e30c07SStefano Babic MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) \ 193*92e30c07SStefano Babic MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) \ 194*92e30c07SStefano Babic MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \ 195*92e30c07SStefano Babic MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ 196*92e30c07SStefano Babic MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \ 197*92e30c07SStefano Babic MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \ 198*92e30c07SStefano Babic MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \ 199*92e30c07SStefano Babic MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \ 200*92e30c07SStefano Babic MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) \ 201*92e30c07SStefano Babic /* MMC */\ 202*92e30c07SStefano Babic MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) \ 203*92e30c07SStefano Babic MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) \ 204*92e30c07SStefano Babic MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0)) \ 205*92e30c07SStefano Babic MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) \ 206*92e30c07SStefano Babic MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) \ 207*92e30c07SStefano Babic MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) \ 208*92e30c07SStefano Babic MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M4)) \ 209*92e30c07SStefano Babic /* CardDetect */\ 210*92e30c07SStefano Babic MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \ 211*92e30c07SStefano Babic MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \ 212*92e30c07SStefano Babic MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \ 213*92e30c07SStefano Babic \ 214*92e30c07SStefano Babic MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) \ 215*92e30c07SStefano Babic MUX_VAL(CP(MMC2_CMD), (IEN | PTU | DIS | M0)) \ 216*92e30c07SStefano Babic MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | DIS | M0)) \ 217*92e30c07SStefano Babic MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | DIS | M0)) \ 218*92e30c07SStefano Babic MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | DIS | M0)) \ 219*92e30c07SStefano Babic MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | DIS | M0)) \ 220*92e30c07SStefano Babic MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | EN | M4)) \ 221*92e30c07SStefano Babic MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \ 222*92e30c07SStefano Babic MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \ 223*92e30c07SStefano Babic MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \ 224*92e30c07SStefano Babic /* McBSP */\ 225*92e30c07SStefano Babic MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \ 226*92e30c07SStefano Babic MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) \ 227*92e30c07SStefano Babic MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) \ 228*92e30c07SStefano Babic MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) \ 229*92e30c07SStefano Babic MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) \ 230*92e30c07SStefano Babic MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) \ 231*92e30c07SStefano Babic MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) \ 232*92e30c07SStefano Babic \ 233*92e30c07SStefano Babic MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | EN | M4)) /*GPIO_116*/ \ 234*92e30c07SStefano Babic MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | EN | M4)) \ 235*92e30c07SStefano Babic MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | EN | M4)) \ 236*92e30c07SStefano Babic MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \ 237*92e30c07SStefano Babic \ 238*92e30c07SStefano Babic MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \ 239*92e30c07SStefano Babic MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \ 240*92e30c07SStefano Babic MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) \ 241*92e30c07SStefano Babic MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \ 242*92e30c07SStefano Babic \ 243*92e30c07SStefano Babic MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_152*/\ 244*92e30c07SStefano Babic MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\ 245*92e30c07SStefano Babic MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\ 246*92e30c07SStefano Babic MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M4)) /*GPIO_155*/\ 247*92e30c07SStefano Babic /* UART */\ 248*92e30c07SStefano Babic MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) \ 249*92e30c07SStefano Babic MUX_VAL(CP(UART1_RTS), (IEN | PTU | EN | M4)) \ 250*92e30c07SStefano Babic MUX_VAL(CP(UART1_CTS), (IEN | PTU | EN | M4)) \ 251*92e30c07SStefano Babic \ 252*92e30c07SStefano Babic MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \ 253*92e30c07SStefano Babic MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \ 254*92e30c07SStefano Babic MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \ 255*92e30c07SStefano Babic MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \ 256*92e30c07SStefano Babic MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \ 257*92e30c07SStefano Babic \ 258*92e30c07SStefano Babic MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) /*GPIO_163*/ \ 259*92e30c07SStefano Babic MUX_VAL(CP(UART3_RTS_SD), (IEN | PTD | DIS | M4)) /*GPIO_164*/\ 260*92e30c07SStefano Babic MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) \ 261*92e30c07SStefano Babic MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) \ 262*92e30c07SStefano Babic /* I2C */\ 263*92e30c07SStefano Babic MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) \ 264*92e30c07SStefano Babic MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) \ 265*92e30c07SStefano Babic MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) \ 266*92e30c07SStefano Babic MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) \ 267*92e30c07SStefano Babic MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) \ 268*92e30c07SStefano Babic MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) \ 269*92e30c07SStefano Babic MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) \ 270*92e30c07SStefano Babic MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) \ 271*92e30c07SStefano Babic /* McSPI */\ 272*92e30c07SStefano Babic MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) \ 273*92e30c07SStefano Babic MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) \ 274*92e30c07SStefano Babic MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) \ 275*92e30c07SStefano Babic MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) \ 276*92e30c07SStefano Babic MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\ 277*92e30c07SStefano Babic MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M4)) /*GPIO_176*/\ 278*92e30c07SStefano Babic MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M4)) \ 279*92e30c07SStefano Babic \ 280*92e30c07SStefano Babic MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) \ 281*92e30c07SStefano Babic MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) \ 282*92e30c07SStefano Babic MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) \ 283*92e30c07SStefano Babic MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \ 284*92e30c07SStefano Babic MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M4)) \ 285*92e30c07SStefano Babic /* CCDC */\ 286*92e30c07SStefano Babic MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \ 287*92e30c07SStefano Babic MUX_VAL(CP(CCDC_FIELD), (IEN | PTD | DIS | M1)) \ 288*92e30c07SStefano Babic MUX_VAL(CP(CCDC_HD), (IEN | PTU | EN | M0)) \ 289*92e30c07SStefano Babic MUX_VAL(CP(CCDC_VD), (IEN | PTU | EN | M0)) \ 290*92e30c07SStefano Babic MUX_VAL(CP(CCDC_WEN), (IEN | PTD | DIS | M1)) \ 291*92e30c07SStefano Babic MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | DIS | M0)) \ 292*92e30c07SStefano Babic MUX_VAL(CP(CCDC_DATA1), (IEN | PTD | DIS | M0)) \ 293*92e30c07SStefano Babic MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | DIS | M0)) \ 294*92e30c07SStefano Babic MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | DIS | M0)) \ 295*92e30c07SStefano Babic MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | DIS | M0)) \ 296*92e30c07SStefano Babic MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | DIS | M0)) \ 297*92e30c07SStefano Babic MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | DIS | M0)) \ 298*92e30c07SStefano Babic MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | DIS | M0)) \ 299*92e30c07SStefano Babic /* RMII */\ 300*92e30c07SStefano Babic MUX_VAL(CP(RMII_MDIO_DATA), (IEN | M0)) \ 301*92e30c07SStefano Babic MUX_VAL(CP(RMII_MDIO_CLK), (M0)) \ 302*92e30c07SStefano Babic MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | M0)) \ 303*92e30c07SStefano Babic MUX_VAL(CP(RMII_RXD1), (IEN | PTD | M0)) \ 304*92e30c07SStefano Babic MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | M0)) \ 305*92e30c07SStefano Babic MUX_VAL(CP(RMII_RXER), (PTD | M0)) \ 306*92e30c07SStefano Babic MUX_VAL(CP(RMII_TXD0), (PTD | M0)) \ 307*92e30c07SStefano Babic MUX_VAL(CP(RMII_TXD1), (PTD | M0)) \ 308*92e30c07SStefano Babic MUX_VAL(CP(RMII_TXEN), (PTD | M0)) \ 309*92e30c07SStefano Babic MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) \ 310*92e30c07SStefano Babic /* HECC */\ 311*92e30c07SStefano Babic MUX_VAL(CP(HECC1_TXD), (IEN | PTU | EN | M0)) \ 312*92e30c07SStefano Babic MUX_VAL(CP(HECC1_RXD), (IEN | PTU | EN | M0)) \ 313*92e30c07SStefano Babic /* HSUSB */\ 314*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) \ 315*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) \ 316*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) \ 317*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_NXT), (IEN | PTU | DIS | M0)) \ 318*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) \ 319*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) \ 320*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) \ 321*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) \ 322*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) \ 323*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) \ 324*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) \ 325*92e30c07SStefano Babic MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) \ 326*92e30c07SStefano Babic MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)) \ 327*92e30c07SStefano Babic /* HDQ */\ 328*92e30c07SStefano Babic MUX_VAL(CP(HDQ_SIO), (IEN | PTD | EN | M4)) \ 329*92e30c07SStefano Babic /* Control and debug */\ 330*92e30c07SStefano Babic MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) \ 331*92e30c07SStefano Babic MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) \ 332*92e30c07SStefano Babic MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) \ 333*92e30c07SStefano Babic MUX_VAL(CP(SYS_NRESWARM), (IDIS | PTU | DIS | M4)) \ 334*92e30c07SStefano Babic /* - GPIO30 */\ 335*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ 336*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ 337*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ 338*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ 339*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ 340*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ 341*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ 342*92e30c07SStefano Babic /* - VIO_1V8*/\ 343*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT7), (IEN | PTD | EN | M0)) \ 344*92e30c07SStefano Babic MUX_VAL(CP(SYS_BOOT8), (IEN | PTD | EN | M0)) \ 345*92e30c07SStefano Babic \ 346*92e30c07SStefano Babic MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) \ 347*92e30c07SStefano Babic MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) \ 348*92e30c07SStefano Babic MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) \ 349*92e30c07SStefano Babic /* JTAG */\ 350*92e30c07SStefano Babic MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) \ 351*92e30c07SStefano Babic MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) \ 352*92e30c07SStefano Babic MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) \ 353*92e30c07SStefano Babic MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) \ 354*92e30c07SStefano Babic MUX_VAL(CP(JTAG_EMU0), (IDIS | PTD | EN | M4)) /*GPIO_11*/ \ 355*92e30c07SStefano Babic MUX_VAL(CP(JTAG_EMU1), (IDIS | PTD | EN | M4)) /*GPIO_31*/ \ 356*92e30c07SStefano Babic /* ETK (ES2 onwards) */\ 357*92e30c07SStefano Babic MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | DIS | M3)) \ 358*92e30c07SStefano Babic /* hsusb1_stp */ \ 359*92e30c07SStefano Babic MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)) \ 360*92e30c07SStefano Babic /* hsusb1_clk */\ 361*92e30c07SStefano Babic MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M3)) \ 362*92e30c07SStefano Babic MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | EN | M3)) \ 363*92e30c07SStefano Babic MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | EN | M3)) \ 364*92e30c07SStefano Babic MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M3)) \ 365*92e30c07SStefano Babic MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M3)) \ 366*92e30c07SStefano Babic MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M3)) \ 367*92e30c07SStefano Babic MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M3)) \ 368*92e30c07SStefano Babic MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M3)) \ 369*92e30c07SStefano Babic MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)) \ 370*92e30c07SStefano Babic /* hsusb1_dir */\ 371*92e30c07SStefano Babic MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)) \ 372*92e30c07SStefano Babic /* hsusb1_nxt */\ 373*92e30c07SStefano Babic MUX_VAL(CP(ETK_D10_ES2), (IEN | PTU | EN | M4)) \ 374*92e30c07SStefano Babic MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M4)) \ 375*92e30c07SStefano Babic MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M4)) \ 376*92e30c07SStefano Babic MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M4)) \ 377*92e30c07SStefano Babic MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M4)) \ 378*92e30c07SStefano Babic MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M4)) \ 379*92e30c07SStefano Babic /* Die to Die */\ 380*92e30c07SStefano Babic MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) \ 381*92e30c07SStefano Babic MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) \ 382*92e30c07SStefano Babic MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) \ 383*92e30c07SStefano Babic MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) \ 384*92e30c07SStefano Babic MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) \ 385*92e30c07SStefano Babic MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) \ 386*92e30c07SStefano Babic MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) \ 387*92e30c07SStefano Babic MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) \ 388*92e30c07SStefano Babic MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) \ 389*92e30c07SStefano Babic MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) \ 390*92e30c07SStefano Babic MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) \ 391*92e30c07SStefano Babic MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) \ 392*92e30c07SStefano Babic MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) \ 393*92e30c07SStefano Babic MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) \ 394*92e30c07SStefano Babic MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) \ 395*92e30c07SStefano Babic MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) \ 396*92e30c07SStefano Babic MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) \ 397*92e30c07SStefano Babic MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) \ 398*92e30c07SStefano Babic MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) \ 399*92e30c07SStefano Babic MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) \ 400*92e30c07SStefano Babic MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) \ 401*92e30c07SStefano Babic MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) \ 402*92e30c07SStefano Babic MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) \ 403*92e30c07SStefano Babic MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) \ 404*92e30c07SStefano Babic MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) \ 405*92e30c07SStefano Babic MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) \ 406*92e30c07SStefano Babic MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) \ 407*92e30c07SStefano Babic MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) \ 408*92e30c07SStefano Babic MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) \ 409*92e30c07SStefano Babic MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) \ 410*92e30c07SStefano Babic 411*92e30c07SStefano Babic #endif 412