1 /*
2  * Copyright (C) 2011
3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4  *
5  * Copyright (C) 2009 TechNexion Ltd.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #include <common.h>
11 #include <netdev.h>
12 #include <asm/io.h>
13 #include <asm/arch/mem.h>
14 #include <asm/arch/mux.h>
15 #include <asm/arch/sys_proto.h>
16 #include <asm/omap_gpio.h>
17 #include <asm/arch/mmc_host_def.h>
18 #include <i2c.h>
19 #include <asm/gpio.h>
20 #ifdef CONFIG_USB_EHCI
21 #include <usb.h>
22 #include <asm/ehci-omap.h>
23 #endif
24 #include "twister.h"
25 
26 DECLARE_GLOBAL_DATA_PTR;
27 
28 /* Timing definitions for Ethernet Controller */
29 static const u32 gpmc_smc911[] = {
30 	NET_GPMC_CONFIG1,
31 	NET_GPMC_CONFIG2,
32 	NET_GPMC_CONFIG3,
33 	NET_GPMC_CONFIG4,
34 	NET_GPMC_CONFIG5,
35 	NET_GPMC_CONFIG6,
36 };
37 
38 static const u32 gpmc_XR16L2751[] = {
39 	XR16L2751_GPMC_CONFIG1,
40 	XR16L2751_GPMC_CONFIG2,
41 	XR16L2751_GPMC_CONFIG3,
42 	XR16L2751_GPMC_CONFIG4,
43 	XR16L2751_GPMC_CONFIG5,
44 	XR16L2751_GPMC_CONFIG6,
45 };
46 
47 #ifdef CONFIG_USB_EHCI
48 static struct omap_usbhs_board_data usbhs_bdata = {
49 	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
50 	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
51 	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
52 };
53 
54 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
55 {
56 	return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
57 }
58 
59 int ehci_hcd_stop(int index)
60 {
61 	return omap_ehci_hcd_stop();
62 }
63 #endif
64 
65 int board_init(void)
66 {
67 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
68 
69 	/* boot param addr */
70 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
71 
72 	/* Chip select 1  and 3 are used for XR16L2751 UART controller */
73 	enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1],
74 		XR16L2751_UART1_BASE, GPMC_SIZE_16M);
75 
76 	enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3],
77 		XR16L2751_UART2_BASE, GPMC_SIZE_16M);
78 
79 	gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET");
80 	gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1);
81 
82 	return 0;
83 }
84 
85 #ifndef CONFIG_SPL_BUILD
86 int misc_init_r(void)
87 {
88 	char *eth_addr;
89 	struct tam3517_module_info info;
90 	int ret;
91 
92 	dieid_num_r();
93 
94 	eth_addr = getenv("ethaddr");
95 	if (eth_addr)
96 		return 0;
97 
98 	TAM3517_READ_EEPROM(&info, ret);
99 	if (!ret)
100 		TAM3517_READ_MAC_FROM_EEPROM(&info);
101 
102 	return 0;
103 }
104 #endif
105 
106 /*
107  * Routine: set_muxconf_regs
108  * Description: Setting up the configuration Mux registers specific to the
109  *		hardware. Many pins need to be moved from protect to primary
110  *		mode.
111  */
112 void set_muxconf_regs(void)
113 {
114 	MUX_TWISTER();
115 }
116 
117 int board_eth_init(bd_t *bis)
118 {
119 	davinci_emac_initialize();
120 
121 	/* init cs for extern lan */
122 	enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
123 		CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
124 	if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0)
125 		printf("\nError initializing SMC911x controlleri\n");
126 
127 	return 0;
128 }
129 
130 #if defined(CONFIG_OMAP_HSMMC) && \
131 	!defined(CONFIG_SPL_BUILD)
132 int board_mmc_init(bd_t *bis)
133 {
134 	return omap_mmc_init(0, 0, 0, -1, -1);
135 }
136 #endif
137 
138 #ifdef CONFIG_SPL_OS_BOOT
139 /*
140  * Do board specific preperation before SPL
141  * Linux boot
142  */
143 void spl_board_prepare_for_linux(void)
144 {
145 	/* init cs for extern lan */
146 	enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
147 		CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
148 }
149 int spl_start_uboot(void)
150 {
151 	int val = 0;
152 	if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
153 		gpio_direction_input(SPL_OS_BOOT_KEY);
154 		val = gpio_get_value(SPL_OS_BOOT_KEY);
155 		gpio_free(SPL_OS_BOOT_KEY);
156 	}
157 	return val;
158 }
159 #endif
160