1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2011
4  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
5  *
6  * Copyright (C) 2009 TechNexion Ltd.
7  */
8 
9 #include <common.h>
10 #include <netdev.h>
11 #include <asm/io.h>
12 #include <asm/arch/mem.h>
13 #include <asm/arch/mux.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/omap_gpio.h>
16 #include <asm/arch/mmc_host_def.h>
17 #include <i2c.h>
18 #include <spl.h>
19 #include <mmc.h>
20 #include <asm/gpio.h>
21 #ifdef CONFIG_USB_EHCI_HCD
22 #include <usb.h>
23 #include <asm/ehci-omap.h>
24 #endif
25 #include "twister.h"
26 
27 DECLARE_GLOBAL_DATA_PTR;
28 
29 /* Timing definitions for Ethernet Controller */
30 static const u32 gpmc_smc911[] = {
31 	NET_GPMC_CONFIG1,
32 	NET_GPMC_CONFIG2,
33 	NET_GPMC_CONFIG3,
34 	NET_GPMC_CONFIG4,
35 	NET_GPMC_CONFIG5,
36 	NET_GPMC_CONFIG6,
37 };
38 
39 static const u32 gpmc_XR16L2751[] = {
40 	XR16L2751_GPMC_CONFIG1,
41 	XR16L2751_GPMC_CONFIG2,
42 	XR16L2751_GPMC_CONFIG3,
43 	XR16L2751_GPMC_CONFIG4,
44 	XR16L2751_GPMC_CONFIG5,
45 	XR16L2751_GPMC_CONFIG6,
46 };
47 
48 #ifdef CONFIG_USB_EHCI_HCD
49 static struct omap_usbhs_board_data usbhs_bdata = {
50 	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
51 	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
52 	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
53 };
54 
55 int ehci_hcd_init(int index, enum usb_init_type init,
56 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
57 {
58 	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
59 }
60 
61 int ehci_hcd_stop(int index)
62 {
63 	return omap_ehci_hcd_stop();
64 }
65 #endif
66 
67 int board_init(void)
68 {
69 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
70 
71 	/* boot param addr */
72 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
73 
74 	/* Chip select 1  and 3 are used for XR16L2751 UART controller */
75 	enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1],
76 		XR16L2751_UART1_BASE, GPMC_SIZE_16M);
77 
78 	enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3],
79 		XR16L2751_UART2_BASE, GPMC_SIZE_16M);
80 
81 	gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET");
82 	gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1);
83 
84 	return 0;
85 }
86 
87 #ifndef CONFIG_SPL_BUILD
88 int misc_init_r(void)
89 {
90 	char *eth_addr;
91 	struct tam3517_module_info info;
92 	int ret;
93 
94 	omap_die_id_display();
95 
96 	eth_addr = env_get("ethaddr");
97 	if (eth_addr)
98 		return 0;
99 
100 	TAM3517_READ_EEPROM(&info, ret);
101 	if (!ret)
102 		TAM3517_READ_MAC_FROM_EEPROM(&info);
103 
104 	return 0;
105 }
106 #endif
107 
108 /*
109  * Routine: set_muxconf_regs
110  * Description: Setting up the configuration Mux registers specific to the
111  *		hardware. Many pins need to be moved from protect to primary
112  *		mode.
113  */
114 void set_muxconf_regs(void)
115 {
116 	MUX_TWISTER();
117 }
118 
119 int board_eth_init(bd_t *bis)
120 {
121 	davinci_emac_initialize();
122 
123 	/* init cs for extern lan */
124 	enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
125 		CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
126 	if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0)
127 		printf("\nError initializing SMC911x controlleri\n");
128 
129 	return 0;
130 }
131 
132 #if defined(CONFIG_MMC_OMAP_HS) && \
133 	!defined(CONFIG_SPL_BUILD)
134 int board_mmc_init(bd_t *bis)
135 {
136 	return omap_mmc_init(0, 0, 0, -1, -1);
137 }
138 #endif
139 
140 #ifdef CONFIG_SPL_OS_BOOT
141 /*
142  * Do board specific preparation before SPL
143  * Linux boot
144  */
145 void spl_board_prepare_for_linux(void)
146 {
147 	/* init cs for extern lan */
148 	enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
149 		CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
150 }
151 int spl_start_uboot(void)
152 {
153 	int val = 0;
154 	if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
155 		gpio_direction_input(SPL_OS_BOOT_KEY);
156 		val = gpio_get_value(SPL_OS_BOOT_KEY);
157 		gpio_free(SPL_OS_BOOT_KEY);
158 	}
159 	return val;
160 }
161 #endif
162