1 /* 2 * Copyright (C) 2011 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 4 * 5 * Copyright (C) 2009 TechNexion Ltd. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <netdev.h> 12 #include <asm/io.h> 13 #include <asm/arch/mem.h> 14 #include <asm/arch/mux.h> 15 #include <asm/arch/sys_proto.h> 16 #include <asm/omap_gpio.h> 17 #include <asm/arch/mmc_host_def.h> 18 #include <i2c.h> 19 #include <asm/gpio.h> 20 #ifdef CONFIG_USB_EHCI 21 #include <usb.h> 22 #include <asm/ehci-omap.h> 23 #endif 24 #include "twister.h" 25 26 DECLARE_GLOBAL_DATA_PTR; 27 28 /* Timing definitions for Ethernet Controller */ 29 static const u32 gpmc_smc911[] = { 30 NET_GPMC_CONFIG1, 31 NET_GPMC_CONFIG2, 32 NET_GPMC_CONFIG3, 33 NET_GPMC_CONFIG4, 34 NET_GPMC_CONFIG5, 35 NET_GPMC_CONFIG6, 36 }; 37 38 static const u32 gpmc_XR16L2751[] = { 39 XR16L2751_GPMC_CONFIG1, 40 XR16L2751_GPMC_CONFIG2, 41 XR16L2751_GPMC_CONFIG3, 42 XR16L2751_GPMC_CONFIG4, 43 XR16L2751_GPMC_CONFIG5, 44 XR16L2751_GPMC_CONFIG6, 45 }; 46 47 #ifdef CONFIG_USB_EHCI 48 static struct omap_usbhs_board_data usbhs_bdata = { 49 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 50 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 51 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 52 }; 53 54 int ehci_hcd_init(int index, enum usb_init_type init, 55 struct ehci_hccr **hccr, struct ehci_hcor **hcor) 56 { 57 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); 58 } 59 60 int ehci_hcd_stop(int index) 61 { 62 return omap_ehci_hcd_stop(); 63 } 64 #endif 65 66 int board_init(void) 67 { 68 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 69 70 /* boot param addr */ 71 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 72 73 /* Chip select 1 and 3 are used for XR16L2751 UART controller */ 74 enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1], 75 XR16L2751_UART1_BASE, GPMC_SIZE_16M); 76 77 enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3], 78 XR16L2751_UART2_BASE, GPMC_SIZE_16M); 79 80 gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET"); 81 gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1); 82 83 return 0; 84 } 85 86 #ifndef CONFIG_SPL_BUILD 87 int misc_init_r(void) 88 { 89 char *eth_addr; 90 struct tam3517_module_info info; 91 int ret; 92 93 dieid_num_r(); 94 95 eth_addr = getenv("ethaddr"); 96 if (eth_addr) 97 return 0; 98 99 TAM3517_READ_EEPROM(&info, ret); 100 if (!ret) 101 TAM3517_READ_MAC_FROM_EEPROM(&info); 102 103 return 0; 104 } 105 #endif 106 107 /* 108 * Routine: set_muxconf_regs 109 * Description: Setting up the configuration Mux registers specific to the 110 * hardware. Many pins need to be moved from protect to primary 111 * mode. 112 */ 113 void set_muxconf_regs(void) 114 { 115 MUX_TWISTER(); 116 } 117 118 int board_eth_init(bd_t *bis) 119 { 120 davinci_emac_initialize(); 121 122 /* init cs for extern lan */ 123 enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], 124 CONFIG_SMC911X_BASE, GPMC_SIZE_16M); 125 if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0) 126 printf("\nError initializing SMC911x controlleri\n"); 127 128 return 0; 129 } 130 131 #if defined(CONFIG_OMAP_HSMMC) && \ 132 !defined(CONFIG_SPL_BUILD) 133 int board_mmc_init(bd_t *bis) 134 { 135 return omap_mmc_init(0, 0, 0, -1, -1); 136 } 137 #endif 138 139 #ifdef CONFIG_SPL_OS_BOOT 140 /* 141 * Do board specific preperation before SPL 142 * Linux boot 143 */ 144 void spl_board_prepare_for_linux(void) 145 { 146 /* init cs for extern lan */ 147 enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], 148 CONFIG_SMC911X_BASE, GPMC_SIZE_16M); 149 } 150 int spl_start_uboot(void) 151 { 152 int val = 0; 153 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) { 154 gpio_direction_input(SPL_OS_BOOT_KEY); 155 val = gpio_get_value(SPL_OS_BOOT_KEY); 156 gpio_free(SPL_OS_BOOT_KEY); 157 } 158 return val; 159 } 160 #endif 161