1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2011 4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 5 * 6 * Copyright (C) 2009 TechNexion Ltd. 7 */ 8 9 #include <common.h> 10 #include <netdev.h> 11 #include <asm/io.h> 12 #include <asm/arch/mem.h> 13 #include <asm/arch/mux.h> 14 #include <asm/arch/sys_proto.h> 15 #include <asm/omap_gpio.h> 16 #include <asm/arch/mmc_host_def.h> 17 #include <i2c.h> 18 #include <spl.h> 19 #include <mmc.h> 20 #include <asm/gpio.h> 21 #include <usb.h> 22 #include <asm/ehci-omap.h> 23 #include "twister.h" 24 25 DECLARE_GLOBAL_DATA_PTR; 26 27 /* Timing definitions for Ethernet Controller */ 28 static const u32 gpmc_smc911[] = { 29 NET_GPMC_CONFIG1, 30 NET_GPMC_CONFIG2, 31 NET_GPMC_CONFIG3, 32 NET_GPMC_CONFIG4, 33 NET_GPMC_CONFIG5, 34 NET_GPMC_CONFIG6, 35 }; 36 37 static const u32 gpmc_XR16L2751[] = { 38 XR16L2751_GPMC_CONFIG1, 39 XR16L2751_GPMC_CONFIG2, 40 XR16L2751_GPMC_CONFIG3, 41 XR16L2751_GPMC_CONFIG4, 42 XR16L2751_GPMC_CONFIG5, 43 XR16L2751_GPMC_CONFIG6, 44 }; 45 46 #ifdef CONFIG_USB_EHCI_OMAP 47 static struct omap_usbhs_board_data usbhs_bdata = { 48 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 49 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 50 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 51 }; 52 53 int ehci_hcd_init(int index, enum usb_init_type init, 54 struct ehci_hccr **hccr, struct ehci_hcor **hcor) 55 { 56 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); 57 } 58 59 int ehci_hcd_stop(int index) 60 { 61 return omap_ehci_hcd_stop(); 62 } 63 #endif 64 65 int board_init(void) 66 { 67 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 68 69 /* boot param addr */ 70 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 71 72 /* Chip select 1 and 3 are used for XR16L2751 UART controller */ 73 enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1], 74 XR16L2751_UART1_BASE, GPMC_SIZE_16M); 75 76 enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3], 77 XR16L2751_UART2_BASE, GPMC_SIZE_16M); 78 79 gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET"); 80 gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1); 81 82 return 0; 83 } 84 85 #ifndef CONFIG_SPL_BUILD 86 int misc_init_r(void) 87 { 88 char *eth_addr; 89 struct tam3517_module_info info; 90 int ret; 91 92 omap_die_id_display(); 93 94 eth_addr = env_get("ethaddr"); 95 if (eth_addr) 96 return 0; 97 98 TAM3517_READ_EEPROM(&info, ret); 99 if (!ret) 100 TAM3517_READ_MAC_FROM_EEPROM(&info); 101 102 return 0; 103 } 104 #endif 105 106 /* 107 * Routine: set_muxconf_regs 108 * Description: Setting up the configuration Mux registers specific to the 109 * hardware. Many pins need to be moved from protect to primary 110 * mode. 111 */ 112 void set_muxconf_regs(void) 113 { 114 MUX_TWISTER(); 115 } 116 117 int board_eth_init(bd_t *bis) 118 { 119 #ifdef CONFIG_DRIVER_TI_EMAC 120 davinci_emac_initialize(); 121 #endif 122 /* init cs for extern lan */ 123 enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], 124 CONFIG_SMC911X_BASE, GPMC_SIZE_16M); 125 #ifdef CONFIG_SMC911X 126 return smc911x_initialize(0, CONFIG_SMC911X_BASE); 127 #else 128 return 0; 129 #endif 130 } 131 132 #if defined(CONFIG_MMC_OMAP_HS) 133 int board_mmc_init(bd_t *bis) 134 { 135 return omap_mmc_init(0, 0, 0, -1, -1); 136 } 137 #endif 138 139 #ifdef CONFIG_SPL_OS_BOOT 140 /* 141 * Do board specific preparation before SPL 142 * Linux boot 143 */ 144 void spl_board_prepare_for_linux(void) 145 { 146 /* init cs for extern lan */ 147 enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], 148 CONFIG_SMC911X_BASE, GPMC_SIZE_16M); 149 } 150 int spl_start_uboot(void) 151 { 152 int val = 0; 153 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) { 154 gpio_direction_input(SPL_OS_BOOT_KEY); 155 val = gpio_get_value(SPL_OS_BOOT_KEY); 156 gpio_free(SPL_OS_BOOT_KEY); 157 } 158 return val; 159 } 160 #endif 161