1 /* 2 * (c) 2011 Graf-Syteco, Matthias Weisser 3 * <weisserm@arcor.de> 4 * 5 * Based on tx25.c: 6 * (C) Copyright 2009 DENX Software Engineering 7 * Author: John Rigby <jrigby@gmail.com> 8 * 9 * Based on imx27lite.c: 10 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net> 11 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com> 12 * And: 13 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 * 30 */ 31 #include <common.h> 32 #include <asm/gpio.h> 33 #include <asm/io.h> 34 #include <asm/arch/imx-regs.h> 35 #include <asm/arch/iomux-mx25.h> 36 37 DECLARE_GLOBAL_DATA_PTR; 38 39 int board_init() 40 { 41 static const iomux_v3_cfg_t sdhc1_pads[] = { 42 NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL), 43 NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL), 44 NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL), 45 NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL), 46 NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL), 47 NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL), 48 }; 49 50 static const iomux_v3_cfg_t dig_out_pads[] = { 51 MX25_PAD_CSI_D8__GPIO_1_7, /* Ouput 1 Ctrl */ 52 MX25_PAD_CSI_D7__GPIO_1_6, /* Ouput 2 Ctrl */ 53 NEW_PAD_CTRL(MX25_PAD_CSI_D6__GPIO_1_31, 0), /* Ouput 1 Stat */ 54 NEW_PAD_CTRL(MX25_PAD_CSI_D5__GPIO_1_30, 0), /* Ouput 2 Stat */ 55 }; 56 57 static const iomux_v3_cfg_t led_pads[] = { 58 MX25_PAD_CSI_D9__GPIO_4_21, 59 MX25_PAD_CSI_D4__GPIO_1_29, 60 }; 61 62 static const iomux_v3_cfg_t can_pads[] = { 63 NEW_PAD_CTRL(MX25_PAD_GPIO_A__CAN1_TX, NO_PAD_CTRL), 64 NEW_PAD_CTRL(MX25_PAD_GPIO_B__CAN1_RX, NO_PAD_CTRL), 65 NEW_PAD_CTRL(MX25_PAD_GPIO_C__CAN2_TX, NO_PAD_CTRL), 66 NEW_PAD_CTRL(MX25_PAD_GPIO_D__CAN2_RX, NO_PAD_CTRL), 67 }; 68 69 static const iomux_v3_cfg_t i2c3_pads[] = { 70 MX25_PAD_CSPI1_SS1__I2C3_DAT, 71 MX25_PAD_GPIO_E__I2C3_CLK, 72 }; 73 74 icache_enable(); 75 76 /* Setup of core voltage selection pin to run at 1.4V */ 77 imx_iomux_v3_setup_pad(MX25_PAD_EXT_ARMCLK__GPIO_3_15); /* VCORE */ 78 gpio_direction_output(IMX_GPIO_NR(3, 15), 1); 79 80 /* Setup of SD card pins*/ 81 imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads)); 82 83 /* Setup of digital output for USB power and OC */ 84 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D3__GPIO_1_28); /* USB Power */ 85 gpio_direction_output(IMX_GPIO_NR(1, 28), 1); 86 87 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D2__GPIO_1_27); /* USB OC */ 88 gpio_direction_input(IMX_GPIO_NR(1, 18)); 89 90 /* Setup of digital output control pins */ 91 imx_iomux_v3_setup_multiple_pads(dig_out_pads, 92 ARRAY_SIZE(dig_out_pads)); 93 94 /* Switch both output drivers off */ 95 gpio_direction_output(IMX_GPIO_NR(1, 7), 0); 96 gpio_direction_output(IMX_GPIO_NR(1, 6), 0); 97 98 /* Setup of key input pin */ 99 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_KPP_ROW0__GPIO_2_29, 0)); 100 gpio_direction_input(IMX_GPIO_NR(2, 29)); 101 102 /* Setup of status LED outputs */ 103 imx_iomux_v3_setup_multiple_pads(led_pads, ARRAY_SIZE(led_pads)); 104 105 /* Switch both LEDs off */ 106 gpio_direction_output(IMX_GPIO_NR(4, 21), 0); 107 gpio_direction_output(IMX_GPIO_NR(1, 29), 0); 108 109 /* Setup of CAN1 and CAN2 signals */ 110 imx_iomux_v3_setup_multiple_pads(can_pads, ARRAY_SIZE(can_pads)); 111 112 /* Setup of I2C3 signals */ 113 imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads)); 114 115 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 116 117 return 0; 118 } 119 120 int board_late_init(void) 121 { 122 const char *e; 123 124 #ifdef CONFIG_FEC_MXC 125 /* 126 * FIXME: need to revisit this 127 * The original code enabled PUE and 100-k pull-down without PKE, so the right 128 * value here is likely: 129 * 0 for no pull 130 * or: 131 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down 132 */ 133 #define FEC_OUT_PAD_CTRL 0 134 135 static const iomux_v3_cfg_t fec_pads[] = { 136 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, 137 MX25_PAD_FEC_RX_DV__FEC_RX_DV, 138 MX25_PAD_FEC_RDATA0__FEC_RDATA0, 139 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL), 140 NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL), 141 NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL), 142 MX25_PAD_FEC_MDIO__FEC_MDIO, 143 MX25_PAD_FEC_RDATA1__FEC_RDATA1, 144 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL), 145 146 MX25_PAD_UPLL_BYPCLK__GPIO_3_16, /* LAN-RESET */ 147 MX25_PAD_UART2_CTS__FEC_RX_ER, /* FEC_RX_ERR */ 148 }; 149 150 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); 151 152 /* assert PHY reset (low) */ 153 gpio_direction_output(IMX_GPIO_NR(3, 16), 0); 154 155 udelay(5000); 156 157 /* deassert PHY reset */ 158 gpio_set_value(IMX_GPIO_NR(3, 16), 1); 159 160 udelay(5000); 161 #endif 162 163 e = getenv("gs_base_board"); 164 if (e != NULL) { 165 if (strcmp(e, "G283") == 0) { 166 int key = gpio_get_value(IMX_GPIO_NR(2, 29)); 167 168 if (key) { 169 /* Switch on both LEDs to inidcate boot mode */ 170 gpio_set_value(IMX_GPIO_NR(1, 29), 0); 171 gpio_set_value(IMX_GPIO_NR(4, 21), 0); 172 173 setenv("preboot", "run gs_slow_boot"); 174 } else 175 setenv("preboot", "run gs_fast_boot"); 176 } 177 } 178 179 return 0; 180 } 181 182 int dram_init(void) 183 { 184 /* dram_init must store complete ramsize in gd->ram_size */ 185 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, 186 PHYS_SDRAM_SIZE); 187 return 0; 188 } 189