1 /* 2 * (c) 2011 Graf-Syteco, Matthias Weisser 3 * <weisserm@arcor.de> 4 * 5 * Based on tx25.c: 6 * (C) Copyright 2009 DENX Software Engineering 7 * Author: John Rigby <jrigby@gmail.com> 8 * 9 * Based on imx27lite.c: 10 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net> 11 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com> 12 * And: 13 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 * 30 */ 31 #include <common.h> 32 #include <mxc_gpio.h> 33 #include <asm/io.h> 34 #include <asm/arch/imx-regs.h> 35 #include <asm/arch/imx25-pinmux.h> 36 37 DECLARE_GLOBAL_DATA_PTR; 38 39 int board_init() 40 { 41 struct iomuxc_mux_ctl *muxctl; 42 struct iomuxc_pad_ctl *padctl; 43 struct iomuxc_pad_input_select *inputselect; 44 u32 gpio_mux_mode0_sion = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION; 45 u32 gpio_mux_mode1 = MX25_PIN_MUX_MODE(1); 46 u32 gpio_mux_mode5 = MX25_PIN_MUX_MODE(5); 47 u32 gpio_mux_mode6 = MX25_PIN_MUX_MODE(6); 48 u32 input_select1 = MX25_PAD_INPUT_SELECT_DAISY(1); 49 u32 input_select2 = MX25_PAD_INPUT_SELECT_DAISY(2); 50 51 icache_enable(); 52 53 muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; 54 padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; 55 inputselect = (struct iomuxc_pad_input_select *)IMX_IOPADINPUTSEL_BASE; 56 57 /* Setup of core volatage selection pin to run at 1.4V */ 58 writel(gpio_mux_mode5, &muxctl->pad_ext_armclk); /* VCORE GPIO3[15] */ 59 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(3, 15), MXC_GPIO_DIRECTION_OUT); 60 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(3, 15), 1); 61 62 /* Setup of input daisy chains for SD card pins*/ 63 writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd); 64 writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_clk); 65 writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data0); 66 writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data1); 67 writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data2); 68 writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data3); 69 70 /* Setup of digital output for USB power and OC */ 71 writel(gpio_mux_mode5, &muxctl->pad_csi_d3); /* USB Power GPIO1[28] */ 72 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 28), MXC_GPIO_DIRECTION_OUT); 73 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 28), 1); 74 75 writel(gpio_mux_mode5, &muxctl->pad_csi_d2); /* USB OC GPIO1[27] */ 76 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 18), MXC_GPIO_DIRECTION_IN); 77 78 /* Setup of digital output control pins */ 79 writel(gpio_mux_mode5, &muxctl->pad_csi_d8); /* Ouput 1 Ctrl GPIO1[7] */ 80 writel(gpio_mux_mode5, &muxctl->pad_csi_d7); /* Ouput 2 Ctrl GPIO1[6] */ 81 writel(gpio_mux_mode5, &muxctl->pad_csi_d6); /* Ouput 1 Stat GPIO1[31]*/ 82 writel(gpio_mux_mode5, &muxctl->pad_csi_d5); /* Ouput 2 Stat GPIO1[30]*/ 83 84 writel(0, &padctl->pad_csi_d6); /* Ouput 1 Stat pull up off */ 85 writel(0, &padctl->pad_csi_d5); /* Ouput 2 Stat pull up off */ 86 87 /* Switch both output drivers off */ 88 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 7), 0); 89 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 7), MXC_GPIO_DIRECTION_OUT); 90 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 6), 0); 91 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 6), MXC_GPIO_DIRECTION_OUT); 92 93 /* Setup of key input pin GPIO2[29]*/ 94 writel(gpio_mux_mode5 | MX25_PIN_MUX_SION, &muxctl->pad_kpp_row0); 95 writel(0, &padctl->pad_kpp_row0); /* Key pull up off */ 96 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(2, 29), MXC_GPIO_DIRECTION_IN); 97 98 /* Setup of status LED outputs */ 99 writel(gpio_mux_mode5, &muxctl->pad_csi_d9); /* GPIO4[21] */ 100 writel(gpio_mux_mode5, &muxctl->pad_csi_d4); /* GPIO1[29] */ 101 102 /* Switch both LEDs off */ 103 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(4, 21), 0); 104 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(4, 21), MXC_GPIO_DIRECTION_OUT); 105 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 29), 0); 106 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 29), MXC_GPIO_DIRECTION_OUT); 107 108 /* Setup of CAN1 and CAN2 signals */ 109 writel(gpio_mux_mode6, &muxctl->pad_gpio_a); /* CAN1 TX */ 110 writel(gpio_mux_mode6, &muxctl->pad_gpio_b); /* CAN1 RX */ 111 writel(gpio_mux_mode6, &muxctl->pad_gpio_c); /* CAN2 TX */ 112 writel(gpio_mux_mode6, &muxctl->pad_gpio_d); /* CAN2 RX */ 113 114 /* Setup of input daisy chains for CAN signals*/ 115 writel(input_select1, &inputselect->can1_ipp_ind_canrx); /* CAN1 RX */ 116 writel(input_select1, &inputselect->can2_ipp_ind_canrx); /* CAN2 RX */ 117 118 /* Setup of I2C3 signals */ 119 writel(gpio_mux_mode1, &muxctl->pad_cspi1_ss1); /* I2C3 SDA */ 120 writel(gpio_mux_mode1, &muxctl->pad_gpio_e); /* I2C3 SCL */ 121 122 /* Setup of input daisy chains for I2C3 signals*/ 123 writel(input_select1, &inputselect->i2c3_ipp_sda_in); /* I2C3 SDA */ 124 writel(input_select2, &inputselect->i2c3_ipp_scl_in); /* I2C3 SCL */ 125 126 /* board id for linux */ 127 gd->bd->bi_arch_number = MACH_TYPE_ZMX25; 128 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 129 130 return 0; 131 } 132 133 int board_late_init(void) 134 { 135 const char *e; 136 137 #ifdef CONFIG_FEC_MXC 138 struct iomuxc_mux_ctl *muxctl; 139 struct iomuxc_pad_ctl *padctl; 140 u32 gpio_mux_mode2 = MX25_PIN_MUX_MODE(2); 141 u32 gpio_mux_mode5 = MX25_PIN_MUX_MODE(5); 142 143 /* 144 * fec pin init is generic 145 */ 146 mx25_fec_init_pins(); 147 148 /* 149 * Set up LAN-RESET and FEC_RX_ERR 150 * 151 * LAN-RESET: GPIO3[16] is ALT 5 mode of pin U20 152 * FEC_RX_ERR: FEC_RX_ERR is ALT 2 mode of pin R2 153 */ 154 muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; 155 padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; 156 157 writel(gpio_mux_mode5, &muxctl->pad_upll_bypclk); 158 writel(gpio_mux_mode2, &muxctl->pad_uart2_cts); 159 160 /* assert PHY reset (low) */ 161 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(3, 16), 0); 162 mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(3, 16), MXC_GPIO_DIRECTION_OUT); 163 164 udelay(5000); 165 166 /* deassert PHY reset */ 167 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(3, 16), 1); 168 169 udelay(5000); 170 #endif 171 172 e = getenv("gs_base_board"); 173 if (e != NULL) { 174 if (strcmp(e, "G283") == 0) { 175 int key = mxc_gpio_get(MXC_GPIO_PORT_TO_NUM(2, 29)); 176 177 if (key) { 178 /* Switch on both LEDs to inidcate boot mode */ 179 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 29), 0); 180 mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(4, 21), 0); 181 182 setenv("preboot", "run gs_slow_boot"); 183 } else 184 setenv("preboot", "run gs_fast_boot"); 185 } 186 } 187 188 return 0; 189 } 190 191 int dram_init(void) 192 { 193 /* dram_init must store complete ramsize in gd->ram_size */ 194 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, 195 PHYS_SDRAM_SIZE); 196 return 0; 197 } 198 199 void dram_init_banksize(void) 200 { 201 gd->bd->bi_dram[0].start = PHYS_SDRAM; 202 gd->bd->bi_dram[0].size = gd->ram_size; 203 } 204