1 /* 2 * Copyright (C) 2017 Synopsys, Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <dwmmc.h> 9 #include <malloc.h> 10 11 DECLARE_GLOBAL_DATA_PTR; 12 13 #define CREG_BASE (ARC_PERIPHERAL_BASE + 0x1000) 14 #define CREG_PAE (CREG_BASE + 0x180) 15 #define CREG_PAE_UPDATE (CREG_BASE + 0x194) 16 #define CREG_CPU_START (CREG_BASE + 0x400) 17 18 int board_early_init_f(void) 19 { 20 /* In current chip PAE support for DMA is broken, disabling it. */ 21 writel(0, (void __iomem *) CREG_PAE); 22 23 /* Really apply settings made above */ 24 writel(1, (void __iomem *) CREG_PAE_UPDATE); 25 26 return 0; 27 } 28 29 #define SDIO_BASE (ARC_PERIPHERAL_BASE + 0xA000) 30 #define SDIO_UHS_REG_EXT (SDIO_BASE + 0x108) 31 #define SDIO_UHS_REG_EXT_DIV_2 (2 << 30) 32 33 int board_mmc_init(bd_t *bis) 34 { 35 struct dwmci_host *host = NULL; 36 37 host = malloc(sizeof(struct dwmci_host)); 38 if (!host) { 39 printf("dwmci_host malloc fail!\n"); 40 return 1; 41 } 42 43 /* 44 * Switch SDIO external ciu clock divider from default div-by-8 to 45 * minimum possible div-by-2. 46 */ 47 writel(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *) SDIO_UHS_REG_EXT); 48 49 memset(host, 0, sizeof(struct dwmci_host)); 50 host->name = "Synopsys Mobile storage"; 51 host->ioaddr = (void *)ARC_DWMMC_BASE; 52 host->buswidth = 4; 53 host->dev_index = 0; 54 host->bus_hz = 50000000; 55 56 add_dwmci(host, host->bus_hz / 2, 400000); 57 58 return 0; 59 } 60 61 #define RESET_VECTOR_ADDR 0x0 62 63 void smp_set_core_boot_addr(unsigned long addr, int corenr) 64 { 65 /* All cores have reset vector pointing to 0 */ 66 writel(addr, (void __iomem *)RESET_VECTOR_ADDR); 67 68 /* Make sure other cores see written value in memory */ 69 flush_dcache_all(); 70 } 71 72 void smp_kick_all_cpus(void) 73 { 74 #define BITS_START_CORE1 1 75 #define BITS_START_CORE2 2 76 #define BITS_START_CORE3 3 77 78 int cmd = readl((void __iomem *)CREG_CPU_START); 79 80 cmd |= (1 << BITS_START_CORE1) | 81 (1 << BITS_START_CORE2) | 82 (1 << BITS_START_CORE3); 83 writel(cmd, (void __iomem *)CREG_CPU_START); 84 } 85