1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2018 Synopsys, Inc. All rights reserved. 4 * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> 5 */ 6 7 #ifndef __BOARD_CLK_LIB_H 8 #define __BOARD_CLK_LIB_H 9 10 #include <common.h> 11 12 enum clk_ctl_ops { 13 CLK_SET = BIT(0), /* set frequency */ 14 CLK_GET = BIT(1), /* get frequency */ 15 CLK_ON = BIT(2), /* enable clock */ 16 CLK_OFF = BIT(3), /* disable clock */ 17 CLK_PRINT = BIT(4), /* print frequency */ 18 CLK_MHZ = BIT(5) /* all values in MHZ instead of HZ */ 19 }; 20 21 /* 22 * Depending on the clk_ctl_ops enable / disable / 23 * set clock rate from 'rate' argument / read clock to 'rate' argument / 24 * print clock rate. If CLK_MHZ flag set in clk_ctl_ops 'rate' is in MHz, 25 * otherwise - in Hz. 26 * 27 * This function expects "clk-fmeas" node in device tree: 28 * / { 29 * clk-fmeas { 30 * clocks = <&cpu_pll>, <&sys_pll>; 31 * clock-names = "cpu-pll", "sys-pll"; 32 * }; 33 * }; 34 */ 35 int soc_clk_ctl(const char *name, ulong *rate, enum clk_ctl_ops ctl); 36 37 #endif /* __BOARD_CLK_LIB_H */ 38