18ffc487cSHans de Goede #include <common.h> 28ffc487cSHans de Goede #include <asm/arch/dram.h> 38ffc487cSHans de Goede 48ffc487cSHans de Goede static struct dram_para dram_para = { 58ffc487cSHans de Goede .clock = CONFIG_DRAM_CLK, 68ffc487cSHans de Goede .type = 3, 78ffc487cSHans de Goede .rank_num = 1, 88ffc487cSHans de Goede .density = 0, 98ffc487cSHans de Goede .io_width = 0, 108ffc487cSHans de Goede .bus_width = 0, 118ffc487cSHans de Goede .zq = CONFIG_DRAM_ZQ, 128ffc487cSHans de Goede .odt_en = 0, 138ffc487cSHans de Goede .size = 0, 14*d133647aSSiarhei Siamashka #ifdef CONFIG_DRAM_TIMINGS_VENDOR_MAGIC 15*d133647aSSiarhei Siamashka .cas = 6, 168ffc487cSHans de Goede .tpr0 = 0x30926692, 178ffc487cSHans de Goede .tpr1 = 0x1090, 188ffc487cSHans de Goede .tpr2 = 0x1a0c8, 19*d133647aSSiarhei Siamashka .emr2 = 0, 20*d133647aSSiarhei Siamashka #else 21*d133647aSSiarhei Siamashka # include "dram_timings_sun4i.h" 22*d133647aSSiarhei Siamashka #endif 238ffc487cSHans de Goede .tpr3 = 0, 248ffc487cSHans de Goede .tpr4 = 0, 258ffc487cSHans de Goede .tpr5 = 0, 268ffc487cSHans de Goede .emr1 = CONFIG_DRAM_EMR1, 278ffc487cSHans de Goede .emr3 = 0, 288ffc487cSHans de Goede }; 298ffc487cSHans de Goede 308ffc487cSHans de Goede unsigned long sunxi_dram_init(void) 318ffc487cSHans de Goede { 328ffc487cSHans de Goede return dramc_init(&dram_para); 338ffc487cSHans de Goede } 34