1 /* 2 * (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net> 3 * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net> 4 * 5 * (C) Copyright 2007-2011 6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 7 * Tom Cubie <tangliang@allwinnertech.com> 8 * 9 * Some board init for the Allwinner A10-evb board. 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 14 #include <common.h> 15 #include <asm/arch/clock.h> 16 #include <asm/arch/dram.h> 17 #include <asm/arch/gpio.h> 18 #include <asm/arch/mmc.h> 19 20 DECLARE_GLOBAL_DATA_PTR; 21 22 /* add board specific code here */ 23 int board_init(void) 24 { 25 int id_pfr1; 26 27 gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100); 28 29 asm volatile("mrc p15, 0, %0, c0, c1, 1" : "=r"(id_pfr1)); 30 debug("id_pfr1: 0x%08x\n", id_pfr1); 31 /* Generic Timer Extension available? */ 32 if ((id_pfr1 >> 16) & 0xf) { 33 debug("Setting CNTFRQ\n"); 34 /* CNTFRQ == 24 MHz */ 35 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r"(24000000)); 36 } 37 38 return 0; 39 } 40 41 int dram_init(void) 42 { 43 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_0, PHYS_SDRAM_0_SIZE); 44 45 return 0; 46 } 47 48 #ifdef CONFIG_GENERIC_MMC 49 static void mmc_pinmux_setup(int sdc) 50 { 51 unsigned int pin; 52 53 switch (sdc) { 54 case 0: 55 /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */ 56 for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { 57 sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0); 58 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); 59 sunxi_gpio_set_drv(pin, 2); 60 } 61 break; 62 63 case 1: 64 /* CMD-PH22, CLK-PH23, D0~D3-PH24~27 : 5 */ 65 for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) { 66 sunxi_gpio_set_cfgpin(pin, SUN4I_GPH22_SDC1); 67 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); 68 sunxi_gpio_set_drv(pin, 2); 69 } 70 break; 71 72 case 2: 73 /* CMD-PC6, CLK-PC7, D0-PC8, D1-PC9, D2-PC10, D3-PC11 */ 74 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { 75 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC6_SDC2); 76 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); 77 sunxi_gpio_set_drv(pin, 2); 78 } 79 break; 80 81 case 3: 82 /* CMD-PI4, CLK-PI5, D0~D3-PI6~9 : 2 */ 83 for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) { 84 sunxi_gpio_set_cfgpin(pin, SUN4I_GPI4_SDC3); 85 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); 86 sunxi_gpio_set_drv(pin, 2); 87 } 88 break; 89 90 default: 91 printf("sunxi: invalid MMC slot %d for pinmux setup\n", sdc); 92 break; 93 } 94 } 95 96 int board_mmc_init(bd_t *bis) 97 { 98 mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT); 99 sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT); 100 #if !defined (CONFIG_SPL_BUILD) && defined (CONFIG_MMC_SUNXI_SLOT_EXTRA) 101 mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA); 102 sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA); 103 #endif 104 105 return 0; 106 } 107 #endif 108 109 #ifdef CONFIG_SPL_BUILD 110 void sunxi_board_init(void) 111 { 112 unsigned long ramsize; 113 114 printf("DRAM:"); 115 ramsize = sunxi_dram_init(); 116 printf(" %lu MiB\n", ramsize >> 20); 117 if (!ramsize) 118 hang(); 119 } 120 #endif 121