1 /* 2 * (C) Copyright 2014 3 * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <miiphy.h> 10 #include <asm/arch/stv0991_periph.h> 11 #include <asm/arch/stv0991_defs.h> 12 #include <asm/arch/hardware.h> 13 #include <asm/arch/gpio.h> 14 #include <netdev.h> 15 #include <asm/io.h> 16 #include <dm/platdata.h> 17 #include <dm/platform_data/serial_pl01x.h> 18 19 DECLARE_GLOBAL_DATA_PTR; 20 21 struct gpio_regs *const gpioa_regs = 22 (struct gpio_regs *) GPIOA_BASE_ADDR; 23 24 #ifndef CONFIG_OF_CONTROL 25 static const struct pl01x_serial_platdata serial_platdata = { 26 .base = 0x80406000, 27 .type = TYPE_PL011, 28 .clock = 2700 * 1000, 29 }; 30 31 U_BOOT_DEVICE(stv09911_serials) = { 32 .name = "serial_pl01x", 33 .platdata = &serial_platdata, 34 }; 35 #endif 36 37 #ifdef CONFIG_SHOW_BOOT_PROGRESS 38 void show_boot_progress(int progress) 39 { 40 printf("%i\n", progress); 41 } 42 #endif 43 44 void enable_eth_phy(void) 45 { 46 /* Set GPIOA_06 pad HIGH (Appli board)*/ 47 writel(readl(&gpioa_regs->dir) | 0x40, &gpioa_regs->dir); 48 writel(readl(&gpioa_regs->data) | 0x40, &gpioa_regs->data); 49 } 50 int board_eth_enable(void) 51 { 52 stv0991_pinmux_config(ETH_GPIOB_10_31_C_0_4); 53 clock_setup(ETH_CLOCK_CFG); 54 enable_eth_phy(); 55 return 0; 56 } 57 58 /* 59 * Miscellaneous platform dependent initialisations 60 */ 61 int board_init(void) 62 { 63 board_eth_enable(); 64 return 0; 65 } 66 67 int board_uart_init(void) 68 { 69 stv0991_pinmux_config(UART_GPIOC_30_31); 70 clock_setup(UART_CLOCK_CFG); 71 return 0; 72 } 73 74 #ifdef CONFIG_BOARD_EARLY_INIT_F 75 int board_early_init_f(void) 76 { 77 board_uart_init(); 78 return 0; 79 } 80 #endif 81 82 int dram_init(void) 83 { 84 gd->ram_size = PHYS_SDRAM_1_SIZE; 85 return 0; 86 } 87 88 void dram_init_banksize(void) 89 { 90 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 91 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 92 } 93 94 #ifdef CONFIG_CMD_NET 95 int board_eth_init(bd_t *bis) 96 { 97 int ret = 0; 98 99 #if defined(CONFIG_ETH_DESIGNWARE) 100 u32 interface = PHY_INTERFACE_MODE_MII; 101 if (designware_initialize(GMAC_BASE_ADDR, interface) >= 0) 102 ret++; 103 #endif 104 return ret; 105 } 106 #endif 107