1 /*
2  * (C) Copyright 2016
3  * Vikas Manocha, <vikas.manocha@st.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <dm.h>
10 #include <ram.h>
11 #include <asm/io.h>
12 #include <asm/armv7m.h>
13 #include <asm/arch/stm32.h>
14 #include <asm/arch/gpio.h>
15 #include <dm/platdata.h>
16 #include <dm/platform_data/serial_stm32x7.h>
17 #include <asm/arch/stm32_periph.h>
18 #include <asm/arch/stm32_defs.h>
19 #include <asm/arch/syscfg.h>
20 #include <asm/gpio.h>
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
25 {
26 	int mr_node;
27 
28 	mr_node = fdt_path_offset(gd->fdt_blob, "/memory");
29 	if (mr_node < 0)
30 		return mr_node;
31 	*mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node,
32 						      "reg", 0, mr_size, false);
33 	debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size);
34 
35 	return 0;
36 }
37 int dram_init(void)
38 {
39 	struct udevice *dev;
40 	int rv;
41 	fdt_addr_t mr_base, mr_size;
42 
43 	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
44 	if (rv) {
45 		debug("DRAM init failed: %d\n", rv);
46 		return rv;
47 	}
48 
49 	rv = get_memory_base_size(&mr_base, &mr_size);
50 	if (rv)
51 		return rv;
52 	gd->ram_size = mr_size;
53 	gd->ram_top = mr_base;
54 
55 	return rv;
56 }
57 
58 int dram_init_banksize(void)
59 {
60 	fdt_addr_t mr_base, mr_size;
61 	get_memory_base_size(&mr_base, &mr_size);
62 	/*
63 	 * Fill in global info with description of SRAM configuration
64 	 */
65 	gd->bd->bi_dram[0].start = mr_base;
66 	gd->bd->bi_dram[0].size  = mr_size;
67 
68 	return 0;
69 }
70 
71 #ifdef CONFIG_ETH_DESIGNWARE
72 static int stmmac_setup(void)
73 {
74 	clock_setup(SYSCFG_CLOCK_CFG);
75 	/* Set >RMII mode */
76 	STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
77 	clock_setup(STMMAC_CLOCK_CFG);
78 
79 	return 0;
80 }
81 
82 int board_early_init_f(void)
83 {
84 	stmmac_setup();
85 
86 	return 0;
87 }
88 #endif
89 
90 u32 get_board_rev(void)
91 {
92 	return 0;
93 }
94 
95 int board_late_init(void)
96 {
97 	struct gpio_desc gpio = {};
98 	int node;
99 
100 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
101 	if (node < 0)
102 		return -1;
103 
104 	gpio_request_by_name_nodev(gd->fdt_blob, node, "led-gpio", 0, &gpio,
105 				   GPIOD_IS_OUT);
106 
107 	if (dm_gpio_is_valid(&gpio)) {
108 		dm_gpio_set_value(&gpio, 0);
109 		mdelay(10);
110 		dm_gpio_set_value(&gpio, 1);
111 	}
112 
113 	/* read button 1*/
114 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
115 	if (node < 0)
116 		return -1;
117 
118 	gpio_request_by_name_nodev(gd->fdt_blob, node, "button-gpio", 0, &gpio,
119 				   GPIOD_IS_IN);
120 
121 	if (dm_gpio_is_valid(&gpio)) {
122 		if (dm_gpio_get_value(&gpio))
123 			puts("usr button is at HIGH LEVEL\n");
124 		else
125 			puts("usr button is at LOW LEVEL\n");
126 	}
127 
128 	return 0;
129 }
130 
131 int board_init(void)
132 {
133 	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
134 	return 0;
135 }
136