1 /*
2  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
3  * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <dm.h>
10 #include <ram.h>
11 #include <spl.h>
12 #include <asm/io.h>
13 #include <asm/armv7m.h>
14 #include <asm/arch/stm32.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/syscfg.h>
17 #include <asm/gpio.h>
18 
19 DECLARE_GLOBAL_DATA_PTR;
20 
21 int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
22 {
23 	int mr_node;
24 
25 	mr_node = fdt_path_offset(gd->fdt_blob, "/memory");
26 	if (mr_node < 0)
27 		return mr_node;
28 	*mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node,
29 						      "reg", 0, mr_size, false);
30 	debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size);
31 
32 	return 0;
33 }
34 int dram_init(void)
35 {
36 	int rv;
37 	fdt_addr_t mr_base, mr_size;
38 
39 #ifndef CONFIG_SUPPORT_SPL
40 	struct udevice *dev;
41 	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
42 	if (rv) {
43 		debug("DRAM init failed: %d\n", rv);
44 		return rv;
45 	}
46 
47 #endif
48 	rv = get_memory_base_size(&mr_base, &mr_size);
49 	if (rv)
50 		return rv;
51 	gd->ram_size = mr_size;
52 	gd->ram_top = mr_base;
53 
54 	return rv;
55 }
56 
57 int dram_init_banksize(void)
58 {
59 	fdt_addr_t mr_base, mr_size;
60 	get_memory_base_size(&mr_base, &mr_size);
61 	/*
62 	 * Fill in global info with description of SRAM configuration
63 	 */
64 	gd->bd->bi_dram[0].start = mr_base;
65 	gd->bd->bi_dram[0].size  = mr_size;
66 
67 	return 0;
68 }
69 
70 int board_early_init_f(void)
71 {
72 	return 0;
73 }
74 
75 #ifdef CONFIG_SPL_BUILD
76 #ifdef CONFIG_SPL_OS_BOOT
77 int spl_start_uboot(void)
78 {
79 	debug("SPL: booting kernel\n");
80 	/* break into full u-boot on 'c' */
81 	return serial_tstc() && serial_getc() == 'c';
82 }
83 #endif
84 
85 int spl_dram_init(void)
86 {
87 	struct udevice *dev;
88 	int rv;
89 	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
90 	if (rv)
91 		debug("DRAM init failed: %d\n", rv);
92 	return rv;
93 }
94 void spl_board_init(void)
95 {
96 	spl_dram_init();
97 	preloader_console_init();
98 	arch_cpu_init(); /* to configure mpu for sdram rw permissions */
99 }
100 u32 spl_boot_device(void)
101 {
102 	return BOOT_DEVICE_XIP;
103 }
104 
105 #endif
106 u32 get_board_rev(void)
107 {
108 	return 0;
109 }
110 
111 int board_late_init(void)
112 {
113 	struct gpio_desc gpio = {};
114 	int node;
115 
116 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
117 	if (node < 0)
118 		return -1;
119 
120 	gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
121 				   GPIOD_IS_OUT);
122 
123 	if (dm_gpio_is_valid(&gpio)) {
124 		dm_gpio_set_value(&gpio, 0);
125 		mdelay(10);
126 		dm_gpio_set_value(&gpio, 1);
127 	}
128 
129 	/* read button 1*/
130 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
131 	if (node < 0)
132 		return -1;
133 
134 	gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
135 				   &gpio, GPIOD_IS_IN);
136 
137 	if (dm_gpio_is_valid(&gpio)) {
138 		if (dm_gpio_get_value(&gpio))
139 			puts("usr button is at HIGH LEVEL\n");
140 		else
141 			puts("usr button is at LOW LEVEL\n");
142 	}
143 
144 	return 0;
145 }
146 
147 int board_init(void)
148 {
149 	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
150 
151 #ifdef CONFIG_ETH_DESIGNWARE
152 	/* Set >RMII mode */
153 	STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
154 #endif
155 
156 	return 0;
157 }
158