1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. 5 */ 6 7 #include <common.h> 8 #include <dm.h> 9 #include <lcd.h> 10 #include <ram.h> 11 #include <spl.h> 12 #include <splash.h> 13 #include <st_logo_data.h> 14 #include <video.h> 15 #include <asm/io.h> 16 #include <asm/armv7m.h> 17 #include <asm/arch/stm32.h> 18 #include <asm/arch/gpio.h> 19 #include <asm/arch/syscfg.h> 20 #include <asm/gpio.h> 21 22 DECLARE_GLOBAL_DATA_PTR; 23 24 int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size) 25 { 26 int mr_node; 27 28 mr_node = fdt_path_offset(gd->fdt_blob, "/memory"); 29 if (mr_node < 0) 30 return mr_node; 31 *mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node, 32 "reg", 0, mr_size, false); 33 debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size); 34 35 return 0; 36 } 37 int dram_init(void) 38 { 39 int rv; 40 fdt_addr_t mr_base, mr_size; 41 42 #ifndef CONFIG_SUPPORT_SPL 43 struct udevice *dev; 44 rv = uclass_get_device(UCLASS_RAM, 0, &dev); 45 if (rv) { 46 debug("DRAM init failed: %d\n", rv); 47 return rv; 48 } 49 50 #endif 51 rv = get_memory_base_size(&mr_base, &mr_size); 52 if (rv) 53 return rv; 54 gd->ram_size = mr_size; 55 gd->ram_top = mr_base; 56 57 return rv; 58 } 59 60 int dram_init_banksize(void) 61 { 62 fdt_addr_t mr_base, mr_size; 63 get_memory_base_size(&mr_base, &mr_size); 64 /* 65 * Fill in global info with description of SRAM configuration 66 */ 67 gd->bd->bi_dram[0].start = mr_base; 68 gd->bd->bi_dram[0].size = mr_size; 69 70 return 0; 71 } 72 73 int board_early_init_f(void) 74 { 75 return 0; 76 } 77 78 #ifdef CONFIG_SPL_BUILD 79 #ifdef CONFIG_SPL_OS_BOOT 80 int spl_start_uboot(void) 81 { 82 debug("SPL: booting kernel\n"); 83 /* break into full u-boot on 'c' */ 84 return serial_tstc() && serial_getc() == 'c'; 85 } 86 #endif 87 88 int spl_dram_init(void) 89 { 90 struct udevice *dev; 91 int rv; 92 rv = uclass_get_device(UCLASS_RAM, 0, &dev); 93 if (rv) 94 debug("DRAM init failed: %d\n", rv); 95 return rv; 96 } 97 void spl_board_init(void) 98 { 99 spl_dram_init(); 100 preloader_console_init(); 101 arch_cpu_init(); /* to configure mpu for sdram rw permissions */ 102 } 103 u32 spl_boot_device(void) 104 { 105 return BOOT_DEVICE_XIP; 106 } 107 108 #endif 109 u32 get_board_rev(void) 110 { 111 return 0; 112 } 113 114 int board_late_init(void) 115 { 116 struct gpio_desc gpio = {}; 117 int node; 118 119 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1"); 120 if (node < 0) 121 return -1; 122 123 gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio, 124 GPIOD_IS_OUT); 125 126 if (dm_gpio_is_valid(&gpio)) { 127 dm_gpio_set_value(&gpio, 0); 128 mdelay(10); 129 dm_gpio_set_value(&gpio, 1); 130 } 131 132 /* read button 1*/ 133 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1"); 134 if (node < 0) 135 return -1; 136 137 gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0, 138 &gpio, GPIOD_IS_IN); 139 140 if (dm_gpio_is_valid(&gpio)) { 141 if (dm_gpio_get_value(&gpio)) 142 puts("usr button is at HIGH LEVEL\n"); 143 else 144 puts("usr button is at LOW LEVEL\n"); 145 } 146 147 return 0; 148 } 149 150 int board_init(void) 151 { 152 gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; 153 154 #ifdef CONFIG_ETH_DESIGNWARE 155 /* Set >RMII mode */ 156 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL; 157 #endif 158 159 #if defined(CONFIG_CMD_BMP) 160 bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle, 161 BMP_ALIGN_CENTER, BMP_ALIGN_CENTER); 162 #endif /* CONFIG_CMD_BMP */ 163 164 return 0; 165 } 166