1 /*
2  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
3  * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <dm.h>
10 #include <ram.h>
11 #include <spl.h>
12 #include <asm/io.h>
13 #include <asm/armv7m.h>
14 #include <asm/arch/stm32.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/stm32_periph.h>
17 #include <asm/arch/syscfg.h>
18 #include <asm/gpio.h>
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
22 int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
23 {
24 	int mr_node;
25 
26 	mr_node = fdt_path_offset(gd->fdt_blob, "/memory");
27 	if (mr_node < 0)
28 		return mr_node;
29 	*mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node,
30 						      "reg", 0, mr_size, false);
31 	debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size);
32 
33 	return 0;
34 }
35 int dram_init(void)
36 {
37 	int rv;
38 	fdt_addr_t mr_base, mr_size;
39 
40 #ifndef CONFIG_SUPPORT_SPL
41 	struct udevice *dev;
42 	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
43 	if (rv) {
44 		debug("DRAM init failed: %d\n", rv);
45 		return rv;
46 	}
47 
48 #endif
49 	rv = get_memory_base_size(&mr_base, &mr_size);
50 	if (rv)
51 		return rv;
52 	gd->ram_size = mr_size;
53 	gd->ram_top = mr_base;
54 
55 	return rv;
56 }
57 
58 int dram_init_banksize(void)
59 {
60 	fdt_addr_t mr_base, mr_size;
61 	get_memory_base_size(&mr_base, &mr_size);
62 	/*
63 	 * Fill in global info with description of SRAM configuration
64 	 */
65 	gd->bd->bi_dram[0].start = mr_base;
66 	gd->bd->bi_dram[0].size  = mr_size;
67 
68 	return 0;
69 }
70 
71 int board_early_init_f(void)
72 {
73 	return 0;
74 }
75 
76 #ifdef CONFIG_SPL_BUILD
77 #ifdef CONFIG_SPL_OS_BOOT
78 int spl_start_uboot(void)
79 {
80 	debug("SPL: booting kernel\n");
81 	/* break into full u-boot on 'c' */
82 	return serial_tstc() && serial_getc() == 'c';
83 }
84 #endif
85 
86 int spl_dram_init(void)
87 {
88 	struct udevice *dev;
89 	int rv;
90 	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
91 	if (rv)
92 		debug("DRAM init failed: %d\n", rv);
93 	return rv;
94 }
95 void spl_board_init(void)
96 {
97 	spl_dram_init();
98 	preloader_console_init();
99 	arch_cpu_init(); /* to configure mpu for sdram rw permissions */
100 }
101 u32 spl_boot_device(void)
102 {
103 	return BOOT_DEVICE_XIP;
104 }
105 
106 #endif
107 u32 get_board_rev(void)
108 {
109 	return 0;
110 }
111 
112 int board_late_init(void)
113 {
114 	struct gpio_desc gpio = {};
115 	int node;
116 
117 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
118 	if (node < 0)
119 		return -1;
120 
121 	gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
122 				   GPIOD_IS_OUT);
123 
124 	if (dm_gpio_is_valid(&gpio)) {
125 		dm_gpio_set_value(&gpio, 0);
126 		mdelay(10);
127 		dm_gpio_set_value(&gpio, 1);
128 	}
129 
130 	/* read button 1*/
131 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
132 	if (node < 0)
133 		return -1;
134 
135 	gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
136 				   &gpio, GPIOD_IS_IN);
137 
138 	if (dm_gpio_is_valid(&gpio)) {
139 		if (dm_gpio_get_value(&gpio))
140 			puts("usr button is at HIGH LEVEL\n");
141 		else
142 			puts("usr button is at LOW LEVEL\n");
143 	}
144 
145 	return 0;
146 }
147 
148 int board_init(void)
149 {
150 	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
151 
152 #ifdef CONFIG_ETH_DESIGNWARE
153 	/* Set >RMII mode */
154 	STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
155 #endif
156 
157 	return 0;
158 }
159