1 /* 2 * (C) Copyright 2009 3 * Ryan Chen, ST Micoelectronics, ryan.chen@st.com. 4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <common.h> 10 #include <miiphy.h> 11 #include <netdev.h> 12 #include <nand.h> 13 #include <asm/io.h> 14 #include <linux/mtd/fsmc_nand.h> 15 #include <asm/arch/hardware.h> 16 #include <asm/arch/spr_defs.h> 17 #include <asm/arch/spr_misc.h> 18 19 #define PLGPIO_SEL_36 0xb3000028 20 #define PLGPIO_IO_36 0xb3000038 21 22 static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; 23 24 static void spear_phy_reset(void) 25 { 26 writel(0x10, PLGPIO_IO_36); 27 writel(0x10, PLGPIO_SEL_36); 28 } 29 30 int board_init(void) 31 { 32 spear_phy_reset(); 33 return spear_board_init(MACH_TYPE_SPEAR320); 34 } 35 36 /* 37 * board_nand_init - Board specific NAND initialization 38 * @nand: mtd private chip structure 39 * 40 * Called by nand_init_chip to initialize the board specific functions 41 */ 42 43 void board_nand_init() 44 { 45 struct misc_regs *const misc_regs_p = 46 (struct misc_regs *)CONFIG_SPEAR_MISCBASE; 47 struct nand_chip *nand = &nand_chip[0]; 48 49 #if defined(CONFIG_NAND_FSMC) 50 if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == 51 MISC_SOCCFG30) || 52 ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == 53 MISC_SOCCFG31)) { 54 55 fsmc_nand_init(nand); 56 } 57 #endif 58 59 return; 60 } 61 62 int board_eth_init(bd_t *bis) 63 { 64 int ret = 0; 65 66 #if defined(CONFIG_DESIGNWARE_ETH) 67 u32 interface = PHY_INTERFACE_MODE_MII; 68 if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0) 69 ret++; 70 #endif 71 #if defined(CONFIG_MACB) 72 if (macb_eth_initialize(0, (void *)CONFIG_SYS_MACB0_BASE, 73 CONFIG_MACB0_PHY) >= 0) 74 ret++; 75 #endif 76 return ret; 77 } 78