xref: /openbmc/u-boot/board/spear/spear320/spear320.c (revision 00a2749d)
1 /*
2  * (C) Copyright 2009
3  * Ryan Chen, ST Micoelectronics, ryan.chen@st.com.
4  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24 
25 #include <common.h>
26 #include <miiphy.h>
27 #include <netdev.h>
28 #include <nand.h>
29 #include <asm/io.h>
30 #include <linux/mtd/fsmc_nand.h>
31 #include <asm/arch/hardware.h>
32 #include <asm/arch/spr_defs.h>
33 #include <asm/arch/spr_misc.h>
34 
35 #define PLGPIO_SEL_36	0xb3000028
36 #define PLGPIO_IO_36	0xb3000038
37 
38 static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
39 
40 static void spear_phy_reset(void)
41 {
42 	writel(0x10, PLGPIO_IO_36);
43 	writel(0x10, PLGPIO_SEL_36);
44 }
45 
46 int board_init(void)
47 {
48 	spear_phy_reset();
49 	return spear_board_init(MACH_TYPE_SPEAR320);
50 }
51 
52 /*
53  * board_nand_init - Board specific NAND initialization
54  * @nand:	mtd private chip structure
55  *
56  * Called by nand_init_chip to initialize the board specific functions
57  */
58 
59 void board_nand_init()
60 {
61 	struct misc_regs *const misc_regs_p =
62 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
63 	struct nand_chip *nand = &nand_chip[0];
64 
65 #if defined(CONFIG_NAND_FSMC)
66 	if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
67 	     MISC_SOCCFG30) ||
68 	    ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
69 	     MISC_SOCCFG31)) {
70 
71 		fsmc_nand_init(nand);
72 	}
73 #endif
74 
75 	return;
76 }
77 
78 int board_eth_init(bd_t *bis)
79 {
80 	int ret = 0;
81 
82 #if defined(CONFIG_DESIGNWARE_ETH)
83 	u32 interface = PHY_INTERFACE_MODE_MII;
84 	if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY,
85 				interface) >= 0)
86 		ret++;
87 #endif
88 #if defined(CONFIG_MACB)
89 	if (macb_eth_initialize(0, (void *)CONFIG_SYS_MACB0_BASE,
90 				CONFIG_MACB0_PHY) >= 0)
91 		ret++;
92 #endif
93 	return ret;
94 }
95