1 /* 2 * Board functions for Siemens TAURUS (AT91SAM9G20) based boards 3 * (C) Copyright Siemens AG 4 * 5 * Based on: 6 * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c 7 * 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #include <common.h> 16 #include <asm/io.h> 17 #include <asm/arch/at91sam9260_matrix.h> 18 #include <asm/arch/at91sam9_smc.h> 19 #include <asm/arch/at91_common.h> 20 #include <asm/arch/at91_pmc.h> 21 #include <asm/arch/at91_rstc.h> 22 #include <asm/arch/gpio.h> 23 #include <asm/arch/at91sam9_sdramc.h> 24 #include <atmel_mci.h> 25 26 #include <net.h> 27 #include <netdev.h> 28 29 DECLARE_GLOBAL_DATA_PTR; 30 31 #ifdef CONFIG_CMD_NAND 32 static void taurus_nand_hw_init(void) 33 { 34 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; 35 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 36 unsigned long csa; 37 38 /* Assign CS3 to NAND/SmartMedia Interface */ 39 csa = readl(&matrix->ebicsa); 40 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; 41 writel(csa, &matrix->ebicsa); 42 43 /* Configure SMC CS3 for NAND/SmartMedia */ 44 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | 45 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), 46 &smc->cs[3].setup); 47 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) | 48 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3), 49 &smc->cs[3].pulse); 50 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), 51 &smc->cs[3].cycle); 52 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | 53 AT91_SMC_MODE_EXNW_DISABLE | 54 AT91_SMC_MODE_DBW_8 | 55 AT91_SMC_MODE_TDF_CYCLE(3), 56 &smc->cs[3].mode); 57 58 /* Configure RDY/BSY */ 59 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); 60 61 /* Enable NandFlash */ 62 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); 63 } 64 #endif 65 66 #ifdef CONFIG_MACB 67 static void taurus_macb_hw_init(void) 68 { 69 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 70 71 /* Enable EMAC clock */ 72 writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); 73 74 /* 75 * Disable pull-up on: 76 * RXDV (PA17) => PHY normal mode (not Test mode) 77 * ERX0 (PA14) => PHY ADDR0 78 * ERX1 (PA15) => PHY ADDR1 79 * ERX2 (PA25) => PHY ADDR2 80 * ERX3 (PA26) => PHY ADDR3 81 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 82 * 83 * PHY has internal pull-down 84 */ 85 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0); 86 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0); 87 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0); 88 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0); 89 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0); 90 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0); 91 92 at91_phy_reset(); 93 94 at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */ 95 96 /* Re-enable pull-up */ 97 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1); 98 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); 99 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1); 100 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1); 101 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1); 102 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1); 103 104 /* Initialize EMAC=MACB hardware */ 105 at91_macb_hw_init(); 106 } 107 #endif 108 109 #ifdef CONFIG_GENERIC_ATMEL_MCI 110 int board_mmc_init(bd_t *bd) 111 { 112 at91_mci_hw_init(); 113 114 return atmel_mci_init((void *)ATMEL_BASE_MCI); 115 } 116 #endif 117 118 int board_early_init_f(void) 119 { 120 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 121 122 /* Enable clocks for all PIOs */ 123 writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | 124 (1 << ATMEL_ID_PIOC), 125 &pmc->pcer); 126 127 return 0; 128 } 129 130 int board_init(void) 131 { 132 /* adress of boot parameters */ 133 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 134 135 at91_seriald_hw_init(); 136 #ifdef CONFIG_CMD_NAND 137 taurus_nand_hw_init(); 138 #endif 139 #ifdef CONFIG_MACB 140 taurus_macb_hw_init(); 141 #endif 142 143 return 0; 144 } 145 146 int dram_init(void) 147 { 148 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 149 CONFIG_SYS_SDRAM_SIZE); 150 return 0; 151 } 152 153 int board_eth_init(bd_t *bis) 154 { 155 int rc = 0; 156 #ifdef CONFIG_MACB 157 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); 158 #endif 159 return rc; 160 } 161