xref: /openbmc/u-boot/board/siemens/corvus/board.c (revision 70ad375e)
1 /*
2  * Board functions for Siemens CORVUS (AT91SAM9G45) based board
3  * (C) Copyright 2013 Siemens AG
4  *
5  * Based on:
6  * U-Boot file: board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
7  * (C) Copyright 2007-2008
8  * Stelian Pop <stelian@popies.net>
9  * Lead Tech Design <www.leadtechdesign.com>
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 
14 
15 #include <common.h>
16 #include <asm/io.h>
17 #include <asm/arch/at91sam9g45_matrix.h>
18 #include <asm/arch/at91sam9_smc.h>
19 #include <asm/arch/at91_common.h>
20 #include <asm/arch/at91_pmc.h>
21 #include <asm/arch/at91_rstc.h>
22 #include <asm/arch/gpio.h>
23 #include <asm/arch/clk.h>
24 #include <lcd.h>
25 #include <atmel_lcdc.h>
26 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
27 #include <net.h>
28 #endif
29 #include <netdev.h>
30 #include <spi.h>
31 
32 DECLARE_GLOBAL_DATA_PTR;
33 
34 #ifdef CONFIG_CMD_NAND
35 static void corvus_nand_hw_init(void)
36 {
37 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
38 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
39 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
40 	unsigned long csa;
41 
42 	/* Enable CS3 */
43 	csa = readl(&matrix->ebicsa);
44 	csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
45 	writel(csa, &matrix->ebicsa);
46 
47 	/* Configure SMC CS3 for NAND/SmartMedia */
48 	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
49 	       AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
50 	       &smc->cs[3].setup);
51 	writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
52 	       AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
53 	       &smc->cs[3].pulse);
54 	writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
55 	       &smc->cs[3].cycle);
56 	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
57 	       AT91_SMC_MODE_EXNW_DISABLE |
58 #ifdef CONFIG_SYS_NAND_DBW_16
59 	       AT91_SMC_MODE_DBW_16 |
60 #else /* CONFIG_SYS_NAND_DBW_8 */
61 	       AT91_SMC_MODE_DBW_8 |
62 #endif
63 	       AT91_SMC_MODE_TDF_CYCLE(3),
64 	       &smc->cs[3].mode);
65 
66 	writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
67 
68 	/* Configure RDY/BSY */
69 	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
70 
71 	/* Enable NandFlash */
72 	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
73 }
74 #endif
75 
76 #ifdef CONFIG_CMD_USB
77 static void taurus_usb_hw_init(void)
78 {
79 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
80 
81 	writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
82 
83 	at91_set_gpio_output(AT91_PIN_PD1, 0);
84 	at91_set_gpio_output(AT91_PIN_PD3, 0);
85 }
86 #endif
87 
88 #ifdef CONFIG_MACB
89 static void corvus_macb_hw_init(void)
90 {
91 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
92 
93 	/* Enable clock */
94 	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
95 
96 	/*
97 	 * Disable pull-up on:
98 	 *      RXDV (PA15) => PHY normal mode (not Test mode)
99 	 *      ERX0 (PA12) => PHY ADDR0
100 	 *      ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
101 	 *
102 	 * PHY has internal pull-down
103 	 */
104 	at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
105 	at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
106 	at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
107 
108 	at91_phy_reset();
109 
110 	/* Re-enable pull-up */
111 	at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
112 	at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
113 	at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
114 
115 	/* And the pins. */
116 	at91_macb_hw_init();
117 }
118 #endif
119 
120 int board_early_init_f(void)
121 {
122 	at91_seriald_hw_init();
123 	return 0;
124 }
125 
126 int board_init(void)
127 {
128 	/* address of boot parameters */
129 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
130 
131 #ifdef CONFIG_CMD_NAND
132 	corvus_nand_hw_init();
133 #endif
134 #ifdef CONFIG_ATMEL_SPI
135 	at91_spi0_hw_init(1 << 4);
136 #endif
137 #ifdef CONFIG_HAS_DATAFLASH
138 	at91_spi0_hw_init(1 << 0);
139 #endif
140 #ifdef CONFIG_MACB
141 	corvus_macb_hw_init();
142 #endif
143 #ifdef CONFIG_CMD_USB
144 	taurus_usb_hw_init();
145 #endif
146 	return 0;
147 }
148 
149 int dram_init(void)
150 {
151 	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
152 				    CONFIG_SYS_SDRAM_SIZE);
153 	return 0;
154 }
155 
156 int board_eth_init(bd_t *bis)
157 {
158 	int rc = 0;
159 #ifdef CONFIG_MACB
160 	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
161 #endif
162 	return rc;
163 }
164 
165 /* SPI chip select control */
166 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
167 {
168 	return bus == 0 && cs < 2;
169 }
170 
171 void spi_cs_activate(struct spi_slave *slave)
172 {
173 	switch (slave->cs) {
174 	case 1:
175 			at91_set_gpio_output(AT91_PIN_PB18, 0);
176 			break;
177 	case 0:
178 	default:
179 			at91_set_gpio_output(AT91_PIN_PB3, 0);
180 			break;
181 	}
182 }
183 
184 void spi_cs_deactivate(struct spi_slave *slave)
185 {
186 	switch (slave->cs) {
187 	case 1:
188 			at91_set_gpio_output(AT91_PIN_PB18, 1);
189 			break;
190 	case 0:
191 	default:
192 			at91_set_gpio_output(AT91_PIN_PB3, 1);
193 			break;
194 	}
195 }
196