1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2013 Freescale Semiconductor, Inc. 4 * Copyright (C) 2015 ECA Sinters 5 * 6 * Author: Fabio Estevam <fabio.estevam@freescale.com> 7 * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com> 8 */ 9 10 #include <asm/arch/clock.h> 11 #include <asm/arch/imx-regs.h> 12 #include <asm/arch/iomux.h> 13 #include <asm/arch/mx6-pins.h> 14 #include <linux/errno.h> 15 #include <asm/gpio.h> 16 #include <asm/mach-imx/iomux-v3.h> 17 #include <asm/mach-imx/boot_mode.h> 18 #include <malloc.h> 19 #include <mmc.h> 20 #include <fsl_esdhc.h> 21 #include <miiphy.h> 22 #include <netdev.h> 23 #include <asm/arch/mxc_hdmi.h> 24 #include <asm/arch/crm_regs.h> 25 #include <linux/fb.h> 26 #include <ipu_pixfmt.h> 27 #include <asm/io.h> 28 #include <asm/arch/sys_proto.h> 29 #include <micrel.h> 30 #include <asm/mach-imx/mxc_i2c.h> 31 #include <i2c.h> 32 33 #include "../common/mx6.h" 34 35 DECLARE_GLOBAL_DATA_PTR; 36 37 int dram_init(void) 38 { 39 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); 40 41 return 0; 42 } 43 44 int board_early_init_f(void) 45 { 46 seco_mx6_setup_uart_iomux(); 47 48 return 0; 49 } 50 51 int board_phy_config(struct phy_device *phydev) 52 { 53 seco_mx6_rgmii_rework(phydev); 54 if (phydev->drv->config) 55 phydev->drv->config(phydev); 56 57 return 0; 58 } 59 60 int board_eth_init(bd_t *bis) 61 { 62 uint32_t base = IMX_FEC_BASE; 63 struct mii_dev *bus = NULL; 64 struct phy_device *phydev = NULL; 65 int ret = 0; 66 67 seco_mx6_setup_enet_iomux(); 68 69 #ifdef CONFIG_FEC_MXC 70 bus = fec_get_miibus(base, -1); 71 if (!bus) 72 return -ENOMEM; 73 74 /* scan phy 4,5,6,7 */ 75 phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); 76 if (!phydev) { 77 free(bus); 78 return -ENOMEM; 79 } 80 81 printf("using phy at %d\n", phydev->addr); 82 ret = fec_probe(bis, -1, base, bus, phydev); 83 if (ret) { 84 free(phydev); 85 free(bus); 86 printf("FEC MXC: %s:failed\n", __func__); 87 } 88 #endif 89 90 return ret; 91 } 92 93 #define USDHC4_CD_GPIO IMX_GPIO_NR(2, 6) 94 95 static struct fsl_esdhc_cfg usdhc_cfg[2] = { 96 {USDHC3_BASE_ADDR, 0, 4}, 97 {USDHC4_BASE_ADDR, 0, 4}, 98 }; 99 100 int board_mmc_getcd(struct mmc *mmc) 101 { 102 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; 103 int ret = 0; 104 105 switch (cfg->esdhc_base) { 106 case USDHC3_BASE_ADDR: 107 ret = 1; /* Assume eMMC is always present */ 108 break; 109 case USDHC4_BASE_ADDR: 110 ret = !gpio_get_value(USDHC4_CD_GPIO); 111 break; 112 } 113 114 return ret; 115 } 116 117 int board_mmc_init(bd_t *bis) 118 { 119 u32 index = 0; 120 int ret; 121 122 /* 123 * Following map is done: 124 * (U-Boot device node) (Physical Port) 125 * mmc0 eMMC on Board 126 * mmc1 Ext SD 127 */ 128 for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { 129 switch (index) { 130 case 0: 131 seco_mx6_setup_usdhc_iomux(3); 132 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); 133 break; 134 case 1: 135 seco_mx6_setup_usdhc_iomux(4); 136 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); 137 break; 138 139 default: 140 printf("Warning: %d exceed maximum number of SD ports %d\n", 141 index + 1, CONFIG_SYS_FSL_USDHC_NUM); 142 return -EINVAL; 143 } 144 145 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); 146 if (ret) 147 return ret; 148 } 149 150 return 0; 151 } 152 153 int board_init(void) 154 { 155 /* address of boot parameters */ 156 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 157 158 imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D4__GPIO2_IO04 | 159 MUX_PAD_CTRL(NO_PAD_CTRL)); 160 161 gpio_direction_output(IMX_GPIO_NR(2, 4), 0); 162 163 /* Set Low */ 164 gpio_set_value(IMX_GPIO_NR(2, 4), 0); 165 udelay(1000); 166 167 /* Set High */ 168 gpio_set_value(IMX_GPIO_NR(2, 4), 1); 169 170 return 0; 171 } 172 173 int checkboard(void) 174 { 175 puts("Board: SECO uQ7\n"); 176 177 return 0; 178 } 179