1 /*
2  * SchulerControl GmbH, SC_SPS_1 module setup
3  *
4  * Copyright (C) 2012 Marek Vasut <marex@denx.de>
5  * on behalf of DENX Software Engineering GmbH
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #include <common.h>
27 #include <config.h>
28 #include <asm/io.h>
29 #include <asm/arch/iomux-mx28.h>
30 #include <asm/arch/imx-regs.h>
31 #include <asm/arch/sys_proto.h>
32 
33 #define	MUX_CONFIG_LED	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
34 #define	MUX_CONFIG_SSP0	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
35 #define	MUX_CONFIG_SSP2	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
36 #define	MUX_CONFIG_ENET	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
37 #define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
38 
39 const iomux_cfg_t iomux_setup[] = {
40 	/* -- Strick 3 -- */
41 
42 	/* FEC Ethernet */
43 	MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
44 	MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
45 	MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
46 	MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
47 	MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
48 	MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
49 	MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
50 	MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
51 	MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
52 	MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET,
53 	MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
54 	MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
55 
56 	MX28_PAD_ENET0_TX_CLK__GPIO_4_5,	/* ENET INT */
57 
58 	MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
59 	MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET,
60 	MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
61 
62 	/* -- Strick 4 -- */
63 
64 	/* EMI */
65 	MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
66 	MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
67 	MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
68 	MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
69 	MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
70 	MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
71 	MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
72 	MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
73 	MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
74 	MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
75 	MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
76 	MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
77 	MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
78 	MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
79 	MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
80 	MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
81 	MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
82 	MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
83 	MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
84 	MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
85 	MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
86 
87 	MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
88 	MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
89 	MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
90 	MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
91 
92 	MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
93 	MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
94 	MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
95 	MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
96 	MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
97 	MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
98 	MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
99 	MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
100 	MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
101 	MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
102 	MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
103 	MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
104 	MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
105 	MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
106 	MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
107 	MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
108 
109 	MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
110 	MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
111 
112 	MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
113 	MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
114 
115 	/* -- Strick 5 -- */
116 
117 	/* MMC0 */
118 	MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
119 	MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
120 	MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
121 	MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
122 	MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
123 	MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
124 		(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
125 	MX28_PAD_SSP0_SCK__SSP0_SCK |
126 		(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
127 
128 	/* SPI2 (for flash) */
129 	MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
130 	MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
131 	MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
132 	MX28_PAD_SSP2_SS0__SSP2_D3 |
133 		(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
134 
135 	/* -- Strick 6 -- */
136 
137 	/* I2C */
138 	MX28_PAD_I2C0_SCL__I2C0_SCL,
139 	MX28_PAD_I2C0_SDA__I2C0_SDA,
140 
141 	/* AUART0 */
142 	MX28_PAD_AUART0_TX__AUART0_TX,
143 	MX28_PAD_AUART0_RX__AUART0_RX,
144 
145 	/* MEGA interface */
146 
147 	/* Debug UART */
148 	MX28_PAD_PWM0__DUART_RX,
149 	MX28_PAD_PWM1__DUART_TX,
150 
151 	/* LED */
152 	MX28_PAD_GPMI_D00__GPIO_0_0 | MUX_CONFIG_LED,
153 	MX28_PAD_GPMI_D03__GPIO_0_3 | MUX_CONFIG_LED,
154 	MX28_PAD_GPMI_D06__GPIO_0_6 | MUX_CONFIG_LED,
155 };
156 
157 void board_init_ll(void)
158 {
159 	mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
160 }
161 
162 void mxs_adjust_memory_params(uint32_t *dram_vals)
163 {
164 	dram_vals[0x74 >> 2] = 0x0f02010a;
165 }
166