xref: /openbmc/u-boot/board/sbc8641d/ddr.c (revision ea0364f1)
1 /*
2  * Copyright 2008 Freescale Semiconductor, Inc.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * Version 2 as published by the Free Software Foundation.
7  */
8 
9 #include <common.h>
10 #include <i2c.h>
11 
12 #include <asm/fsl_ddr_sdram.h>
13 #include <asm/fsl_ddr_dimm_params.h>
14 
15 static void
16 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
17 {
18 	i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
19 }
20 
21 unsigned int fsl_ddr_get_mem_data_rate(void)
22 {
23 	return get_bus_freq(0);
24 }
25 
26 void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
27 		      unsigned int ctrl_num)
28 {
29 	unsigned int i;
30 	unsigned int i2c_address = 0;
31 
32 	for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
33 		if (ctrl_num == 0 && i == 0) {
34 			i2c_address = SPD_EEPROM_ADDRESS1;
35 		}
36 		if (ctrl_num == 0 && i == 1) {
37 			i2c_address = SPD_EEPROM_ADDRESS2;
38 		}
39 		if (ctrl_num == 1 && i == 0) {
40 			i2c_address = SPD_EEPROM_ADDRESS3;
41 		}
42 		if (ctrl_num == 1 && i == 1) {
43 			i2c_address = SPD_EEPROM_ADDRESS4;
44 		}
45 		get_spd(&(ctrl_dimms_spd[i]), i2c_address);
46 	}
47 }
48 
49 void fsl_ddr_board_options(memctl_options_t *popts,
50 				dimm_params_t *pdimm,
51 				unsigned int ctrl_num)
52 {
53 	/*
54 	 * Factors to consider for clock adjust:
55 	 *	- number of chips on bus
56 	 *	- position of slot
57 	 *	- DDR1 vs. DDR2?
58 	 *	- ???
59 	 *
60 	 * This needs to be determined on a board-by-board basis.
61 	 *	0110	3/4 cycle late
62 	 *	0111	7/8 cycle late
63 	 */
64 	popts->clk_adjust = 7;
65 
66 	/*
67 	 * Factors to consider for CPO:
68 	 *	- frequency
69 	 *	- ddr1 vs. ddr2
70 	 */
71 	popts->cpo_override = 10;
72 
73 	/*
74 	 * Factors to consider for write data delay:
75 	 *	- number of DIMMs
76 	 *
77 	 * 1 = 1/4 clock delay
78 	 * 2 = 1/2 clock delay
79 	 * 3 = 3/4 clock delay
80 	 * 4 = 1   clock delay
81 	 * 5 = 5/4 clock delay
82 	 * 6 = 3/2 clock delay
83 	 */
84 	popts->write_data_delay = 3;
85 
86 	/*
87 	 * Factors to consider for half-strength driver enable:
88 	 *	- number of DIMMs installed
89 	 */
90 	popts->half_strength_driver_enable = 0;
91 }
92