1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 291e25769SPaul Gortmaker /* 391e25769SPaul Gortmaker * pci.c -- WindRiver SBC8349 PCI board support. 491e25769SPaul Gortmaker * Copyright (c) 2006 Wind River Systems, Inc. 59993e196SKim Phillips * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. 691e25769SPaul Gortmaker * 791e25769SPaul Gortmaker * Based on MPC8349 PCI support but w/o PIB related code. 891e25769SPaul Gortmaker */ 991e25769SPaul Gortmaker 1091e25769SPaul Gortmaker #include <asm/mmu.h> 119993e196SKim Phillips #include <asm/io.h> 1291e25769SPaul Gortmaker #include <common.h> 139993e196SKim Phillips #include <mpc83xx.h> 1491e25769SPaul Gortmaker #include <pci.h> 1591e25769SPaul Gortmaker #include <i2c.h> 169993e196SKim Phillips #include <asm/fsl_i2c.h> 1791e25769SPaul Gortmaker 189993e196SKim Phillips static struct pci_region pci1_regions[] = { 1991e25769SPaul Gortmaker { 209993e196SKim Phillips bus_start: CONFIG_SYS_PCI1_MEM_BASE, 219993e196SKim Phillips phys_start: CONFIG_SYS_PCI1_MEM_PHYS, 229993e196SKim Phillips size: CONFIG_SYS_PCI1_MEM_SIZE, 239993e196SKim Phillips flags: PCI_REGION_MEM | PCI_REGION_PREFETCH 2491e25769SPaul Gortmaker }, 2591e25769SPaul Gortmaker { 269993e196SKim Phillips bus_start: CONFIG_SYS_PCI1_IO_BASE, 279993e196SKim Phillips phys_start: CONFIG_SYS_PCI1_IO_PHYS, 289993e196SKim Phillips size: CONFIG_SYS_PCI1_IO_SIZE, 299993e196SKim Phillips flags: PCI_REGION_IO 309993e196SKim Phillips }, 319993e196SKim Phillips { 329993e196SKim Phillips bus_start: CONFIG_SYS_PCI1_MMIO_BASE, 339993e196SKim Phillips phys_start: CONFIG_SYS_PCI1_MMIO_PHYS, 349993e196SKim Phillips size: CONFIG_SYS_PCI1_MMIO_SIZE, 359993e196SKim Phillips flags: PCI_REGION_MEM 369993e196SKim Phillips }, 3791e25769SPaul Gortmaker }; 3891e25769SPaul Gortmaker 399993e196SKim Phillips /* 4091e25769SPaul Gortmaker * pci_init_board() 4191e25769SPaul Gortmaker * 4291e25769SPaul Gortmaker * NOTICE: PCI2 is not supported. There is only one 4391e25769SPaul Gortmaker * physical PCI slot on the board. 4491e25769SPaul Gortmaker * 4591e25769SPaul Gortmaker */ 4691e25769SPaul Gortmaker void 4791e25769SPaul Gortmaker pci_init_board(void) 4891e25769SPaul Gortmaker { 499993e196SKim Phillips volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; 509993e196SKim Phillips volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; 519993e196SKim Phillips volatile law83xx_t *pci_law = immr->sysconf.pcilaw; 529993e196SKim Phillips struct pci_region *reg[] = { pci1_regions }; 5391e25769SPaul Gortmaker 549993e196SKim Phillips /* Enable all 8 PCI_CLK_OUTPUTS */ 5591e25769SPaul Gortmaker clk->occr = 0xff000000; 5691e25769SPaul Gortmaker udelay(2000); 5791e25769SPaul Gortmaker 589993e196SKim Phillips /* Configure PCI Local Access Windows */ 596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; 6091e25769SPaul Gortmaker pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; 6191e25769SPaul Gortmaker 626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; 6391e25769SPaul Gortmaker pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M; 6491e25769SPaul Gortmaker 659993e196SKim Phillips udelay(2000); 6691e25769SPaul Gortmaker 676aa3d3bfSPeter Tyser mpc83xx_pci_init(1, reg); 6891e25769SPaul Gortmaker } 69