1 2 3 U-Boot for Wind River SBC834x Boards 4 ==================================== 5 6 7The Wind River SBC834x board is a 6U form factor (not CPCI) reference 8design that uses the MPC8347E or MPC8349E processor. U-Boot support 9for this board is heavily based on the existing U-Boot support for 10Freescale MPC8349 reference boards. 11 12Support has been primarily tested on the SBC8349 version of the board, 13although earlier versions were also tested on the SBC8347. The primary 14difference in the two is the level of PCI functionality. 15 16 http://www.windriver.com/products/OCD/SBC8347E_49E/ 17 18 19Flash Details: 20============== 21 22The flash type is intel 28F640Jx (4096x16) [one device]. Base address 23is 0xFF80_0000 which is also where the Hardware Reset Configuration 24Word (HRCW) is stored. Caution should be used to not reset the 25board without having a valid HRCW in place (i.e. erased flash) as 26then a Wind River ICE will be required to restore the HRCW and flash 27image. 28 29 30Restoring a corrupted or missing flash image: 31============================================= 32 33Note that U-Boot versions up to and including 2009.06 had essentially 34two copies of U-Boot in flash; one at the very beginning, which set 35the HRCW, and one at the very end, which was the image that was run. 36As of this point in time, the two have been combined into just one 37at the beginning of flash, which provides both the HRCW, and the image 38that is executed. This frees up the remainder of flash for other uses. 39Use of the U-Boot command "fli" will indicate what parts are in use. 40Details for storing U-Boot to flash using a Wind River ICE can be found 41on page 19 of the board manual (request ERG-00328-001). The following 42is a summary of that information: 43 44 - Connect ICE and establish connection to it from WorkBench/OCD. 45 - Ensure you have background mode (BKM) in the OCD terminal window. 46 - Select the appropriate flash type (listed above) 47 - Prepare a U-Boot image by using the Wind River Convert utility; 48 by using "Convert and Add file" on the ELF file from your build. 49 Convert from FF80_0000 to FFFF_FFFF (or to FF83_FFFF if you are 50 trying to preserve your old environment settings and user flash). 51 - Set the start address of the erase/flash process to FF80_0000 52 - Set the target RAM required to 64kB. 53 - Select sectors for erasing (see note on environment below) 54 - Select Erase and Reprogram. 55 56Note that some versions of the register files used with Workbench 57would zero some TSEC registers, which inhibits ethernet operation 58by U-Boot when this register file is played to the target. Using 59"INN" in the OCD terminal window instead of "IN" before the "GO" 60will not play the register file, and allow U-Boot to use the TSEC 61interface while executed from the ICE "GO" command. 62 63Alternatively, you can locate the register file which will be named 64WRS_SBC8349_PCT00328001.reg or similar) and "REM" out all the lines 65beginning with "SCGA TSEC1" and "SCGA TSEC2". This allows you to 66use all the remaining register file content. 67 68If you wish to preserve your prior U-Boot environment settings, 69then convert (and erase to) 0xFF83FFFF instead of 0xFFFFFFFF. 70The size for converting (and erasing) must be at least as large 71as u-boot.bin. 72 73 74Updating U-Boot with U-Boot: 75============================ 76 77This procedure is very similar to other boards that have U-Boot installed. 78Assuming that the network has been configured, and that the new u-boot.bin 79has been copied to the TFTP server, the commands are: 80 81 tftp 200000 u-boot.bin 82 protect off all 83 erase ff800000 ff83ffff 84 cp.b 200000 ff800000 40000 85 protect on all 86 87You may wish to do a "md ff800000 20" operation as a prefix and postfix 88to the above steps to inspect/compare the HRCW before/after as an extra 89safety check before resetting the board upon completion of the reflash. 90 91PCI: 92==== 93 94There are three configuration choices: 95 sbc8349_config 96 sbc8349_PCI_33_config 97 sbc8349_PCI_66_config 98 99The 1st does not enable CONFIG_PCI, and assumes that the PCI slot 100will be left empty (M66EN high), and so the board will operate with 101a base clock of 66MHz. Note that you need both PCI enabled in U-Boot 102and linux in order to have functional PCI under linux. The only 103reason for choosing to not enable PCI would be if you had a very 104early (rev 1.0) CPU with possible PCI issues. 105 106The second enables PCI support and builds for a 33MHz clock rate. Note 107that if a 33MHz 32bit card is inserted in the slot, then the whole board 108will clock down to a 33MHz base clock instead of the default 66MHz. This 109will change the baud clocks and mess up your serial console output if you 110were previously running at 66MHz. If you want to use a 33MHz PCI card, 111then you should build a U-Boot with sbc8349_PCI_33_config and store this 112to flash prior to powering down the board and inserting the 33MHz PCI 113card. 114 115The third option builds PCI support in, and leaves the clocking at the 116default 66MHz. This has been tested with an intel PCI-X e1000 card. 117This is also the appropriate choice for people with a recent (non 1.0) 118CPU who currently have the PCI slot physically empty, but intend to 119possibly add a PCI-X card at a later date. 120 121 => pci 122 Scanning PCI devices on bus 0 123 BusDevFun VendorId DeviceId Device Class Sub-Class 124 _____________________________________________________________ 125 00.00.00 0x1957 0x0080 Processor 0x20 126 00.11.00 0x8086 0x1026 Network controller 0x00 127 => 128