1 /*
2  *  Copyright (C) 2010 Samsung Electronics
3  *  Minkyu Kang <mk7.kang@samsung.com>
4  *  Kyungmin Park <kyungmin.park@samsung.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <spi.h>
11 #include <lcd.h>
12 #include <asm/io.h>
13 #include <asm/gpio.h>
14 #include <asm/arch/adc.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/watchdog.h>
18 #include <ld9040.h>
19 #include <power/pmic.h>
20 #include <usb.h>
21 #include <usb/s3c_udc.h>
22 #include <asm/arch/cpu.h>
23 #include <power/max8998_pmic.h>
24 #include <libtizen.h>
25 #include <samsung/misc.h>
26 #include <usb_mass_storage.h>
27 
28 DECLARE_GLOBAL_DATA_PTR;
29 
30 unsigned int board_rev;
31 
32 u32 get_board_rev(void)
33 {
34 	return board_rev;
35 }
36 
37 static int get_hwrev(void)
38 {
39 	return board_rev & 0xFF;
40 }
41 
42 static void init_pmic_lcd(void);
43 
44 int exynos_power_init(void)
45 {
46 	int ret;
47 
48 	/*
49 	 * For PMIC the I2C bus is named as I2C5, but it is connected
50 	 * to logical I2C adapter 0
51 	 */
52 	ret = pmic_init(I2C_0);
53 	if (ret)
54 		return ret;
55 
56 	init_pmic_lcd();
57 
58 	return 0;
59 }
60 
61 static unsigned short get_adc_value(int channel)
62 {
63 	struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
64 	unsigned short ret = 0;
65 	unsigned int reg;
66 	unsigned int loop = 0;
67 
68 	writel(channel & 0xF, &adc->adcmux);
69 	writel((1 << 14) | (49 << 6), &adc->adccon);
70 	writel(1000 & 0xffff, &adc->adcdly);
71 	writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
72 	udelay(10);
73 	writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
74 	udelay(10);
75 
76 	do {
77 		udelay(1);
78 		reg = readl(&adc->adccon);
79 	} while (!(reg & (1 << 15)) && (loop++ < 1000));
80 
81 	ret = readl(&adc->adcdat0) & 0xFFF;
82 
83 	return ret;
84 }
85 
86 static int adc_power_control(int on)
87 {
88 	int ret;
89 	struct pmic *p = pmic_get("MAX8998_PMIC");
90 	if (!p)
91 		return -ENODEV;
92 
93 	if (pmic_probe(p))
94 		return -1;
95 
96 	ret = pmic_set_output(p,
97 			      MAX8998_REG_ONOFF1,
98 			      MAX8998_LDO4, !!on);
99 
100 	return ret;
101 }
102 
103 static unsigned int get_hw_revision(void)
104 {
105 	int hwrev, mode0, mode1;
106 
107 	adc_power_control(1);
108 
109 	mode0 = get_adc_value(1);		/* HWREV_MODE0 */
110 	mode1 = get_adc_value(2);		/* HWREV_MODE1 */
111 
112 	/*
113 	 * XXX Always set the default hwrev as the latest board
114 	 * ADC = (voltage) / 3.3 * 4096
115 	 */
116 	hwrev = 3;
117 
118 #define IS_RANGE(x, min, max)	((x) > (min) && (x) < (max))
119 	if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
120 		hwrev = 0x0;		/* 0.01V	0.01V */
121 	if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
122 		hwrev = 0x1;		/* 610mV	0.01V */
123 	if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
124 		hwrev = 0x2;		/* 1.16V	0.01V */
125 	if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
126 		hwrev = 0x3;		/* 1.79V	0.01V */
127 #undef IS_RANGE
128 
129 	debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
130 
131 	adc_power_control(0);
132 
133 	return hwrev;
134 }
135 
136 static void check_hw_revision(void)
137 {
138 	int hwrev;
139 
140 	hwrev = get_hw_revision();
141 
142 	board_rev |= hwrev;
143 }
144 
145 #ifdef CONFIG_USB_GADGET
146 static int s5pc210_phy_control(int on)
147 {
148 	int ret = 0;
149 	struct pmic *p = pmic_get("MAX8998_PMIC");
150 	if (!p)
151 		return -ENODEV;
152 
153 	if (pmic_probe(p))
154 		return -1;
155 
156 	if (on) {
157 		ret |= pmic_set_output(p,
158 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
159 				       MAX8998_SAFEOUT1, LDO_ON);
160 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
161 				      MAX8998_LDO3, LDO_ON);
162 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
163 				      MAX8998_LDO8, LDO_ON);
164 
165 	} else {
166 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
167 				      MAX8998_LDO8, LDO_OFF);
168 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
169 				      MAX8998_LDO3, LDO_OFF);
170 		ret |= pmic_set_output(p,
171 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
172 				       MAX8998_SAFEOUT1, LDO_OFF);
173 	}
174 
175 	if (ret) {
176 		puts("MAX8998 LDO setting error!\n");
177 		return -1;
178 	}
179 
180 	return 0;
181 }
182 
183 struct s3c_plat_otg_data s5pc210_otg_data = {
184 	.phy_control = s5pc210_phy_control,
185 	.regs_phy = EXYNOS4_USBPHY_BASE,
186 	.regs_otg = EXYNOS4_USBOTG_BASE,
187 	.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
188 	.usb_flags = PHY0_SLEEP,
189 };
190 #endif
191 
192 int board_usb_init(int index, enum usb_init_type init)
193 {
194 	debug("USB_udc_probe\n");
195 	return s3c_udc_probe(&s5pc210_otg_data);
196 }
197 
198 #ifdef CONFIG_USB_CABLE_CHECK
199 int usb_cable_connected(void)
200 {
201 	return 0;
202 }
203 #endif
204 
205 int exynos_early_init_f(void)
206 {
207 	wdt_stop();
208 
209 	return 0;
210 }
211 
212 #ifdef CONFIG_SOFT_SPI
213 static void soft_spi_init(void)
214 {
215 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
216 		CONFIG_SOFT_SPI_MODE & SPI_CPOL);
217 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
218 	gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
219 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
220 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
221 }
222 
223 void spi_cs_activate(struct spi_slave *slave)
224 {
225 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
226 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
227 	SPI_SCL(1);
228 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
229 		CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
230 }
231 
232 void spi_cs_deactivate(struct spi_slave *slave)
233 {
234 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
235 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
236 }
237 
238 int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
239 {
240 	return bus == 0 && cs == 0;
241 }
242 
243 void universal_spi_scl(int bit)
244 {
245 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
246 }
247 
248 void universal_spi_sda(int bit)
249 {
250 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
251 }
252 
253 int universal_spi_read(void)
254 {
255 	return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
256 }
257 #endif
258 
259 static void init_pmic_lcd(void)
260 {
261 	unsigned char val;
262 	int ret = 0;
263 
264 	struct pmic *p = pmic_get("MAX8998_PMIC");
265 
266 	if (!p)
267 		return;
268 
269 	if (pmic_probe(p))
270 		return;
271 
272 	/* LDO7 1.8V */
273 	val = 0x02; /* (1800 - 1600) / 100; */
274 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO7, val);
275 
276 	/* LDO17 3.0V */
277 	val = 0xe; /* (3000 - 1600) / 100; */
278 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO17, val);
279 
280 	/* Disable unneeded regulators */
281 	/*
282 	 * ONOFF1
283 	 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
284 	 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
285 	 */
286 	val = 0xB9;
287 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF1, val);
288 
289 	/* ONOFF2
290 	 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
291 	 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
292 	 */
293 	val = 0x50;
294 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF2, val);
295 
296 	/* ONOFF3
297 	 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
298 	 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
299 	 */
300 	val = 0x00;
301 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF3, val);
302 
303 	if (ret)
304 		puts("LCD pmic initialisation error!\n");
305 }
306 
307 void exynos_cfg_lcd_gpio(void)
308 {
309 	unsigned int i, f3_end = 4;
310 
311 	for (i = 0; i < 8; i++) {
312 		/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
313 		gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
314 		gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
315 		gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
316 		/* pull-up/down disable */
317 		gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
318 		gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
319 		gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
320 
321 		/* drive strength to max (24bit) */
322 		gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
323 		gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
324 		gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
325 		gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
326 		gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
327 		gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
328 	}
329 
330 	for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
331 		/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
332 		gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
333 		/* pull-up/down disable */
334 		gpio_set_pull(i, S5P_GPIO_PULL_NONE);
335 		/* drive strength to max (24bit) */
336 		gpio_set_drv(i, S5P_GPIO_DRV_4X);
337 		gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
338 	}
339 
340 	/* gpio pad configuration for LCD reset. */
341 	gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
342 
343 	spi_init();
344 }
345 
346 int mipi_power(void)
347 {
348 	return 0;
349 }
350 
351 void exynos_reset_lcd(void)
352 {
353 	gpio_set_value(EXYNOS4_GPIO_Y45, 1);
354 	udelay(10000);
355 	gpio_set_value(EXYNOS4_GPIO_Y45, 0);
356 	udelay(10000);
357 	gpio_set_value(EXYNOS4_GPIO_Y45, 1);
358 	udelay(100);
359 }
360 
361 void exynos_lcd_power_on(void)
362 {
363 	struct pmic *p = pmic_get("MAX8998_PMIC");
364 
365 	if (!p)
366 		return;
367 
368 	if (pmic_probe(p))
369 		return;
370 
371 	pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
372 	pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
373 }
374 
375 void exynos_cfg_ldo(void)
376 {
377 	ld9040_cfg_ldo();
378 }
379 
380 void exynos_enable_ldo(unsigned int onoff)
381 {
382 	ld9040_enable_ldo(onoff);
383 }
384 
385 int exynos_init(void)
386 {
387 	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
388 
389 	switch (get_hwrev()) {
390 	case 0:
391 		/*
392 		 * Set the low to enable LDO_EN
393 		 * But when you use the test board for eMMC booting
394 		 * you should set it HIGH since it removes the inverter
395 		 */
396 		/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
397 		gpio_direction_output(EXYNOS4_GPIO_E36, 0);
398 		break;
399 	default:
400 		/*
401 		 * Default reset state is High and there's no inverter
402 		 * But set it as HIGH to ensure
403 		 */
404 		/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
405 		gpio_direction_output(EXYNOS4_GPIO_E13, 1);
406 		break;
407 	}
408 
409 #ifdef CONFIG_SOFT_SPI
410 	soft_spi_init();
411 #endif
412 	check_hw_revision();
413 	printf("HW Revision:\t0x%x\n", board_rev);
414 
415 	return 0;
416 }
417 
418 void exynos_lcd_misc_init(vidinfo_t *vid)
419 {
420 #ifdef CONFIG_TIZEN
421 	get_tizen_logo_info(vid);
422 #endif
423 
424 	/* for LD9040. */
425 	vid->pclk_name = 1;	/* MPLL */
426 	vid->sclk_div = 1;
427 
428 	setenv("lcdinfo", "lcd=ld9040");
429 }
430