1 /*
2  *  Copyright (C) 2010 Samsung Electronics
3  *  Minkyu Kang <mk7.kang@samsung.com>
4  *  Kyungmin Park <kyungmin.park@samsung.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <spi.h>
11 #include <lcd.h>
12 #include <asm/io.h>
13 #include <asm/gpio.h>
14 #include <asm/arch/adc.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/mmc.h>
17 #include <asm/arch/pinmux.h>
18 #include <asm/arch/watchdog.h>
19 #include <libtizen.h>
20 #include <ld9040.h>
21 #include <power/pmic.h>
22 #include <usb/s3c_udc.h>
23 #include <asm/arch/cpu.h>
24 #include <power/max8998_pmic.h>
25 #include <samsung/misc.h>
26 
27 DECLARE_GLOBAL_DATA_PTR;
28 
29 struct exynos4_gpio_part1 *gpio1;
30 struct exynos4_gpio_part2 *gpio2;
31 unsigned int board_rev;
32 
33 u32 get_board_rev(void)
34 {
35 	return board_rev;
36 }
37 
38 static int get_hwrev(void)
39 {
40 	return board_rev & 0xFF;
41 }
42 
43 static void init_pmic_lcd(void);
44 
45 int power_init_board(void)
46 {
47 	int ret;
48 
49 	/*
50 	 * For PMIC the I2C bus is named as I2C5, but it is connected
51 	 * to logical I2C adapter 0
52 	 */
53 	ret = pmic_init(I2C_0);
54 	if (ret)
55 		return ret;
56 
57 	init_pmic_lcd();
58 
59 	return 0;
60 }
61 
62 int dram_init(void)
63 {
64 	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
65 		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
66 
67 	return 0;
68 }
69 
70 void dram_init_banksize(void)
71 {
72 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
73 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
74 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
75 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
76 }
77 
78 static unsigned short get_adc_value(int channel)
79 {
80 	struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
81 	unsigned short ret = 0;
82 	unsigned int reg;
83 	unsigned int loop = 0;
84 
85 	writel(channel & 0xF, &adc->adcmux);
86 	writel((1 << 14) | (49 << 6), &adc->adccon);
87 	writel(1000 & 0xffff, &adc->adcdly);
88 	writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
89 	udelay(10);
90 	writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
91 	udelay(10);
92 
93 	do {
94 		udelay(1);
95 		reg = readl(&adc->adccon);
96 	} while (!(reg & (1 << 15)) && (loop++ < 1000));
97 
98 	ret = readl(&adc->adcdat0) & 0xFFF;
99 
100 	return ret;
101 }
102 
103 static int adc_power_control(int on)
104 {
105 	int ret;
106 	struct pmic *p = pmic_get("MAX8998_PMIC");
107 	if (!p)
108 		return -ENODEV;
109 
110 	if (pmic_probe(p))
111 		return -1;
112 
113 	ret = pmic_set_output(p,
114 			      MAX8998_REG_ONOFF1,
115 			      MAX8998_LDO4, !!on);
116 
117 	return ret;
118 }
119 
120 static unsigned int get_hw_revision(void)
121 {
122 	int hwrev, mode0, mode1;
123 
124 	adc_power_control(1);
125 
126 	mode0 = get_adc_value(1);		/* HWREV_MODE0 */
127 	mode1 = get_adc_value(2);		/* HWREV_MODE1 */
128 
129 	/*
130 	 * XXX Always set the default hwrev as the latest board
131 	 * ADC = (voltage) / 3.3 * 4096
132 	 */
133 	hwrev = 3;
134 
135 #define IS_RANGE(x, min, max)	((x) > (min) && (x) < (max))
136 	if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
137 		hwrev = 0x0;		/* 0.01V	0.01V */
138 	if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
139 		hwrev = 0x1;		/* 610mV	0.01V */
140 	if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
141 		hwrev = 0x2;		/* 1.16V	0.01V */
142 	if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
143 		hwrev = 0x3;		/* 1.79V	0.01V */
144 #undef IS_RANGE
145 
146 	debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
147 
148 	adc_power_control(0);
149 
150 	return hwrev;
151 }
152 
153 static void check_hw_revision(void)
154 {
155 	int hwrev;
156 
157 	hwrev = get_hw_revision();
158 
159 	board_rev |= hwrev;
160 }
161 
162 #ifdef CONFIG_DISPLAY_BOARDINFO
163 int checkboard(void)
164 {
165 	puts("Board:\tUniversal C210\n");
166 	return 0;
167 }
168 #endif
169 
170 #ifdef CONFIG_GENERIC_MMC
171 int board_mmc_init(bd_t *bis)
172 {
173 	int err;
174 
175 	switch (get_hwrev()) {
176 	case 0:
177 		/*
178 		 * Set the low to enable LDO_EN
179 		 * But when you use the test board for eMMC booting
180 		 * you should set it HIGH since it removes the inverter
181 		 */
182 		/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
183 		s5p_gpio_direction_output(&gpio1->e3, 6, 0);
184 		break;
185 	default:
186 		/*
187 		 * Default reset state is High and there's no inverter
188 		 * But set it as HIGH to ensure
189 		 */
190 		/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
191 		s5p_gpio_direction_output(&gpio1->e1, 3, 1);
192 		break;
193 	}
194 
195 	/*
196 	 * MMC device init
197 	 * mmc0	 : eMMC (8-bit buswidth)
198 	 * mmc2	 : SD card (4-bit buswidth)
199 	 */
200 	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
201 	if (err)
202 		debug("SDMMC0 not configured\n");
203 	else
204 		err = s5p_mmc_init(0, 8);
205 
206 	/* T-flash detect */
207 	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
208 	s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
209 
210 	/*
211 	 * Check the T-flash  detect pin
212 	 * GPX3[4] T-flash detect pin
213 	 */
214 	if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
215 		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
216 		if (err)
217 			debug("SDMMC2 not configured\n");
218 		else
219 			err = s5p_mmc_init(2, 4);
220 	}
221 
222 	return err;
223 
224 }
225 #endif
226 
227 #ifdef CONFIG_USB_GADGET
228 static int s5pc210_phy_control(int on)
229 {
230 	int ret = 0;
231 	struct pmic *p = pmic_get("MAX8998_PMIC");
232 	if (!p)
233 		return -ENODEV;
234 
235 	if (pmic_probe(p))
236 		return -1;
237 
238 	if (on) {
239 		ret |= pmic_set_output(p,
240 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
241 				       MAX8998_SAFEOUT1, LDO_ON);
242 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
243 				      MAX8998_LDO3, LDO_ON);
244 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
245 				      MAX8998_LDO8, LDO_ON);
246 
247 	} else {
248 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
249 				      MAX8998_LDO8, LDO_OFF);
250 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
251 				      MAX8998_LDO3, LDO_OFF);
252 		ret |= pmic_set_output(p,
253 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
254 				       MAX8998_SAFEOUT1, LDO_OFF);
255 	}
256 
257 	if (ret) {
258 		puts("MAX8998 LDO setting error!\n");
259 		return -1;
260 	}
261 
262 	return 0;
263 }
264 
265 struct s3c_plat_otg_data s5pc210_otg_data = {
266 	.phy_control = s5pc210_phy_control,
267 	.regs_phy = EXYNOS4_USBPHY_BASE,
268 	.regs_otg = EXYNOS4_USBOTG_BASE,
269 	.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
270 	.usb_flags = PHY0_SLEEP,
271 };
272 #endif
273 
274 int board_early_init_f(void)
275 {
276 	wdt_stop();
277 
278 	return 0;
279 }
280 
281 #ifdef CONFIG_SOFT_SPI
282 static void soft_spi_init(void)
283 {
284 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
285 		CONFIG_SOFT_SPI_MODE & SPI_CPOL);
286 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
287 	gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
288 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
289 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
290 }
291 
292 void spi_cs_activate(struct spi_slave *slave)
293 {
294 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
295 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
296 	SPI_SCL(1);
297 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
298 		CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
299 }
300 
301 void spi_cs_deactivate(struct spi_slave *slave)
302 {
303 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
304 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
305 }
306 
307 int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
308 {
309 	return bus == 0 && cs == 0;
310 }
311 
312 void universal_spi_scl(int bit)
313 {
314 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
315 }
316 
317 void universal_spi_sda(int bit)
318 {
319 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
320 }
321 
322 int universal_spi_read(void)
323 {
324 	return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
325 }
326 #endif
327 
328 static void init_pmic_lcd(void)
329 {
330 	unsigned char val;
331 	int ret = 0;
332 
333 	struct pmic *p = pmic_get("MAX8998_PMIC");
334 
335 	if (!p)
336 		return;
337 
338 	if (pmic_probe(p))
339 		return;
340 
341 	/* LDO7 1.8V */
342 	val = 0x02; /* (1800 - 1600) / 100; */
343 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO7, val);
344 
345 	/* LDO17 3.0V */
346 	val = 0xe; /* (3000 - 1600) / 100; */
347 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO17, val);
348 
349 	/* Disable unneeded regulators */
350 	/*
351 	 * ONOFF1
352 	 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
353 	 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
354 	 */
355 	val = 0xB9;
356 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF1, val);
357 
358 	/* ONOFF2
359 	 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
360 	 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
361 	 */
362 	val = 0x50;
363 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF2, val);
364 
365 	/* ONOFF3
366 	 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
367 	 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
368 	 */
369 	val = 0x00;
370 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF3, val);
371 
372 	if (ret)
373 		puts("LCD pmic initialisation error!\n");
374 }
375 
376 void exynos_cfg_lcd_gpio(void)
377 {
378 	unsigned int i, f3_end = 4;
379 
380 	for (i = 0; i < 8; i++) {
381 		/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
382 		s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
383 		s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
384 		s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
385 		/* pull-up/down disable */
386 		s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
387 		s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
388 		s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
389 
390 		/* drive strength to max (24bit) */
391 		s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
392 		s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
393 		s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
394 		s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
395 		s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
396 		s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
397 	}
398 
399 	for (i = 0; i < f3_end; i++) {
400 		/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
401 		s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
402 		/* pull-up/down disable */
403 		s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
404 		/* drive strength to max (24bit) */
405 		s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
406 		s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
407 	}
408 
409 	/* gpio pad configuration for LCD reset. */
410 	s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
411 
412 	spi_init();
413 }
414 
415 void exynos_reset_lcd(void)
416 {
417 	s5p_gpio_set_value(&gpio2->y4, 5, 1);
418 	udelay(10000);
419 	s5p_gpio_set_value(&gpio2->y4, 5, 0);
420 	udelay(10000);
421 	s5p_gpio_set_value(&gpio2->y4, 5, 1);
422 	udelay(100);
423 }
424 
425 void exynos_lcd_power_on(void)
426 {
427 	struct pmic *p = pmic_get("MAX8998_PMIC");
428 
429 	if (!p)
430 		return;
431 
432 	if (pmic_probe(p))
433 		return;
434 
435 	pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
436 	pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
437 }
438 
439 vidinfo_t panel_info = {
440 	.vl_freq	= 60,
441 	.vl_col		= 480,
442 	.vl_row		= 800,
443 	.vl_width	= 480,
444 	.vl_height	= 800,
445 	.vl_clkp	= CONFIG_SYS_HIGH,
446 	.vl_hsp		= CONFIG_SYS_HIGH,
447 	.vl_vsp		= CONFIG_SYS_HIGH,
448 	.vl_dp		= CONFIG_SYS_HIGH,
449 
450 	.vl_bpix	= 4,	/* Bits per pixel */
451 
452 	/* LD9040 LCD Panel */
453 	.vl_hspw	= 2,
454 	.vl_hbpd	= 16,
455 	.vl_hfpd	= 16,
456 
457 	.vl_vspw	= 2,
458 	.vl_vbpd	= 8,
459 	.vl_vfpd	= 8,
460 	.vl_cmd_allow_len = 0xf,
461 
462 	.win_id		= 0,
463 	.dual_lcd_enabled = 0,
464 
465 	.init_delay	= 0,
466 	.power_on_delay = 10000,
467 	.reset_delay	= 10000,
468 	.interface_mode = FIMD_RGB_INTERFACE,
469 	.mipi_enabled	= 0,
470 };
471 
472 void exynos_cfg_ldo(void)
473 {
474 	ld9040_cfg_ldo();
475 }
476 
477 void exynos_enable_ldo(unsigned int onoff)
478 {
479 	ld9040_enable_ldo(onoff);
480 }
481 
482 void init_panel_info(vidinfo_t *vid)
483 {
484 	vid->logo_on	= 1;
485 	vid->resolution	= HD_RESOLUTION;
486 	vid->rgb_mode	= MODE_RGB_P;
487 
488 #ifdef CONFIG_TIZEN
489 	get_tizen_logo_info(vid);
490 #endif
491 
492 	/* for LD9040. */
493 	vid->pclk_name = 1;	/* MPLL */
494 	vid->sclk_div = 1;
495 
496 	setenv("lcdinfo", "lcd=ld9040");
497 }
498 
499 int board_init(void)
500 {
501 	gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
502 	gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
503 
504 	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
505 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
506 
507 #ifdef CONFIG_SOFT_SPI
508 	soft_spi_init();
509 #endif
510 	check_hw_revision();
511 	printf("HW Revision:\t0x%x\n", board_rev);
512 
513 	return 0;
514 }
515 
516 #ifdef CONFIG_MISC_INIT_R
517 int misc_init_r(void)
518 {
519 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
520 	set_board_info();
521 #endif
522 #ifdef CONFIG_LCD_MENU
523 	keys_init();
524 	check_boot_mode();
525 #endif
526 #ifdef CONFIG_CMD_BMP
527 	if (panel_info.logo_on)
528 		draw_logo();
529 #endif
530 	return 0;
531 }
532 #endif
533