1 /*
2  *  Copyright (C) 2010 Samsung Electronics
3  *  Minkyu Kang <mk7.kang@samsung.com>
4  *  Kyungmin Park <kyungmin.park@samsung.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <spi.h>
11 #include <lcd.h>
12 #include <asm/io.h>
13 #include <asm/gpio.h>
14 #include <asm/arch/adc.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/watchdog.h>
18 #include <ld9040.h>
19 #include <power/pmic.h>
20 #include <usb.h>
21 #include <usb/s3c_udc.h>
22 #include <asm/arch/cpu.h>
23 #include <power/max8998_pmic.h>
24 #include <libtizen.h>
25 #include <samsung/misc.h>
26 #include <usb_mass_storage.h>
27 
28 DECLARE_GLOBAL_DATA_PTR;
29 
30 struct exynos4_gpio_part1 *gpio1;
31 struct exynos4_gpio_part2 *gpio2;
32 unsigned int board_rev;
33 
34 u32 get_board_rev(void)
35 {
36 	return board_rev;
37 }
38 
39 static int get_hwrev(void)
40 {
41 	return board_rev & 0xFF;
42 }
43 
44 static void init_pmic_lcd(void);
45 
46 int exynos_power_init(void)
47 {
48 	int ret;
49 
50 	/*
51 	 * For PMIC the I2C bus is named as I2C5, but it is connected
52 	 * to logical I2C adapter 0
53 	 */
54 	ret = pmic_init(I2C_0);
55 	if (ret)
56 		return ret;
57 
58 	init_pmic_lcd();
59 
60 	return 0;
61 }
62 
63 static unsigned short get_adc_value(int channel)
64 {
65 	struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
66 	unsigned short ret = 0;
67 	unsigned int reg;
68 	unsigned int loop = 0;
69 
70 	writel(channel & 0xF, &adc->adcmux);
71 	writel((1 << 14) | (49 << 6), &adc->adccon);
72 	writel(1000 & 0xffff, &adc->adcdly);
73 	writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
74 	udelay(10);
75 	writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
76 	udelay(10);
77 
78 	do {
79 		udelay(1);
80 		reg = readl(&adc->adccon);
81 	} while (!(reg & (1 << 15)) && (loop++ < 1000));
82 
83 	ret = readl(&adc->adcdat0) & 0xFFF;
84 
85 	return ret;
86 }
87 
88 static int adc_power_control(int on)
89 {
90 	int ret;
91 	struct pmic *p = pmic_get("MAX8998_PMIC");
92 	if (!p)
93 		return -ENODEV;
94 
95 	if (pmic_probe(p))
96 		return -1;
97 
98 	ret = pmic_set_output(p,
99 			      MAX8998_REG_ONOFF1,
100 			      MAX8998_LDO4, !!on);
101 
102 	return ret;
103 }
104 
105 static unsigned int get_hw_revision(void)
106 {
107 	int hwrev, mode0, mode1;
108 
109 	adc_power_control(1);
110 
111 	mode0 = get_adc_value(1);		/* HWREV_MODE0 */
112 	mode1 = get_adc_value(2);		/* HWREV_MODE1 */
113 
114 	/*
115 	 * XXX Always set the default hwrev as the latest board
116 	 * ADC = (voltage) / 3.3 * 4096
117 	 */
118 	hwrev = 3;
119 
120 #define IS_RANGE(x, min, max)	((x) > (min) && (x) < (max))
121 	if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
122 		hwrev = 0x0;		/* 0.01V	0.01V */
123 	if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
124 		hwrev = 0x1;		/* 610mV	0.01V */
125 	if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
126 		hwrev = 0x2;		/* 1.16V	0.01V */
127 	if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
128 		hwrev = 0x3;		/* 1.79V	0.01V */
129 #undef IS_RANGE
130 
131 	debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
132 
133 	adc_power_control(0);
134 
135 	return hwrev;
136 }
137 
138 static void check_hw_revision(void)
139 {
140 	int hwrev;
141 
142 	hwrev = get_hw_revision();
143 
144 	board_rev |= hwrev;
145 }
146 
147 #ifdef CONFIG_USB_GADGET
148 static int s5pc210_phy_control(int on)
149 {
150 	int ret = 0;
151 	struct pmic *p = pmic_get("MAX8998_PMIC");
152 	if (!p)
153 		return -ENODEV;
154 
155 	if (pmic_probe(p))
156 		return -1;
157 
158 	if (on) {
159 		ret |= pmic_set_output(p,
160 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
161 				       MAX8998_SAFEOUT1, LDO_ON);
162 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
163 				      MAX8998_LDO3, LDO_ON);
164 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
165 				      MAX8998_LDO8, LDO_ON);
166 
167 	} else {
168 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
169 				      MAX8998_LDO8, LDO_OFF);
170 		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
171 				      MAX8998_LDO3, LDO_OFF);
172 		ret |= pmic_set_output(p,
173 				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
174 				       MAX8998_SAFEOUT1, LDO_OFF);
175 	}
176 
177 	if (ret) {
178 		puts("MAX8998 LDO setting error!\n");
179 		return -1;
180 	}
181 
182 	return 0;
183 }
184 
185 struct s3c_plat_otg_data s5pc210_otg_data = {
186 	.phy_control = s5pc210_phy_control,
187 	.regs_phy = EXYNOS4_USBPHY_BASE,
188 	.regs_otg = EXYNOS4_USBOTG_BASE,
189 	.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
190 	.usb_flags = PHY0_SLEEP,
191 };
192 #endif
193 
194 int board_usb_init(int index, enum usb_init_type init)
195 {
196 	debug("USB_udc_probe\n");
197 	return s3c_udc_probe(&s5pc210_otg_data);
198 }
199 
200 int exynos_early_init_f(void)
201 {
202 	wdt_stop();
203 
204 	return 0;
205 }
206 
207 #ifdef CONFIG_SOFT_SPI
208 static void soft_spi_init(void)
209 {
210 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
211 		CONFIG_SOFT_SPI_MODE & SPI_CPOL);
212 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
213 	gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
214 	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
215 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
216 }
217 
218 void spi_cs_activate(struct spi_slave *slave)
219 {
220 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
221 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
222 	SPI_SCL(1);
223 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
224 		CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
225 }
226 
227 void spi_cs_deactivate(struct spi_slave *slave)
228 {
229 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
230 		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
231 }
232 
233 int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
234 {
235 	return bus == 0 && cs == 0;
236 }
237 
238 void universal_spi_scl(int bit)
239 {
240 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
241 }
242 
243 void universal_spi_sda(int bit)
244 {
245 	gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
246 }
247 
248 int universal_spi_read(void)
249 {
250 	return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
251 }
252 #endif
253 
254 static void init_pmic_lcd(void)
255 {
256 	unsigned char val;
257 	int ret = 0;
258 
259 	struct pmic *p = pmic_get("MAX8998_PMIC");
260 
261 	if (!p)
262 		return;
263 
264 	if (pmic_probe(p))
265 		return;
266 
267 	/* LDO7 1.8V */
268 	val = 0x02; /* (1800 - 1600) / 100; */
269 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO7, val);
270 
271 	/* LDO17 3.0V */
272 	val = 0xe; /* (3000 - 1600) / 100; */
273 	ret |= pmic_reg_write(p,  MAX8998_REG_LDO17, val);
274 
275 	/* Disable unneeded regulators */
276 	/*
277 	 * ONOFF1
278 	 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
279 	 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
280 	 */
281 	val = 0xB9;
282 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF1, val);
283 
284 	/* ONOFF2
285 	 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
286 	 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
287 	 */
288 	val = 0x50;
289 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF2, val);
290 
291 	/* ONOFF3
292 	 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
293 	 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
294 	 */
295 	val = 0x00;
296 	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF3, val);
297 
298 	if (ret)
299 		puts("LCD pmic initialisation error!\n");
300 }
301 
302 void exynos_cfg_lcd_gpio(void)
303 {
304 	unsigned int i, f3_end = 4;
305 
306 	for (i = 0; i < 8; i++) {
307 		/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
308 		s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
309 		s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
310 		s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
311 		/* pull-up/down disable */
312 		s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
313 		s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
314 		s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
315 
316 		/* drive strength to max (24bit) */
317 		s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
318 		s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
319 		s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
320 		s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
321 		s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
322 		s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
323 	}
324 
325 	for (i = 0; i < f3_end; i++) {
326 		/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
327 		s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
328 		/* pull-up/down disable */
329 		s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
330 		/* drive strength to max (24bit) */
331 		s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
332 		s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
333 	}
334 
335 	/* gpio pad configuration for LCD reset. */
336 	s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
337 
338 	spi_init();
339 }
340 
341 int mipi_power(void)
342 {
343 	return 0;
344 }
345 
346 void exynos_reset_lcd(void)
347 {
348 	s5p_gpio_set_value(&gpio2->y4, 5, 1);
349 	udelay(10000);
350 	s5p_gpio_set_value(&gpio2->y4, 5, 0);
351 	udelay(10000);
352 	s5p_gpio_set_value(&gpio2->y4, 5, 1);
353 	udelay(100);
354 }
355 
356 void exynos_lcd_power_on(void)
357 {
358 	struct pmic *p = pmic_get("MAX8998_PMIC");
359 
360 	if (!p)
361 		return;
362 
363 	if (pmic_probe(p))
364 		return;
365 
366 	pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
367 	pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
368 }
369 
370 void exynos_cfg_ldo(void)
371 {
372 	ld9040_cfg_ldo();
373 }
374 
375 void exynos_enable_ldo(unsigned int onoff)
376 {
377 	ld9040_enable_ldo(onoff);
378 }
379 
380 int exynos_init(void)
381 {
382 	gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
383 	gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
384 
385 	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
386 
387 	switch (get_hwrev()) {
388 	case 0:
389 		/*
390 		 * Set the low to enable LDO_EN
391 		 * But when you use the test board for eMMC booting
392 		 * you should set it HIGH since it removes the inverter
393 		 */
394 		/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
395 		s5p_gpio_direction_output(&gpio1->e3, 6, 0);
396 		break;
397 	default:
398 		/*
399 		 * Default reset state is High and there's no inverter
400 		 * But set it as HIGH to ensure
401 		 */
402 		/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
403 		s5p_gpio_direction_output(&gpio1->e1, 3, 1);
404 		break;
405 	}
406 
407 #ifdef CONFIG_SOFT_SPI
408 	soft_spi_init();
409 #endif
410 	check_hw_revision();
411 	printf("HW Revision:\t0x%x\n", board_rev);
412 
413 	return 0;
414 }
415 
416 void exynos_lcd_misc_init(vidinfo_t *vid)
417 {
418 #ifdef CONFIG_TIZEN
419 	get_tizen_logo_info(vid);
420 #endif
421 
422 	/* for LD9040. */
423 	vid->pclk_name = 1;	/* MPLL */
424 	vid->sclk_div = 1;
425 
426 	setenv("lcdinfo", "lcd=ld9040");
427 }
428